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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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11034332
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Filing Dt:
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01/12/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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SYSTEM, APPARATUS AND METHOD FOR CONTROLLING TEMPERATURE OF AN INTEGRATED CIRCUIT UNDER TEST
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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11034617
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Filing Dt:
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01/13/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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AUTOMATIC CACHE ACTIVATION AND DEACTIVATION FOR POWER REDUCTION
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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11037597
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Filing Dt:
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01/18/2005
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Publication #:
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Pub Dt:
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07/20/2006
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Title:
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SOFTWARE TESTING
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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11044449
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Filing Dt:
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01/27/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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APPARATUS AND METHOD FOR SPEEDING UP ACCESS TIME OF A LARGE REGISTER FILE WITH WRAP CAPABILITY
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11045682
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Filing Dt:
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01/28/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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MULTIPLE MASTER INTER INTEGRATED CIRCUIT BUS SYSTEM
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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11047522
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Filing Dt:
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01/31/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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INTERNAL DATA BUS INTERCONNECTION MECHANISM UTILIZING CENTRAL INTERCONNECTION MODULE CONVERTING DATA IN DIFFERENT ALIGNMENT DOMAINS
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Patent #:
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Issue Dt:
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01/08/2008
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Application #:
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11050053
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Filing Dt:
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02/03/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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SYSTEM AND METHOD FOR OPTIMIZING HEAT MANAGEMENT
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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11053078
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Filing Dt:
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02/08/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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METHODS, SYSTEMS AND MEDIA FOR FUNCTIONAL SIMULATION OF NOISE AND DISTORTION ON AN I/O BUS
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Patent #:
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Issue Dt:
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10/16/2007
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Application #:
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11054293
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Filing Dt:
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02/09/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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MECHANISM AND APPARATUS ALLOWING AN N-WAY SET ASSOCIATIVE CACHE, IMPLEMENTING A HYBRID PSEUDO-LRU REPLACEMENT ALGORITHM, TO HAVE N L1 MISS FETCH REQUESTS SIMULTANEOUSLY INFLIGHT REGARDLESS OF THEIR CONGRUENCE CLASS
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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11054403
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Filing Dt:
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02/09/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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METHOD TO PRESERVE ORDERING OF READ AND WRITE OPERATIONS IN A DMA SYSTEM BY DELAYING READ ACCESS
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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11054903
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Filing Dt:
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02/10/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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SYSTEM AND METHOD FOR UNFOLDING/REPLICATING LOGIC PATHS TO FACILITATE PROPAGATION DELAY MODELING
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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11054904
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Filing Dt:
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02/10/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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EXPLOITING SUSPECTED REDUNDANCY FOR ENHANCED DESIGN VERIFICATION
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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11054916
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Filing Dt:
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02/10/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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SYSTEM AND METHOD FOR AUTOMATIC INSERTION OF ON-CHIP DECOUPLING CAPACITORS
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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11055262
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Filing Dt:
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02/10/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Title:
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HALF-GOOD MODE FOR LARGE L2 CACHE ARRAY TOPOLOGY WITH DIFFERENT LATENCY DOMAINS
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Patent #:
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Issue Dt:
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01/08/2008
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Application #:
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11055820
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Filing Dt:
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02/11/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR SHARING DATA IN A CACHE AMONG THREADS IN AN SMT PROCESSOR
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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11055829
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Filing Dt:
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02/11/2005
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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ECLIPZ WIRETEST FOR DIFFERENTIAL CLOCK/OSCILLATOR SIGNALS
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Patent #:
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Issue Dt:
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10/16/2007
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Application #:
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11055830
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Filing Dt:
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02/11/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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CONTENT ADDRESSABLE MEMORY INCLUDING A DUAL MODE CYCLE BOUNDARY LATCH
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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11055831
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Filing Dt:
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02/11/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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METHOD AND APPARATUS FOR DYNAMIC MODIFICATION OF MICROPROCESSOR INSTRUCTION GROUP AT DISPATCH
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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11055863
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Filing Dt:
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02/11/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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METHOD AND APPARATUS FOR SPECIFYING MULTIPLE VOLTAGE DOMAINS AND VALIDATING PHYSICAL IMPLEMENTATION AND INTERCONNECTIONS IN A PROCESSOR CHIP
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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11056512
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Filing Dt:
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02/11/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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FENCING OFF INSTRUCTION BUFFER UNTIL RE-CIRCULATION OF REJECTED PRECEDING AND BRANCH INSTRUCTIONS TO AVOID MISPREDICT FLUSH
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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11056673
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Filing Dt:
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02/12/2005
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Publication #:
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Pub Dt:
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08/17/2006
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Title:
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CACHE MEMORY DIRECT INTERVENTION
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Patent #:
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Issue Dt:
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09/25/2007
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Application #:
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11057318
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Filing Dt:
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02/11/2005
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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CLOCK DUTY CYCLE BASED ACCESS TIMER COMBINED WITH STANDARD STAGE CLOCKED OUTPUT REGISTER
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Patent #:
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Issue Dt:
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09/25/2007
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Application #:
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11064570
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Filing Dt:
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02/24/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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METHOD AND SYSTEM FOR CONTROLLING FORWARDING OR TERMINATING OF A REQUEST AT A BUS INTERFACE BASED ON BUFFER ABVAILABILITY
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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11064741
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Filing Dt:
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02/24/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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METHODS AND APPARATUS FOR USING MEMORY
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Patent #:
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Issue Dt:
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09/25/2007
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Application #:
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11064744
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Filing Dt:
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02/24/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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PIPELINE BIT HANDLING CIRCUIT AND METHOD FOR A BUS BRIDGE
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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11065601
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Filing Dt:
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02/24/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Title:
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METHOD AND SYSTEM FOR FORMAL UNIDIRECTIONAL BUS VERIFICATION USING SYNTHESIZING CONSTRAINED DRIVERS
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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11065951
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Filing Dt:
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02/25/2005
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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INTERRUPT MECHANISM ON AN IO ADAPTER THAT SUPPORTS VIRTUALIZATION
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Patent #:
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Issue Dt:
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06/12/2007
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Application #:
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11067825
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Filing Dt:
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02/28/2005
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Publication #:
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Pub Dt:
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08/31/2006
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Title:
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LOGIC CIRCUITS UTILIZING GATED DIODE SENSING
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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11077579
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Filing Dt:
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03/11/2005
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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SYSTEM AND METHOD FOR OPTIMALLY CONFIGURING SOFTWARE SYSTEMS FOR A NUMA PLATFORM
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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11082699
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Filing Dt:
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03/17/2005
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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SYSTEM AND METHOD FOR ENGINE-CONTROLLED CASE SPLITTING WITHIN A MULTIPLE-ENGINE BASED VERIFICATION FRAMEWORK
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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11086871
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Filing Dt:
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03/22/2005
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Publication #:
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Pub Dt:
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09/28/2006
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Title:
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METHOD AND SYSTEM FOR SHREDDING DATA WITHIN A DATA STORAGE SUBSYSTEM
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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11089941
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Filing Dt:
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03/25/2005
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Publication #:
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Pub Dt:
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09/28/2006
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Title:
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CIRCUITS AND METHODS FOR PROVIDING LOW VOLTAGE, HIGH PERFORMANCE REGISTER FILES
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Patent #:
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Issue Dt:
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06/12/2007
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Application #:
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11094710
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Filing Dt:
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03/30/2005
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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METHOD AND APPARATUS FOR CONTROLLING TRANSITION RATES ON ADJACENT INTERCONNECTS
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Patent #:
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Issue Dt:
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06/19/2007
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Application #:
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11095895
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Filing Dt:
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03/31/2005
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Publication #:
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Pub Dt:
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10/05/2006
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Title:
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OSCILLATOR ARRAY WITH ROW AND COLUMN CONTROL
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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11098343
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Filing Dt:
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04/04/2005
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Publication #:
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Pub Dt:
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10/05/2006
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Title:
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PACKAGING INTEGRATED CIRCUITS FOR ACCELERATED DETECTION OF TRANSIENT PARTICLE INDUCED SOFT ERROR RATES
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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11098850
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Filing Dt:
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04/05/2005
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Publication #:
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Pub Dt:
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10/05/2006
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Title:
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OPTICAL TRIGGER FOR PICA TECHNIQUE
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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11101272
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Filing Dt:
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04/06/2005
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Publication #:
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Pub Dt:
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10/12/2006
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Title:
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SYSTEM AND METHOD FOR MANAGING A CABLE IN A SERVER SYSTEM
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11105611
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Filing Dt:
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04/14/2005
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Publication #:
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Pub Dt:
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11/02/2006
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Title:
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METHOD FOR PRESERVING CONSTRAINTS DURING SEQUENTIAL REPARAMETERIZATION
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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11106008
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Filing Dt:
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04/14/2005
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Publication #:
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Pub Dt:
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10/19/2006
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Title:
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PROTECTIVE COVER FOR DIMM CIRCUIT CARD
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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11109085
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Filing Dt:
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04/19/2005
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Publication #:
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Pub Dt:
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10/19/2006
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Title:
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CACHE MEMORY, PROCESSING UNIT, DATA PROCESSING SYSTEM AND METHOD FOR ASSUMING A SELECTED INVALID COHERENCY STATE BASED UPON A REQUEST SOURCE
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11112776
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Filing Dt:
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04/22/2005
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Publication #:
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Pub Dt:
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03/08/2007
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Title:
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METHOD AND APPARATUS FOR ENCODING BINARY DATA AS A ZERO TERMINATED STRING
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Patent #:
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Issue Dt:
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06/19/2007
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Application #:
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11124064
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Filing Dt:
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05/06/2005
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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COOLING APPARATUS, COOLED ELECTRONIC MODULE AND METHODS OF FABRICATION THEREOF EMPLOYING AN INTEGRATED MANIFOLD AND A PLURALITY OF THERMALLY CONDUCTIVE FINS
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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11124513
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Filing Dt:
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05/06/2005
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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COOLING APPARATUS, COOLED ELECTRONIC MODULE AND METHODS OF FABRICATION THEREOF EMPLOYING AN INTEGRATED COOLANT INLET AND OUTLET MANIFOLD
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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11124940
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Filing Dt:
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05/09/2005
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Publication #:
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Pub Dt:
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11/23/2006
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Title:
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APPARATUS EMPLOYING PREDICTIVE FAILURE ANALYSIS BASED ON IN-CIRCUIT FET ON-RESISTANCE CHARACTERISTICS
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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11131621
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Filing Dt:
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05/18/2005
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Publication #:
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Pub Dt:
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11/23/2006
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Title:
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CLOCK SCALING TO OPTIMIZE PLL CLOCK GENERATION ACCURACY
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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11138837
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Filing Dt:
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05/26/2005
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Publication #:
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Pub Dt:
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11/30/2006
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Title:
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APPARATUS AND METHOD FOR EFFICIENT TRANSMISSION OF UNALIGNED DATA
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Patent #:
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Issue Dt:
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01/15/2008
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Application #:
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11148090
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Filing Dt:
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06/08/2005
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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DIGITAL POWER MONITOR AND ADAPTIVE SELF-TUNING POWER MANAGEMENT
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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11151831
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Filing Dt:
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06/14/2005
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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COMPLIANT THERMAL INTERFACE STRUCTURE WITH VAPOR CHAMBER
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Patent #:
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Issue Dt:
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07/10/2007
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Application #:
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11160056
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Filing Dt:
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06/07/2005
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Publication #:
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Pub Dt:
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12/07/2006
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Title:
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PROGRAMMING AND DETERMINING STATE OF ELECTRICAL FUSE USING FIELD EFFECT TRANSISTOR HAVING MULTIPLE CONDUCTION STATES
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Patent #:
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Issue Dt:
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06/19/2007
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Application #:
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11160154
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Filing Dt:
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06/10/2005
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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METHOD AND APPARATUS FOR COMPLETELY COVERING A WAFER WITH A PASSIVATING MATERIAL
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Patent #:
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Issue Dt:
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09/25/2007
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Application #:
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11160601
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Filing Dt:
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06/30/2005
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Publication #:
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Pub Dt:
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01/04/2007
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Title:
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METHOD AND APPARATUS FOR MONITORING INTEGRATED CIRCUIT TEMPERATURE THROUGH DETERMINISTIC PATH DELAYS
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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11160609
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Filing Dt:
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06/30/2005
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Publication #:
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Pub Dt:
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01/04/2007
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Title:
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APPARATUS AND METHOD FOR IMPLEMENTING AN INTEGRATED CIRCUIT IP CORE LIBRARY ARCHITECTURE
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09/18/2007
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11160785
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07/08/2005
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Publication #:
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Pub Dt:
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01/11/2007
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Title:
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CLEARANCE HOLE SIZE ADJUSTMENT FOR IMPEDANCE CONTROL IN MULTILAYER ELECTRONIC PACKAGING AND PRINTED CIRCUIT BOARDS
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07/03/2007
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11161215
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07/27/2005
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02/01/2007
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Title:
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A METHOD AND APPARATUS FOR CORRECTING GRAVITATIONAL SAG IN PHOTOMASKS USED IN THE PRODUCTION OF ELECTRONIC DEVICES
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08/14/2007
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11162098
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08/29/2005
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03/01/2007
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Title:
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METHOD AND APPARATUS FOR PRESETTING AN AMPLIFIER
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09/04/2007
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11162197
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08/31/2005
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Pub Dt:
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03/01/2007
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Title:
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RING OSCILLATOR STRUCTURE AND METHOD OF SEPARATING RANDOM AND SYSTEMATIC TOLERANCE VALUES
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09/18/2007
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11162306
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09/06/2005
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Pub Dt:
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03/08/2007
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Title:
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SECURE ELECTRONIC VOTING DEVICE
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09/04/2007
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11162662
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09/19/2005
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Pub Dt:
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03/22/2007
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Title:
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SIDEWALL IMAGE TRANSFER (SIT) TECHNOLOGIES
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09/11/2007
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11163013
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09/30/2005
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Pub Dt:
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04/05/2007
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Title:
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STRUCTURE AND METHOD FOR PROVIDING GATE LEAKAGE ISOLATION LOCALLY WITHIN ANALOG CIRCUITS
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05/15/2007
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11163015
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09/30/2005
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04/05/2007
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Title:
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METHOD AND APPARATUS FOR REDUCING NOISE IN A DYNAMIC MANNER
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08/07/2007
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11164290
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11/17/2005
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05/17/2007
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Title:
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REDUCING DAMAGE TO ULK DIELECTRIC DURING CROSS-LINKED POLYMER REMOVAL
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10/30/2007
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11168722
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06/28/2005
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01/04/2007
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Title:
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SYSTEM AND METHOD FOR EXAMINING HIGH-FREQUENCY CLOCK-MASKING SIGNAL PATTERNS AT FULL SPEED
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06/19/2007
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11180445
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07/13/2005
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Pub Dt:
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01/18/2007
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Title:
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METHOD AND SYSTEM FOR FINDING EVOLVING REGIONS IN GRAPHS WITHOUT PERSISTENT NODE IDENTITY
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10/09/2007
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11183540
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07/18/2005
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01/18/2007
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Title:
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MULTI-LEVEL MAPPING OF TAPE ERROR RECOVERIES
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05/29/2007
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11184346
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07/19/2005
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Pub Dt:
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01/25/2007
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Title:
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GLITCH PROTECT VALID CELL AND METHOD FOR MAINTAINING A DESIRED STATE VALUE
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08/21/2007
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11186595
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07/21/2005
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01/25/2007
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Title:
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METHOD AND APPARATUS FOR IMPLEMENTING FAULT TOLERANT PHASE LOCKED LOOP (PLL)
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10/30/2007
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11186606
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07/21/2005
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01/25/2007
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Title:
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METHODS AND APPARATUS FOR ACCESSING MEMORY
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05/29/2007
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11191418
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07/28/2005
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02/01/2007
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Title:
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METHODS AND APPARATUS FOR MEMORY CALIBRATION
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09/04/2007
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11197918
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08/05/2005
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03/01/2007
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Title:
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METHODS AND APPARATUS FOR RING OSCILLATOR BASED MOSFET GATE CAPACITANCE MEASUREMENTS
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09/11/2007
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11203860
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08/15/2005
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Pub Dt:
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02/15/2007
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Title:
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DIFFERENTIAL AMPLIFIER OFFSET VOLTAGE MINIMIZATION INDEPENDENTLY FROM COMMON MODE VOLTAGE ADJUSTMENT
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07/03/2007
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11209549
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08/23/2005
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03/01/2007
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Title:
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REDUCED CROSS-TALK SIGNALING CIRCUIT AND METHOD
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06/19/2007
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11211955
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08/25/2005
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03/01/2007
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Title:
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PROGRAMMABLE DRIVER DELAY
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10/30/2007
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11212008
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08/25/2005
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04/12/2007
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Title:
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METHOD AND APPARATUS FOR IMPLEMENTING COMMON MODE CABLE NOISE SUPPRESSION FOR MEDIUM RANGE FREQUENCIES
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12/11/2007
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11215694
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08/30/2005
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03/01/2007
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Title:
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DELIMITER LOOKUP USING PROCESSOR PERMUTATION INSTRUCTION
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07/31/2007
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11223875
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09/08/2005
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03/08/2007
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Title:
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EASY RELEASE SERVER COOLING FAN WITH INTEGRATED SPRING AND METHOD FOR USING SAME
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12/04/2007
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11225571
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09/13/2005
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03/15/2007
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Title:
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BITLINE VARIABLE METHODS AND CIRCUITS FOR EVALUATING STATIC MEMORY CELL DYNAMIC STABILITY
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07/17/2007
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11227026
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09/15/2005
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03/15/2007
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Title:
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APPARATUS AND METHOD FOR VERIFYING GLITCH-FREE OPERATION OF A MULTIPLEXER
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10/30/2007
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11232745
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09/22/2005
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03/22/2007
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Title:
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METHOD AND SYSTEM FOR EMBEDDING WIRE MODEL OBJECTS IN A CIRCUIT SCHEMATIC DESIGN
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01/08/2008
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11232747
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09/22/2005
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03/22/2007
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Title:
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METHOD AND SYSTEM FOR MODELING WIRING ROUTING IN A CIRCUIT DESIGN
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11/13/2007
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11232749
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09/22/2005
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03/22/2007
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Title:
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METHOD AND APPARATUS FOR GENERATING SPREAD SPECTRUM CLOCK SIGNALS HAVING HARMONIC EMISSION SUPPRESSIONS
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06/05/2007
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11232763
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09/22/2005
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03/22/2007
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IMPLEMENTING A HIGH RESOLUTION MONOTONIC SYSTEM CLOCK
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05/15/2007
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11232767
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09/22/2005
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03/22/2007
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ROM LOAD BALANCING FOR BIT LINES
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01/08/2008
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11246823
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10/07/2005
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04/12/2007
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METHOD AND MECHANICAL TAMPER-EVIDENT CASE FASTENER
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05/15/2007
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11275176
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12/16/2005
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DYNAMICALLY DETERMINING YIELD EXPECTATION
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08/21/2007
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11276169
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02/16/2006
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08/16/2007
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DRIVER FOR MULTI-VOLTAGE ISLAND/CORE ARCHITECTURE
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10/16/2007
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11279658
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04/13/2006
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10/18/2007
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APPARATUS FOR HYSTERESIS BASED PROCESS COMPENSATION FOR CMOS RECEIVER CIRCUITS
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09/11/2007
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11304142
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12/15/2005
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06/21/2007
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METHOD AND APPARATUS FOR IMPLEMENTING SUBTHRESHOLD LEAKAGE REDUCTION IN LSDL
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07/24/2007
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11307293
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01/31/2006
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08/02/2007
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AUTOMATED TOOL RECIPE VERIFICATION AND CORRECTION
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10/16/2007
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11308215
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03/13/2006
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09/13/2007
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A REAL-TIME ADAPTIVE SRAM ARRAY FOR HIGH SEU IMMUNITY
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10/02/2007
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11327818
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01/06/2006
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07/12/2007
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Title:
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JITTER MEASUREMENTS FOR REPETITIVE CLOCK SIGNALS
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05/15/2007
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11329632
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01/11/2006
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CONNECTOR DRAWER
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08/21/2007
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11333232
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01/18/2006
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07/19/2007
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Title:
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METHOD AND STRUCTURE FOR LOSSY COMPRESSION OF CONTINUOUS DATA WITH EXTENSIBLE MOTIFS
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07/10/2007
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11333613
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01/17/2006
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07/19/2007
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Title:
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PROGRAMMABLE REFERENCE VOLTAGE GENERATOR
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08/28/2007
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11342728
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01/30/2006
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08/02/2007
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Title:
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FAST DATA STREAM DECODING USING APRIORI INFORMATION
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10/23/2007
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11386343
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03/22/2006
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09/27/2007
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Title:
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ELECTRONIC PACKAGE STRUCTURES USING LAND GRID ARRAY INTERPOSERS FOR MODULE-TO-BOARD INTERCONNECTION
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10/16/2007
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11423331
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06/09/2006
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ACTIVE IMPENDANCE CURRENT-SHARE METHOD
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09/04/2007
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11459670
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07/25/2006
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AN OPEN-ENDED SPIN TOOL
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06/26/2007
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11464365
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08/14/2006
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AUTONOMIC DATA ASSURANCE APPLIED TO COMPLEX DATA-INTENSIVE SOFTWARE PROCESSES BY MEANS OF PATTERN RECOGNITION
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09/11/2007
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11532365
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09/15/2006
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CONTROLLED SELF-ADJUSTING PROCESS FOR REDUCING SELECTED DIMENSIONS OF ELECTRONIC PRODUCTS
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07/10/2007
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11539046
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10/05/2006
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Title:
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CABLE RESTRAINT
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