|
|
Patent #:
|
|
Issue Dt:
|
08/12/1997
|
Application #:
|
07686392
|
Filing Dt:
|
04/17/1991
|
Title:
|
METHOD FOR FABRICATING A NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING STORAGE CELL ARRAY AND PERIPHERAL CIRCUIT, AND A STRUCTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/1994
|
Application #:
|
07876640
|
Filing Dt:
|
04/30/1992
|
Title:
|
PRINTED CIRCUIT BOARD FOR MOUNTED SEMICONDUCTORS AND OTHER ELECTRONIC COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/1994
|
Application #:
|
07916673
|
Filing Dt:
|
07/22/1992
|
Title:
|
METHOD OF MULTI-LEVEL STORAGE IN DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/1994
|
Application #:
|
07991776
|
Filing Dt:
|
12/16/1992
|
Title:
|
PROCESS FOR THE MANUFACTURE OF A HIGH DENSITY CELL ARRAY OF GAIN MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/1995
|
Application #:
|
07995639
|
Filing Dt:
|
12/17/1992
|
Title:
|
DECODED-SOURCE SENSE AMPLIFIER WITH SPECIAL COLUMN SELECT DRIVER VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/1994
|
Application #:
|
08078099
|
Filing Dt:
|
06/18/1993
|
Title:
|
METHOD OF ACCESSING A COMMUNICATION MEDIUM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/1994
|
Application #:
|
08100634
|
Filing Dt:
|
07/30/1993
|
Title:
|
MULTICAST ROUTING USING CORE BASED TREES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/1994
|
Application #:
|
08101637
|
Filing Dt:
|
08/04/1993
|
Title:
|
METHOD OF MANUFACTURING A PRINTED CIRCUIT BOARD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/1995
|
Application #:
|
08110608
|
Filing Dt:
|
08/23/1993
|
Title:
|
SILICON CONTROLLED RECTIFIER WITH A VARIABLE BASE-SHUNT RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/1994
|
Application #:
|
08128424
|
Filing Dt:
|
09/29/1993
|
Title:
|
METHOD OF MAKING PEDESTAL LEAD FRAME FOR SUPPORTING A SEMICONDUCTOR CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/1995
|
Application #:
|
08159186
|
Filing Dt:
|
11/30/1993
|
Title:
|
CACHE MEMORY SUPPORT IN AN INTEGRATED MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/1995
|
Application #:
|
08159551
|
Filing Dt:
|
12/01/1993
|
Title:
|
METHOD OF MAKING A CONTACT OF A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/1997
|
Application #:
|
08226033
|
Filing Dt:
|
04/11/1994
|
Title:
|
DRAM PAGE COPY METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/1998
|
Application #:
|
08226034
|
Filing Dt:
|
04/11/1994
|
Title:
|
WIDE DATABUS ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/1996
|
Application #:
|
08226035
|
Filing Dt:
|
04/11/1994
|
Title:
|
RAM VARIABLE SIZE BLOCK WRITE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/1996
|
Application #:
|
08248754
|
Filing Dt:
|
05/25/1994
|
Title:
|
PROCESS FOR ANISOTROPICALLY ETCHING SEMICONDUCTOR MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/1997
|
Application #:
|
08253271
|
Filing Dt:
|
06/02/1994
|
Title:
|
SINGLE CHIP FRAME BUFFER AND GRAPHICS ACCELERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/1995
|
Application #:
|
08257233
|
Filing Dt:
|
06/09/1994
|
Title:
|
MEDIUM ACCESS PROTOCOL FOR WIRELESS LOCAL AREA NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/1995
|
Application #:
|
08268948
|
Filing Dt:
|
06/30/1994
|
Title:
|
ISOLATION METHOD OF SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1998
|
Application #:
|
08277580
|
Filing Dt:
|
07/20/1994
|
Title:
|
SELF-TIMED CIRCUIT CONTROL DEVICE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/1996
|
Application #:
|
08299717
|
Filing Dt:
|
09/01/1994
|
Title:
|
METHOD OF MAKING SILICON CONTROLLED RECTIFIER WITH A VARIABLE BASE- SHUNT RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/1997
|
Application #:
|
08307578
|
Filing Dt:
|
09/26/1994
|
Title:
|
DATA TRANSMISSION INSTALLATION OF THE RADIO NETWORK TYPE, AND CORRESPONDING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/1997
|
Application #:
|
08307579
|
Filing Dt:
|
09/26/1994
|
Title:
|
DATA TRANSMISSION INSTALLATION OF THE RADIO NETWORK TYPE, AND CORRESPONDING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/1998
|
Application #:
|
08319042
|
Filing Dt:
|
10/06/1994
|
Title:
|
DELAY LOCKED LOOP IMPLEMENTATION IN A SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/1995
|
Application #:
|
08330901
|
Filing Dt:
|
10/27/1994
|
Title:
|
MULTI-HAZARD ALARM SYSTEM USING SELECTABLE POWER-LEVEL TRANSMISSION AND LOCALIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/1995
|
Application #:
|
08341892
|
Filing Dt:
|
11/15/1994
|
Title:
|
METHOD FOR FORMING A TWO-LAYERED POLYSILICON GATER ELECTRODE IN A SEMICONDUCTOR DEVICE USING GRAIN BOUNDARIES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/1997
|
Application #:
|
08343477
|
Filing Dt:
|
11/28/1994
|
Title:
|
SYSTEM FOR ACCESSING DISTRIBUTED DATA CACHE CHANNEL AT EACH NETWORK NODE TO PASS REQUESTS AND DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/1996
|
Application #:
|
08355452
|
Filing Dt:
|
12/13/1994
|
Title:
|
SEMICONDUCTOR DEVICE AND LEAD FRAME COMBINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/1998
|
Application #:
|
08355957
|
Filing Dt:
|
12/14/1994
|
Title:
|
FLEXIBLE DRAM ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/1996
|
Application #:
|
08364130
|
Filing Dt:
|
12/27/1994
|
Title:
|
PRE-SENSE AMPLIFIER FOR MONOLITHIC MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/1996
|
Application #:
|
08366921
|
Filing Dt:
|
12/30/1994
|
Title:
|
METHOD OF MULTILEVEL DRAM SENSE AND RESTORE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/1996
|
Application #:
|
08394607
|
Filing Dt:
|
02/27/1995
|
Title:
|
METHOD FOR FORMING AN OXYNITRIDE FILM IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/1997
|
Application #:
|
08407829
|
Filing Dt:
|
03/21/1995
|
Title:
|
INFORMATION TRANSMISSION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/1997
|
Application #:
|
08417213
|
Filing Dt:
|
04/05/1995
|
Title:
|
HIERARCHICAL MEMORY ARRAY STRUCTURE HAVING ELECTRICALLY ISOLATED BIT LINES FOR TEMPORARY DATA STORAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/1996
|
Application #:
|
08421793
|
Filing Dt:
|
04/14/1995
|
Title:
|
A SEMICONDUCTOR CONTACT THAT PARTIALLY OVERLAPS A CONDUCTIVE LINE PATTERN AND A METHOD OF MANUFACTURING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08429544
|
Filing Dt:
|
04/27/1995
|
Title:
|
BUILT IN ACCESS TIME COMPARATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/1997
|
Application #:
|
08430228
|
Filing Dt:
|
04/28/1995
|
Title:
|
EDGE TRIGGERED SET-RESET FLIP-FLOP (SRFF)
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/1997
|
Application #:
|
08494645
|
Filing Dt:
|
06/23/1995
|
Title:
|
WIRING STRUCTURE FOR SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/1997
|
Application #:
|
08495270
|
Filing Dt:
|
06/27/1995
|
Title:
|
METHOD FOR FABRICATING SEMICONDUCTOR MEMORY ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/1996
|
Application #:
|
08515485
|
Filing Dt:
|
08/15/1995
|
Title:
|
MEMORY DEVICE WITH DISTRIBUTED VOLTAGE REGULATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
08519504
|
Filing Dt:
|
08/25/1995
|
Title:
|
REDUCED AREA SENSE AMPLIFIER ISOLATION LAYOUT IN A DYNAMIC RAM ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/1996
|
Application #:
|
08534572
|
Filing Dt:
|
09/27/1995
|
Title:
|
METHOD OF MAKING CUP-SHAPED DRAM CAPACITOR HAVING AN INWARDLY OVERHANG ING LIP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/1998
|
Application #:
|
08537062
|
Filing Dt:
|
09/29/1995
|
Title:
|
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/1998
|
Application #:
|
08537615
|
Filing Dt:
|
10/02/1995
|
Title:
|
DATA LOADING CIRCUIT FOR PARTIAL PROGRAM OF NONVOLATILE SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/1997
|
Application #:
|
08543705
|
Filing Dt:
|
10/16/1995
|
Title:
|
METHOD OF MAKING A FIELD EFFECT TRANSISTOR HAVING AN ELEVATED SOURCE AND AN ELEVATED DRAIN
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/1997
|
Application #:
|
08547026
|
Filing Dt:
|
10/23/1995
|
Title:
|
SELF-LOCATING REMOTE MONITORING SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1998
|
Application #:
|
08550326
|
Filing Dt:
|
10/30/1995
|
Title:
|
FABRICATING METHOD OF A FIN SHAPED CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1999
|
Application #:
|
08576752
|
Filing Dt:
|
12/21/1995
|
Title:
|
SEMICONDUCTOR DEVICE FABRICATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/1999
|
Application #:
|
08579535
|
Filing Dt:
|
12/27/1995
|
Title:
|
CLOSED-MOLD FOR LED ALPHANUMERIC DISPLAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
08581765
|
Filing Dt:
|
01/02/1996
|
Title:
|
CHEMICAL VAPOR DEPOSITION OF TITANIUM FROM TITANIUM TETRACHLORIDE AND HYDROCARBON REACTANTS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2001
|
Application #:
|
08582385
|
Filing Dt:
|
01/03/1996
|
Title:
|
METHOD OF FORMING A CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/1997
|
Application #:
|
08584887
|
Filing Dt:
|
01/11/1996
|
Title:
|
METHOD OF MULTILEVEL DRAM SENSE AND RESTORE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/1997
|
Application #:
|
08587744
|
Filing Dt:
|
01/19/1996
|
Title:
|
INTERCONNECTION STRUCTURE FOR ATTACHING A SEMICONDUCTOR DEVICE TO A SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2001
|
Application #:
|
08595020
|
Filing Dt:
|
01/31/1996
|
Title:
|
METHOD OF MULTI-LEVEL STORAGE IN DRAM AND APPARATUS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/1998
|
Application #:
|
08597510
|
Filing Dt:
|
02/02/1996
|
Title:
|
FLEXIBLE DRAM ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08612044
|
Filing Dt:
|
08/07/1996
|
Title:
|
STAGGERED PIPELINE ACCESS SCHEME FOR SYNCHRONOUS RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2000
|
Application #:
|
08614766
|
Filing Dt:
|
03/13/1996
|
Title:
|
METHOD FOR DESIGNING CELL ARRAY LAYOUT OF NON-VOLATILE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1998
|
Application #:
|
08615064
|
Filing Dt:
|
03/13/1996
|
Title:
|
NONVOLATILE MEMORY DEVICE HAVING AN IMPROVED INTEGRATION AND REDUCED CONTACT FAILURE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/1998
|
Application #:
|
08615408
|
Filing Dt:
|
03/14/1996
|
Title:
|
MULTIRATE WIRELESS DATA COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/1999
|
Application #:
|
08623905
|
Filing Dt:
|
03/27/1996
|
Title:
|
BIPOLAR SILICON TRANSISTOR WITH ARSENIC AND PHOSPHOROUS RATIO
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2004
|
Application #:
|
08631465
|
Filing Dt:
|
04/12/1996
|
Title:
|
ENHANCED COLLIMATED DEPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08638809
|
Filing Dt:
|
04/29/1996
|
Title:
|
DIGITAL DELAY LINE FOR A REDUCED JITTER DIGITAL DELAY LOCK LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/1997
|
Application #:
|
08638810
|
Filing Dt:
|
04/29/1996
|
Title:
|
POWER-UP/POWER-DOWN RESET CIRCUIT FOR LOW VOLTAGE INTERVAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/1997
|
Application #:
|
08638812
|
Filing Dt:
|
04/29/1996
|
Title:
|
COMMAND ENCODED DELAYED CLOCK GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/1999
|
Application #:
|
08643885
|
Filing Dt:
|
05/07/1996
|
Title:
|
METHOD OF FORMING A POLYCIDE GATE OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/1998
|
Application #:
|
08652654
|
Filing Dt:
|
05/28/1996
|
Title:
|
DATA READ CIRCUIT FOR A NONVOLATILE SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/1999
|
Application #:
|
08656164
|
Filing Dt:
|
05/31/1996
|
Title:
|
RENUMBERED ARRAY ARCHITECTURE FOR MULTI-ARRAY MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/1998
|
Application #:
|
08661810
|
Filing Dt:
|
06/11/1996
|
Title:
|
HIERARCHICAL MEMORY ARRAY STRUCTURE WITH REDUNDANT COMPONENTS HAVING ELECTRICALLY ISOLATED BIT LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08669746
|
Filing Dt:
|
06/26/1996
|
Title:
|
SENSE AMPLIFIER WITH LOW POWER IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/1997
|
Application #:
|
08670592
|
Filing Dt:
|
06/26/1996
|
Title:
|
METHOD FOR FABRICATING A CAPACITOR OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08675590
|
Filing Dt:
|
07/03/1996
|
Title:
|
CIRCUIT ARRANGEMENT AND METHOD FOR MEASURING A DIFFERENCE IN CAPACITANCE BETWEEN A FIRST CAPACITANCE C1 AND A SECOND CAPACITANCE C2
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/1996
|
Application #:
|
08686272
|
Filing Dt:
|
07/25/1996
|
Title:
|
METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN DIGITAL ELECTRONIC CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/1997
|
Application #:
|
08692554
|
Filing Dt:
|
08/06/1996
|
Title:
|
METHOD AND APPARATUS FOR DETECTING AND CORRECTING MISCONVERGENCE OF A BLIND EQUALIZER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08694541
|
Filing Dt:
|
08/09/1996
|
Title:
|
INTEGRATED CIRCUITS, AND METHODS OF FABRICATING SAME, WHICH TAKE INTO ACCOUNT CAPACITIVE LOADING BY THE INTEGRATED CIRCUIT POTTING MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/1998
|
Application #:
|
08700234
|
Filing Dt:
|
08/20/1996
|
Title:
|
METHOD OF ANTI-FUSE REPAIR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/1997
|
Application #:
|
08706662
|
Filing Dt:
|
09/06/1996
|
Title:
|
MULTIPLICATION OF STORAGE CAPACITANCE IN MEMORY CELLS BY USING THE MILLER EFFECT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08708742
|
Filing Dt:
|
09/05/1996
|
Title:
|
METHOD FOR MANUFACTURING MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1998
|
Application #:
|
08709249
|
Filing Dt:
|
09/10/1996
|
Title:
|
METHOD OF FABRICATING MICROELECTRONIC CAPACITORS HAVING TANTALUM PENTOXIDE DIELECTRICS AND OXYGEN BARRIERS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08717170
|
Filing Dt:
|
09/20/1996
|
Title:
|
MEMORY DEVICE WITH DISTRIBUTED VOLTAGE REGULATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/1999
|
Application #:
|
08724578
|
Filing Dt:
|
09/30/1996
|
Title:
|
METHOD FOR REDUCING GASEOUS SPECIES OF CONTAMINATION IN WET PROCESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/1998
|
Application #:
|
08727852
|
Filing Dt:
|
10/04/1996
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1998
|
Application #:
|
08734921
|
Filing Dt:
|
10/22/1996
|
Title:
|
DISTRIBUTED SERIAL CONTROL SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08743348
|
Filing Dt:
|
11/04/1996
|
Title:
|
POWER SAVINGS TECHNIQUE IN SOLID STATE INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/1997
|
Application #:
|
08743502
|
Filing Dt:
|
11/04/1996
|
Title:
|
A FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08744436
|
Filing Dt:
|
11/08/1996
|
Title:
|
COMBINED FIELD/TRENCH ISOLATION REGION FABRICATION METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2000
|
Application #:
|
08744805
|
Filing Dt:
|
11/06/1996
|
Title:
|
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING A TAPERED CONTACT HOLE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/1998
|
Application #:
|
08752578
|
Filing Dt:
|
11/21/1996
|
Title:
|
HIERARCHICAL MEMORY ARRAY STRUCTURE HAVING ELECTRICALLY ISOLATED BIT LINES FOR TEMPORARY DATA STORAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2001
|
Application #:
|
08752834
|
Filing Dt:
|
11/20/1996
|
Title:
|
ELECTROSTATIC METHOD AND APPARATUS FOR VAPORIZING PRECURSORS AND SYSTEM FOR USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/1998
|
Application #:
|
08757161
|
Filing Dt:
|
11/27/1996
|
Title:
|
METHOD FOR REMOVING DEFECTS BY ION IMPLANTATION USING MEDIUM TEMPERATURE OXIDE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/1998
|
Application #:
|
08757246
|
Filing Dt:
|
11/27/1996
|
Title:
|
METHOD FOR FABRICATING A CAPACITOR OF A SEMICONDUCTOR DEVICE AND THE STRUCTURE OF THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1998
|
Application #:
|
08764083
|
Filing Dt:
|
12/06/1996
|
Title:
|
SUB WORD LINE DRIVING CIRCUIT AND A SEMICONDUCTOR MEMORY DEVICE USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/1997
|
Application #:
|
08772851
|
Filing Dt:
|
12/24/1996
|
Title:
|
FABRICATION METHOD OF SEMICONDUCTOR MEMORY DEVICE CONTAINING CMOS TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2001
|
Application #:
|
08773174
|
Filing Dt:
|
12/27/1996
|
Title:
|
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1998
|
Application #:
|
08773770
|
Filing Dt:
|
12/24/1996
|
Title:
|
PRECHARGE-ENABLE SELF BOOSTING WORD LINE DRIVER FOR AN EMBEDDED DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08774824
|
Filing Dt:
|
12/27/1996
|
Title:
|
THIN FILM TRANSISTOR FOR ANTISTATIC CIRCUIT AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08775629
|
Filing Dt:
|
12/31/1996
|
Title:
|
MICROPROCESSOR POWER CONTROL SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08781490
|
Filing Dt:
|
01/10/1997
|
Title:
|
INPUT/OUTPUT DEVICE HAVING SHARED ACTIVE AREA
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
08788980
|
Filing Dt:
|
01/27/1997
|
Title:
|
COLLIMATED SPUTTER DEPOSITION MONITOR USING SHEET RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/1998
|
Application #:
|
08796148
|
Filing Dt:
|
02/06/1997
|
Title:
|
CIRCUIT FOR CANCELING AND REPLACING REDUNDANT ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/1998
|
Application #:
|
08796219
|
Filing Dt:
|
02/07/1997
|
Title:
|
SYNCHRONOUS MEMORY DEVICE HAVING DUAL INPUT REGISTERS OF PIPELINE STRUCTURE IN DATA PATH
|
|