|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
12504156
|
Filing Dt:
|
07/16/2009
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
SIMULTANEOUS READ AND WRITE DATA TRANSFER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
12505069
|
Filing Dt:
|
07/17/2009
|
Publication #:
|
|
Pub Dt:
|
11/12/2009
| | | | |
Title:
|
VOLTAGE DOWN CONVERTER FOR HIGH SPEED MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
12508926
|
Filing Dt:
|
07/24/2009
|
Publication #:
|
|
Pub Dt:
|
05/06/2010
| | | | |
Title:
|
BRIDGING DEVICE HAVING A CONFIGURABLE VIRTUAL PAGE SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
12512705
|
Filing Dt:
|
07/30/2009
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
Title:
|
ADAPTER FOR MOUNTING A FACEPLATE OF A FIRST STYLE TO AN ELECTRICAL OUTLET CAVITY OF A SECOND STYLE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
12513818
|
Filing Dt:
|
03/30/2010
|
Publication #:
|
|
Pub Dt:
|
08/05/2010
| | | | |
Title:
|
METHOD AND DEVICE FOR HITLESS TUNABLE OPTICAL FILTERING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
12513993
|
Filing Dt:
|
04/07/2010
|
Publication #:
|
|
Pub Dt:
|
07/22/2010
| | | | |
Title:
|
METHOD AND DEVICE FOR HITLESS TUNABLE OPTICAL FILTERING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12514008
|
Filing Dt:
|
04/06/2010
|
Publication #:
|
|
Pub Dt:
|
07/29/2010
| | | | |
Title:
|
METHOD AND DEVICE FOR HITLESS TUNABLE OPTICAL FILTERING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
12518905
|
Filing Dt:
|
06/12/2009
|
Publication #:
|
|
Pub Dt:
|
02/11/2010
| | | | |
Title:
|
ADAPTIVE ANTENNA SYSTEM FOR DIVERSITY AND INTERFERENCE AVOIDANCE IN A MULTI-STATION NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2013
|
Application #:
|
12518961
|
Filing Dt:
|
06/12/2009
|
Publication #:
|
|
Pub Dt:
|
01/21/2010
| | | | |
Title:
|
DISTRIBUTED NETWORK MANAGEMENT HIERARCHY IN A MULTI-STATION COMMUNICATION NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2012
|
Application #:
|
12519404
|
Filing Dt:
|
08/12/2009
|
Publication #:
|
|
Pub Dt:
|
04/15/2010
| | | | |
Title:
|
PHASE CONTROL BY ACTIVE THERMAL ADJUSTMENTS IN AN EXTERNAL CAVITY LASER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
12520914
|
Filing Dt:
|
03/31/2010
|
Publication #:
|
|
Pub Dt:
|
09/16/2010
| | | | |
Title:
|
OPTICAL TRANSMISSION SYSTEM WITH OPTICAL CHROMATIC DISPERSION COMPENSATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
12533732
|
Filing Dt:
|
07/31/2009
|
Publication #:
|
|
Pub Dt:
|
04/15/2010
| | | | |
Title:
|
BRIDGE DEVICE ARCHITECTURE FOR CONNECTING DISCRETE MEMORY DEVICES TO A SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2011
|
Application #:
|
12542296
|
Filing Dt:
|
08/17/2009
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
12542352
|
Filing Dt:
|
08/17/2009
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
LOW LEAKAGE AND DATA RETENTION CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
|
Application #:
|
12547955
|
Filing Dt:
|
08/26/2009
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
DELAY LOCKED LOOP IMPLEMENTATION IN A SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2012
|
Application #:
|
12552040
|
Filing Dt:
|
09/01/2009
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
POWER UP CIRCUIT WITH LOW POWER SLEEP MODE OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12553691
|
Filing Dt:
|
09/03/2009
|
Publication #:
|
|
Pub Dt:
|
08/05/2010
| | | | |
Title:
|
BARRIER-METAL-FREE COPPER DAMASCENE TECHNOLOGY USING ATOMIC HYDROGEN ENHANCED REFLOW
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
12562452
|
Filing Dt:
|
09/18/2009
|
Publication #:
|
|
Pub Dt:
|
05/27/2010
| | | | |
Title:
|
EMBEDDED MEMORY DATABUS ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2011
|
Application #:
|
12564492
|
Filing Dt:
|
09/22/2009
|
Publication #:
|
|
Pub Dt:
|
02/10/2011
| | | | |
Title:
|
SEMICONDUCTOR MEMORY WITH MULTIPLE WORDLINE SELECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2011
|
Application #:
|
12566533
|
Filing Dt:
|
09/24/2009
|
Title:
|
MIXED COMPOSITION INTERFACE LAYER AND METHOD OF FORMING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12578115
|
Filing Dt:
|
10/13/2009
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
NONVOLATILE MEMORY SYSTEM
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12607680
|
Filing Dt:
|
10/28/2009
|
Publication #:
|
|
Pub Dt:
|
05/06/2010
| | | | |
Title:
|
BRIDGE DEVICE HAVING A VIRTUAL PAGE BUFFER
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12607969
|
Filing Dt:
|
10/28/2009
|
Publication #:
|
|
Pub Dt:
|
09/09/2010
| | | | |
Title:
|
System for Accessing Distributed Data Cache Channel at Each Network Node to Pass Requests and Data
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12617459
|
Filing Dt:
|
11/12/2009
|
Publication #:
|
|
Pub Dt:
|
05/06/2010
| | | | |
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY HAVING MULTIPLE EXTERNAL POWER SUPPLIES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2011
|
Application #:
|
12619157
|
Filing Dt:
|
11/16/2009
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
TEMPERATURE DETECTOR IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
12619238
|
Filing Dt:
|
11/16/2009
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
SYNCHRONOUS MEMORY READ DATA CAPTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
12619355
|
Filing Dt:
|
11/16/2009
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
METHOD AND SYSTEM FOR PACKET PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
12620749
|
Filing Dt:
|
11/18/2009
|
Publication #:
|
|
Pub Dt:
|
03/18/2010
| | | | |
Title:
|
SYSTEMS AND METHODS FOR MINIMIZING STATIC LEAKAGE OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2011
|
Application #:
|
12621983
|
Filing Dt:
|
11/19/2009
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT AND DELAY LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/19/2010
|
Application #:
|
12623899
|
Filing Dt:
|
11/23/2009
|
Publication #:
|
|
Pub Dt:
|
06/03/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2014
|
Application #:
|
12627574
|
Filing Dt:
|
11/30/2009
|
Publication #:
|
|
Pub Dt:
|
06/03/2010
| | | | |
Title:
|
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2015
|
Application #:
|
12627702
|
Filing Dt:
|
11/30/2009
|
Publication #:
|
|
Pub Dt:
|
06/03/2010
| | | | |
Title:
|
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12627804
|
Filing Dt:
|
11/30/2009
|
Publication #:
|
|
Pub Dt:
|
06/03/2010
| | | | |
Title:
|
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2011
|
Application #:
|
12633071
|
Filing Dt:
|
12/08/2009
|
Publication #:
|
|
Pub Dt:
|
06/17/2010
| | | | |
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2011
|
Application #:
|
12635280
|
Filing Dt:
|
12/10/2009
|
Publication #:
|
|
Pub Dt:
|
07/08/2010
| | | | |
Title:
|
NON-VOLATILE MEMORY WITH DYNAMIC MULTI-MODE OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
12638309
|
Filing Dt:
|
12/15/2009
|
Publication #:
|
|
Pub Dt:
|
06/24/2010
| | | | |
Title:
|
DELAY LOCKED LOOP CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
12639531
|
Filing Dt:
|
12/16/2009
|
Publication #:
|
|
Pub Dt:
|
05/06/2010
| | | | |
Title:
|
INITIALIZATION CIRCUIT FOR DELAY LOCKED LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12640388
|
Filing Dt:
|
12/17/2009
|
Publication #:
|
|
Pub Dt:
|
06/24/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH MAIN MEMORY UNIT AND AUXILIARY MEMORY UNIT REQUIRING PRESET OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12651707
|
Filing Dt:
|
01/04/2010
|
Publication #:
|
|
Pub Dt:
|
04/22/2010
| | | | |
Title:
|
MEMORY SYSTEM HAVING INCORRUPTED STROBE SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
12652897
|
Filing Dt:
|
01/06/2010
|
Publication #:
|
|
Pub Dt:
|
07/08/2010
| | | | |
Title:
|
CIRCUIT, SYSTEM AND METHOD FOR SELECTIVELY TURNING OFF INTERNAL CLOCK DRIVERS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2014
|
Application #:
|
12683731
|
Filing Dt:
|
01/07/2010
|
Publication #:
|
|
Pub Dt:
|
04/29/2010
| | | | |
Title:
|
TELEPHONE OUTLET WITH PACKET TELEPHONY ADAPTER, AND A NETWORK USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2012
|
Application #:
|
12684026
|
Filing Dt:
|
01/07/2010
|
Publication #:
|
|
Pub Dt:
|
05/13/2010
| | | | |
Title:
|
A DOUBLE DATA RATE CONVERTER CIRCUIT INCLUDES A DELAY LOCKED LOOP FOR PROVIDING THE PLURALITY OF CLOCK PHASE SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12685365
|
Filing Dt:
|
01/11/2010
|
Publication #:
|
|
Pub Dt:
|
08/12/2010
| | | | |
Title:
|
TERMINATION CIRCUIT FOR ON-DIE TERMINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
12685694
|
Filing Dt:
|
01/12/2010
|
Publication #:
|
|
Pub Dt:
|
07/29/2010
| | | | |
Title:
|
TELEPHONE OUTLET WITH PACKET TELEPHONY ADAPTOR, AND A NETWORK USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
12687541
|
Filing Dt:
|
01/14/2010
|
Publication #:
|
|
Pub Dt:
|
05/13/2010
| | | | |
Title:
|
TIMING VERNIER USING A DELAY LOCKED LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
12691794
|
Filing Dt:
|
01/22/2010
|
Publication #:
|
|
Pub Dt:
|
05/13/2010
| | | | |
Title:
|
VOLTAGE LEVEL SHIFTER AND BUFFER USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
|
Application #:
|
12698585
|
Filing Dt:
|
02/02/2010
|
Publication #:
|
|
Pub Dt:
|
06/03/2010
| | | | |
Title:
|
CIRCUIT AND METHOD FOR TESTING MULTI-DEVICE SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12699627
|
Filing Dt:
|
02/03/2010
|
Publication #:
|
|
Pub Dt:
|
08/12/2010
| | | | |
Title:
|
MEMORY WITH DATA CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2011
|
Application #:
|
12700370
|
Filing Dt:
|
02/04/2010
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
|
PHASE-LOCKED LOOP CIRCUITRY USING CHARGE PUMPS WITH CURRENT MIRROR CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2014
|
Application #:
|
12701122
|
Filing Dt:
|
02/05/2010
|
Publication #:
|
|
Pub Dt:
|
02/17/2011
| | | | |
Title:
|
PACKAGE-LEVEL INTEGRATED CIRCUIT CONNECTION WITHOUT TOP METAL PADS OR BONDING WIRE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
12705040
|
Filing Dt:
|
02/12/2010
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR SELF-REFRESHING MEMORY CELLS WITH TEMPERATURE COMPENSATED SELF-REFRESH
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2011
|
Application #:
|
12705345
|
Filing Dt:
|
02/12/2010
|
Publication #:
|
|
Pub Dt:
|
09/16/2010
| | | | |
Title:
|
SRAM LEAKAGE REDUCTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
12709198
|
Filing Dt:
|
02/19/2010
|
Title:
|
BLOCK PROGRAMMABLE PRIORITY ENCODER IN A CAM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2011
|
Application #:
|
12714670
|
Filing Dt:
|
03/01/2010
|
Publication #:
|
|
Pub Dt:
|
08/26/2010
| | | | |
Title:
|
CHARGE PUMP FOR PLL/DLL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2011
|
Application #:
|
12715641
|
Filing Dt:
|
03/02/2010
|
Publication #:
|
|
Pub Dt:
|
06/24/2010
| | | | |
Title:
|
APPARATUS AND METHOD FOR SELF-REFRESHING DYNAMIC RANDOM ACCESS MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
12718300
|
Filing Dt:
|
03/05/2010
|
Publication #:
|
|
Pub Dt:
|
09/02/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR PROVIDING A PACKET BUFFER RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2011
|
Application #:
|
12719413
|
Filing Dt:
|
03/08/2010
|
Publication #:
|
|
Pub Dt:
|
06/24/2010
| | | | |
Title:
|
FLASH MEMORY PROGRAM INHIBIT SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2011
|
Application #:
|
12724952
|
Filing Dt:
|
03/16/2010
|
Publication #:
|
|
Pub Dt:
|
07/08/2010
| | | | |
Title:
|
SYSTEM FOR TRANSMISSION LINE TERMINATION BY SIGNAL CANCELLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2013
|
Application #:
|
12727375
|
Filing Dt:
|
03/19/2010
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
TELEPHONE OUTLET FOR IMPLEMENTING A LOCAL AREA NETWORK OVER TELEPHONE LINES AND A LOCAL AREA NETWORK USING SUCH OUTLETS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2011
|
Application #:
|
12732745
|
Filing Dt:
|
03/26/2010
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Publication #:
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Pub Dt:
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07/22/2010
| | | | |
Title:
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METHOD AND SYSTEM FOR ACCESSING A FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2012
|
Application #:
|
12739840
|
Filing Dt:
|
07/01/2010
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Publication #:
|
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Pub Dt:
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11/04/2010
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Title:
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METHOD AND DEVICE FOR POLARIZATION OF AN OPTICAL RADIATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2013
|
Application #:
|
12739842
|
Filing Dt:
|
07/01/2010
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Publication #:
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Pub Dt:
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10/21/2010
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Title:
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System and Method for Coherent Detection of Optical Signals
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2011
|
Application #:
|
12750119
|
Filing Dt:
|
03/30/2010
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Publication #:
|
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Pub Dt:
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07/22/2010
| | | | |
Title:
|
SIMPLIFIED BIAS CIRCUITRY FOR DIFFERENTIAL BUFFER STAGE WITH SYMMETRIC LOADS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2014
|
Application #:
|
12753271
|
Filing Dt:
|
04/02/2010
|
Publication #:
|
|
Pub Dt:
|
10/07/2010
| | | | |
Title:
|
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
12753458
|
Filing Dt:
|
04/02/2010
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Publication #:
|
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Pub Dt:
|
10/07/2010
| | | | |
Title:
|
NETWORK COMBINING WIRED AND NON-WIRED SEGMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2011
|
Application #:
|
12757406
|
Filing Dt:
|
04/09/2010
|
Publication #:
|
|
Pub Dt:
|
08/05/2010
| | | | |
Title:
|
INDEPENDENT LINK AND BANK SELECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
12757540
|
Filing Dt:
|
04/09/2010
|
Publication #:
|
|
Pub Dt:
|
03/03/2011
| | | | |
Title:
|
USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR STACKING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
12764607
|
Filing Dt:
|
04/21/2010
|
Publication #:
|
|
Pub Dt:
|
08/12/2010
| | | | |
Title:
|
FLOW-FILL SPACER STRUCTURES FOR FLAT PANEL DISPLAY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
12770376
|
Filing Dt:
|
04/29/2010
|
Publication #:
|
|
Pub Dt:
|
11/25/2010
| | | | |
Title:
|
CONFIGURABLE MODULE AND MEMORY SUBSYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2013
|
Application #:
|
12773340
|
Filing Dt:
|
05/04/2010
|
Publication #:
|
|
Pub Dt:
|
04/21/2011
| | | | |
Title:
|
RECONFIGURING THROUGH SILICON VIAS IN STACKED MULTI-DIE PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2011
|
Application #:
|
12773531
|
Filing Dt:
|
05/04/2010
|
Publication #:
|
|
Pub Dt:
|
08/26/2010
| | | | |
Title:
|
SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2011
|
Application #:
|
12775696
|
Filing Dt:
|
05/07/2010
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR REDUCING POOL STARVATION IN A SHARED MEMORY SWITCH
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
12782047
|
Filing Dt:
|
05/18/2010
|
Publication #:
|
|
Pub Dt:
|
09/09/2010
| | | | |
Title:
|
MULTIPLE BIT PER CELL NON VOLATILE MEMORY APPARATUS AND SYSTEM HAVING POLARITY CONTROL AND METHOD OF PROGRAMMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
12782911
|
Filing Dt:
|
05/19/2010
|
Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
|
MEMORY SYSTEM HAVING A PLURALITY OF SERIALLY CONNECTED DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
12784157
|
Filing Dt:
|
05/20/2010
|
Publication #:
|
|
Pub Dt:
|
09/09/2010
| | | | |
Title:
|
FREQUENCY-DOUBLING DELAY LOCKED LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
12784238
|
Filing Dt:
|
05/20/2010
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
Title:
|
APPARATUS AND METHOD FOR COMMUNICATING WITH SEMICONDUCTOR DEVICES OF A SERIAL INTERCONNECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2011
|
Application #:
|
12785051
|
Filing Dt:
|
05/21/2010
|
Publication #:
|
|
Pub Dt:
|
09/16/2010
| | | | |
Title:
|
HIGH SPEED DRAM ARCHITECTURE WITH UNIFORM ACCESS LATENCY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2014
|
Application #:
|
12785099
|
Filing Dt:
|
05/21/2010
|
Publication #:
|
|
Pub Dt:
|
09/09/2010
| | | | |
Title:
|
PARTIAL BLOCK ERASE ARCHITECTURE FOR FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
12812500
|
Filing Dt:
|
07/12/2010
|
Publication #:
|
|
Pub Dt:
|
12/02/2010
| | | | |
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
12813130
|
Filing Dt:
|
06/10/2010
|
Publication #:
|
|
Pub Dt:
|
12/16/2010
| | | | |
Title:
|
A KIT COMPRISING A SUPPORTING DEVICE FOR USE WITH A POLARIMETER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
12816130
|
Filing Dt:
|
06/15/2010
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
Title:
|
SYSTEM AND METHOD PROVIDING INTEROPERABILITY BETWEEN CELLULAR AND OTHER WIRELESS SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
12819467
|
Filing Dt:
|
06/21/2010
|
Title:
|
SINGLE CHIP FRAME BUFFER AND GRAPHICS ACCELERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
12823472
|
Filing Dt:
|
06/25/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
BRIDGING DEVICE HAVING A FREQUENCY CONFIGURABLE CLOCK DOMAIN
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12827691
|
Filing Dt:
|
06/30/2010
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
Title:
|
MEMORY MODULE INCLUDING A PLURALITY OF SYNCHRONOUS MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
12827718
|
Filing Dt:
|
06/30/2010
|
Publication #:
|
|
Pub Dt:
|
10/21/2010
| | | | |
Title:
|
METHOD OF CONFIGURING NON-VOLATILE MEMORY FOR A HYBRID DISK DRIVE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2011
|
Application #:
|
12832121
|
Filing Dt:
|
07/08/2010
|
Publication #:
|
|
Pub Dt:
|
10/28/2010
| | | | |
Title:
|
APPARATUS AND METHOD OF PAGE PROGRAM OPERATION FOR MEMORY DEVICES WITH MIRROR BACK-UP OF DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
12851884
|
Filing Dt:
|
08/06/2010
|
Publication #:
|
|
Pub Dt:
|
12/02/2010
| | | | |
Title:
|
DATA FLOW CONTROL IN MULTIPLE INDEPENDENT PORT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2011
|
Application #:
|
12852082
|
Filing Dt:
|
08/06/2010
|
Publication #:
|
|
Pub Dt:
|
11/25/2010
| | | | |
Title:
|
METHOD FOR STACKING SERIALLY-CONNECTED INTEGRATED CIRCUITS AND MULTI-CHIP DEVICE MADE FROM SAME
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12855171
|
Filing Dt:
|
08/12/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
FLASH MEMORY SYSTEM CONTROL SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12862497
|
Filing Dt:
|
08/24/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
PORT PACKET QUEUING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2011
|
Application #:
|
12878601
|
Filing Dt:
|
09/09/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
METHOD AND APPARATUS FOR SYNCHRONIZATION OF ROW AND COLUMN ACCESS OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
12879543
|
Filing Dt:
|
09/10/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
APPARATUS AND METHOD FOR CAPTURING SERIAL INPUT DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12879566
|
Filing Dt:
|
09/10/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
NON-VOLATILE MEMORY BANK AND PAGE BUFFER THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2012
|
Application #:
|
12882931
|
Filing Dt:
|
09/15/2010
|
Publication #:
|
|
Pub Dt:
|
01/06/2011
| | | | |
Title:
|
MEMORY WITH OUTPUT CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2012
|
Application #:
|
12884939
|
Filing Dt:
|
09/17/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
FLASH MULTI-LEVEL THRESHOLD DISTRIBUTION SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2011
|
Application #:
|
12888034
|
Filing Dt:
|
09/22/2010
|
Publication #:
|
|
Pub Dt:
|
03/24/2011
| | | | |
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY WITH PAGE ERASE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12892215
|
Filing Dt:
|
09/28/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
APPARATUS AND METHOD FOR PRODUCING IDENTIFIERS REGARDLESS OF MIXED DEVICE TYPE IN A SERIAL INTERCONNECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
12897456
|
Filing Dt:
|
10/04/2010
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
Title:
|
MULTI-STAGE RAMAN AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
12900395
|
Filing Dt:
|
10/07/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
CONGESTION MANAGEMENT IN A NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12903271
|
Filing Dt:
|
10/13/2010
|
Publication #:
|
|
Pub Dt:
|
02/10/2011
| | | | |
Title:
|
POWER SUPPLIES IN FLASH MEMORY DEVICES AND SYSTEMS
|
|