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Total properties:
13
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Patent #:
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Issue Dt:
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03/02/2010
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Application #:
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07377168
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Filing Dt:
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07/10/1989
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Title:
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METHOD FOR READING NON-VOLATLILE FERROELECTRIC CAPACITOR MEMORY CELL
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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07443018
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Filing Dt:
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11/29/1989
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Title:
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NON-VOLATILE MEMORY CIRCUIT USING FERROELECTRIC CAPACITOR STORAGE ELEMENT
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Patent #:
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Issue Dt:
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03/04/1997
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Application #:
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08525497
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Filing Dt:
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09/08/1995
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Title:
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INTEGRATION OF HIGH VALUE CAPACITOR WITH FERROELECTRIC MEMORY
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Patent #:
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Issue Dt:
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06/01/1999
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Application #:
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08544470
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Filing Dt:
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10/18/1995
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Title:
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METHOD OF MAKING INTEGRATION OF HIGH VALUE CAPACITOR WITH FERRO- ELECTRIC MEMORY
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10719108
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Filing Dt:
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11/21/2003
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Publication #:
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Pub Dt:
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05/26/2005
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Title:
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IMPRINT-FREE CODING FOR FERROELECTRIC NONVOLATILE COUNTERS
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10984065
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Filing Dt:
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11/09/2004
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Publication #:
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Pub Dt:
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05/11/2006
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Title:
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CIRCUIT FOR GENERATING A CENTERED REFERENCE VOLTAGE FOR A 1T/1C FERROELECTRIC MEMORY
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Patent #:
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Issue Dt:
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10/10/2006
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Application #:
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11021394
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Filing Dt:
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12/23/2004
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Publication #:
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Pub Dt:
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06/29/2006
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Title:
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NON-VOLATILE COUNTER
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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11082526
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Filing Dt:
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03/17/2005
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Publication #:
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Pub Dt:
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06/29/2006
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Title:
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COUNTING SCHEME WITH AUTOMATIC POINT-OF-REFERENCE GENERATION
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Patent #:
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Issue Dt:
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12/25/2007
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Application #:
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11426165
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Filing Dt:
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06/23/2006
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Publication #:
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Pub Dt:
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11/02/2006
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Title:
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CIRCUIT FOR GENERATING A CENTERED REFERENCE VOLTAGE FOR A 1T/1C FERROELECTRIC MEMORY
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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11611053
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Filing Dt:
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12/14/2006
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Publication #:
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Pub Dt:
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04/19/2007
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Title:
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IMPRINT-FREE CODING FOR FERROELECTRIC NONVOLATILE COUNTERS
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Patent #:
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Issue Dt:
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01/26/2010
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Application #:
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11875922
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Filing Dt:
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10/21/2007
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Publication #:
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Pub Dt:
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04/23/2009
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Title:
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2T/2C FERROELECTRIC RANDOM ACCESS MEMORY WITH COMPLEMENTARY BIT-LINE LOADS
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Patent #:
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Issue Dt:
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08/04/2009
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Application #:
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11929326
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Filing Dt:
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10/30/2007
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Publication #:
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Pub Dt:
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04/30/2009
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Title:
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FAST POWER-ON DETECT CIRCUIT WITH ACCURATE TRIP-POINTS
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Patent #:
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Issue Dt:
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12/20/2011
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Application #:
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12415918
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Filing Dt:
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03/31/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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METHOD FOR MITIGATING IMPRINT IN A FERROELECTRIC MEMORY
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