skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:029195/0114   Pages: 8
Recorded: 10/25/2012
Attorney Dkt #:21260-001001
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 138
Page 1 of 2
Pages: 1 2
1
Patent #:
5448450
Issue Dt:
09/05/1995
Application #:
07783737
Filing Dt:
10/28/1991
Title:
LEAD-ON-CHIP INTEGRATED CIRCUIT APPARATUS
2
Patent #:
5484959
Issue Dt:
01/16/1996
Application #:
07990334
Filing Dt:
12/11/1992
Title:
HIGH DENSITY LEAD-ON-PACKAGE FABRICATION METHOD AND APPARATUS
3
Patent #:
5369056
Issue Dt:
11/29/1994
Application #:
08037830
Filing Dt:
03/29/1993
Title:
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
4
Patent #:
5367766
Issue Dt:
11/29/1994
Application #:
08043196
Filing Dt:
04/05/1993
Title:
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES METHOD
5
Patent #:
5446620
Issue Dt:
08/29/1995
Application #:
08133395
Filing Dt:
10/08/1993
Title:
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES METHOD AND APPARATUS
6
Patent #:
5420751
Issue Dt:
05/30/1995
Application #:
08133397
Filing Dt:
10/08/1993
Title:
ULTRA HIGH DENSITY MODULAR INTEGRATED CIRCUIT PACKAGE
7
Patent #:
5369058
Issue Dt:
11/29/1994
Application #:
08206301
Filing Dt:
03/04/1994
Title:
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
8
Patent #:
5455740
Issue Dt:
10/03/1995
Application #:
08206829
Filing Dt:
03/07/1994
Title:
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
9
Patent #:
5581121
Issue Dt:
12/03/1996
Application #:
08280968
Filing Dt:
07/27/1994
Title:
WARP-RESISTANT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE
10
Patent #:
5561591
Issue Dt:
10/01/1996
Application #:
08289468
Filing Dt:
08/12/1994
Title:
MULTI-SIGNAL RAIL ASSEMBLY WITH IMPEDANCE CONTROL FOR A THREE-DIMENSIONAL HIGH DENSITY INTEGRATED CIRCUIT PACKAGE
11
Patent #:
5566051
Issue Dt:
10/15/1996
Application #:
08298544
Filing Dt:
08/30/1994
Title:
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES METHOD AND APPARATUS
12
Patent #:
5702985
Issue Dt:
12/30/1997
Application #:
08325719
Filing Dt:
10/19/1994
Title:
HERMETICALLY SEALED CERAMIC INTEGRATED CIRCUIT HEAT DISSIPATING PACKAGE FABRICATION METHOD
13
Patent #:
5572065
Issue Dt:
11/05/1996
Application #:
08328338
Filing Dt:
10/24/1994
Title:
HERMETICALLY SEALED CERAMIC INTEGRATED CIRCUIT HEAT DISSIPATING PACKAGE
14
Patent #:
5528075
Issue Dt:
06/18/1996
Application #:
08375874
Filing Dt:
01/20/1995
Title:
LEAD-ON-CHIP INTEGRATED CIRCUIT APPARATUS
15
Patent #:
5592364
Issue Dt:
01/07/1997
Application #:
08377578
Filing Dt:
01/24/1995
Title:
HIGH DENSITY INTEGRATED CIRCUIT MODULE WITH COMPLEX ELECTRICAL INTERCONNECT RAILS
16
Patent #:
5804870
Issue Dt:
09/08/1998
Application #:
08380541
Filing Dt:
01/30/1995
Title:
HERMETICALLY SEALED INTEGRATED CIRCUIT LEAD-ON PACKAGE CONFIGURATION
17
Patent #:
5612570
Issue Dt:
03/18/1997
Application #:
08421801
Filing Dt:
04/13/1995
Title:
CHIP STACK AND METHOD OF MAKING SAME
18
Patent #:
5550711
Issue Dt:
08/27/1996
Application #:
08436902
Filing Dt:
05/08/1995
Title:
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
19
Patent #:
5479318
Issue Dt:
12/26/1995
Application #:
08440500
Filing Dt:
05/12/1995
Title:
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES WITH TRIFURCATED DISTAL LEAD ENDS
20
Patent #:
5493476
Issue Dt:
02/20/1996
Application #:
08445848
Filing Dt:
05/22/1995
Title:
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES WITH BIFURCATED DISTAL LEAD ENDS
21
Patent #:
RE36229
Issue Dt:
06/15/1999
Application #:
08510729
Filing Dt:
11/20/1995
Title:
SIMULCAST STANDARD MULTICHIP MEMORY ADDRESSING SYSTEM
22
Patent #:
5801437
Issue Dt:
09/01/1998
Application #:
08514294
Filing Dt:
08/11/1995
Title:
THREE-DIMENSIONAL WARP-RESISTANT INTEGRATED CIRCUIT MODULE METHOD AND APPARATUS
23
Patent #:
5654877
Issue Dt:
08/05/1997
Application #:
08516848
Filing Dt:
08/18/1995
Title:
LEAD-ON-CHIP INTEGRATED CIRCUIT APPARATUS
24
Patent #:
5615475
Issue Dt:
04/01/1997
Application #:
08517485
Filing Dt:
08/21/1995
Title:
METHOD OF MANUFACTURING AN INTEGRATED PACKAGE HAVING A PAIR OF DIE ON A COMMON LEAD FRAME
25
Patent #:
5541812
Issue Dt:
07/30/1996
Application #:
08526470
Filing Dt:
09/11/1995
Title:
BUS COMMUNICATION SYSTEM FOR STACKED HIGH DENSITY INTEGRATED CIRCUIT PACKAGES HAVING AN INTERMEDIATE LEAD FRAME
26
Patent #:
5585668
Issue Dt:
12/17/1996
Application #:
08601880
Filing Dt:
02/15/1996
Title:
INTEGRATED CIRCUIT PACKAGE WITH OVERLAPPED DIE ON A COMMON LEAD FRAME
27
Patent #:
5864175
Issue Dt:
01/26/1999
Application #:
08644491
Filing Dt:
05/10/1996
Title:
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
28
Patent #:
5778522
Issue Dt:
07/14/1998
Application #:
08650721
Filing Dt:
05/20/1996
Title:
METHOD OF MANUFACTURING A HIGH DENSITY INTEGRATED CIRCUIT MODULE WITH COMPLEX ELECTRICAL INTERCONNECT RAILS HAVING ELECTRICAL INTERCONNECT STRAIN RELIEF
29
Patent #:
5843807
Issue Dt:
12/01/1998
Application #:
08686985
Filing Dt:
07/25/1996
Title:
METHOD OF MANUFACTURING AN UKTRA-HIGH DENSITY WARP-RESISTANT MEMORY MODULE
30
Patent #:
5828125
Issue Dt:
10/27/1998
Application #:
08758839
Filing Dt:
12/02/1996
Title:
ULTRA-HIGH DENSITY WARP-RESISTANT MEMORY MODULE
31
Patent #:
5783464
Issue Dt:
07/21/1998
Application #:
08798556
Filing Dt:
02/11/1997
Title:
METHOD OF FORMING A HERMETICALLY SEALED CIRCUIT LEAD-ON PACKAGE
32
Patent #:
5895232
Issue Dt:
04/20/1999
Application #:
08888850
Filing Dt:
07/07/1997
Title:
THREE-DIMENSIONAL WARP-RESISTANT INTEGRATED CIRCUIT MODULE METHOD AND APPARATUS
33
Patent #:
6049123
Issue Dt:
04/11/2000
Application #:
08935380
Filing Dt:
09/22/1997
Title:
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
34
Patent #:
6025642
Issue Dt:
02/15/2000
Application #:
08937200
Filing Dt:
09/22/1997
Title:
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
35
Patent #:
5869353
Issue Dt:
02/09/1999
Application #:
08971499
Filing Dt:
11/17/1997
Title:
MODULAR PANEL STACKING PROCESS
36
Patent #:
6190939
Issue Dt:
02/20/2001
Application #:
09115293
Filing Dt:
07/14/1998
Title:
METHOD OF MANUFACTURING A WARP RESISTANT THERMALLY CONDUCTIVE CIRCUIT PACKAGE
37
Patent #:
6282210
Issue Dt:
08/28/2001
Application #:
09133297
Filing Dt:
08/12/1998
Title:
CLOCK DRIVER WITH INSTANTANEOUSLY SELECTABLE PHASE AND METHOD FOR USE IN DATA COMMUNICATION SYSTEM
38
Patent #:
6194247
Issue Dt:
02/27/2001
Application #:
09159120
Filing Dt:
09/23/1998
Title:
WARP-RESISTENT ULTRA-THIN INTEGRATED CIRCUIT PACKAGE FABRICATION METHOD
39
Patent #:
6310392
Issue Dt:
10/30/2001
Application #:
09221350
Filing Dt:
12/28/1998
Title:
STACKED MICRO BALL GRID ARRAY PACKAGES
40
Patent #:
6205654
Issue Dt:
03/27/2001
Application #:
09222263
Filing Dt:
12/28/1998
Title:
METHOD OF MANUFACTURING A SURFACE MOUNT PACKAGE
41
Patent #:
6222737
Issue Dt:
04/24/2001
Application #:
09298664
Filing Dt:
04/23/1999
Title:
UNIVERSAL PACKAGE AND METHOD OF FORMING THE SAME
42
Patent #:
6323060
Issue Dt:
11/27/2001
Application #:
09305584
Filing Dt:
05/05/1999
Title:
STACKABLE FLEX CIRCUIT IC PACKAGE AND METHOD OF MAKING SAME
43
Patent #:
6288907
Issue Dt:
09/11/2001
Application #:
09343432
Filing Dt:
06/30/1999
Title:
HIGH DENSITY INTEGRATED CIRCUIT MODULE WITH COMPLEX ELECTRICAL INTERCONNECT RAILS HAVING ELECTRICAL INTERCONNECT STRAIN RELIEF
44
Patent #:
6168970
Issue Dt:
01/02/2001
Application #:
09434534
Filing Dt:
11/05/1999
Title:
ULTRA HIGH DENSITY INTEGRATED CIRCUIT PACKAGES
45
Patent #:
6262895
Issue Dt:
07/17/2001
Application #:
09482294
Filing Dt:
01/13/2000
Title:
STACKABLE CHIP PACKAGE WITH FLEX CARRIER
46
Patent #:
6437433
Issue Dt:
08/20/2002
Application #:
09535641
Filing Dt:
03/24/2000
Title:
CSP STACKING TECHNOLOGY USING RIGID/FLEX CONSTRUCTION
47
Patent #:
6351029
Issue Dt:
02/26/2002
Application #:
09574321
Filing Dt:
05/19/2000
Title:
Stackable flex circuit chip package and method of making same
48
Patent #:
6236565
Issue Dt:
05/22/2001
Application #:
09594363
Filing Dt:
06/15/2000
Title:
Chip stack with active cooling system
49
Patent #:
6404043
Issue Dt:
06/11/2002
Application #:
09598343
Filing Dt:
06/21/2000
Title:
PANEL STACKING OF BGA DEVICES TO FORM THREE-DIMENSIONAL MODULES
50
Patent #:
6608763
Issue Dt:
08/19/2003
Application #:
09663753
Filing Dt:
09/15/2000
Title:
STACKING SYSTEM AND METHOD
51
Patent #:
6360433
Issue Dt:
03/26/2002
Application #:
09664938
Filing Dt:
09/19/2000
Title:
method of forming universal package
52
Patent #:
6919626
Issue Dt:
07/19/2005
Application #:
09761210
Filing Dt:
01/16/2001
Publication #:
US20010005042
Pub Dt:
06/28/2001
Title:
HIGH DENSITY INTEGRATED CIRCUIT MODULE
53
Patent #:
6462408
Issue Dt:
10/08/2002
Application #:
09819171
Filing Dt:
03/27/2001
Publication #:
US20020140074
Pub Dt:
10/03/2002
Title:
CONTACT MEMBER STACKING SYSTEM AND METHOD
54
Patent #:
6472735
Issue Dt:
10/29/2002
Application #:
09826621
Filing Dt:
04/05/2001
Publication #:
US20010054758
Pub Dt:
12/27/2001
Title:
THREE-DIMENSIONAL MEMORY STACKING USING ANISOTROPIC EPOXY INTERCONNECTIONS
55
Patent #:
6426240
Issue Dt:
07/30/2002
Application #:
09888785
Filing Dt:
06/25/2001
Publication #:
US20010035572
Pub Dt:
11/01/2001
Title:
STACKABLE FLEX CIRCUIT CHIP PACKAGE AND METHOD OF MAKING SAME
56
Patent #:
6514793
Issue Dt:
02/04/2003
Application #:
09888792
Filing Dt:
06/25/2001
Publication #:
US20020048849
Pub Dt:
04/25/2002
Title:
STACKABLE FLEX CIRCUIT IC PACKAGE AND METHOD OF MAKING SAME
57
Patent #:
6627984
Issue Dt:
09/30/2003
Application #:
09912010
Filing Dt:
07/24/2001
Publication #:
US20030020153
Pub Dt:
01/30/2003
Title:
CHIP STACK WITH DIFFERING CHIP PACKAGE TYPES
58
Patent #:
6618257
Issue Dt:
09/09/2003
Application #:
09916625
Filing Dt:
07/27/2001
Title:
WIDE DATA PATH STACKING SYSTEM AND METHOD
59
Patent #:
6544815
Issue Dt:
04/08/2003
Application #:
09922977
Filing Dt:
08/06/2001
Publication #:
US20010054770
Pub Dt:
12/27/2001
Title:
PANEL STACKING OF BGA DEVICES TO FORM THREE-DIMENSIONAL MODULES
60
Patent #:
6573460
Issue Dt:
06/03/2003
Application #:
09957190
Filing Dt:
09/20/2001
Publication #:
US20030051906
Pub Dt:
03/20/2003
Title:
POST IN RING INTERCONNECT USING FOR 3-D STACKING
61
Patent #:
6576992
Issue Dt:
06/10/2003
Application #:
10005581
Filing Dt:
10/26/2001
Title:
CHIP SCALE STACKING SYSTEM AND METHOD
62
Patent #:
7081373
Issue Dt:
07/25/2006
Application #:
10016939
Filing Dt:
12/14/2001
Publication #:
US20030111736
Pub Dt:
06/19/2003
Title:
CSP CHIP STACK WITH FLEX CIRCUIT
63
Patent #:
6566746
Issue Dt:
05/20/2003
Application #:
10017553
Filing Dt:
12/14/2001
Publication #:
US20020053728
Pub Dt:
05/09/2002
Title:
PANEL STACKING OF BGA DEVICES TO FORM THREE-DIMENSIONAL MODULES
64
Patent #:
6806120
Issue Dt:
10/19/2004
Application #:
10092104
Filing Dt:
03/06/2002
Publication #:
US20020142515
Pub Dt:
10/03/2002
Title:
CONTACT MEMBER STACKING SYSTEM AND METHOD
65
Patent #:
6572387
Issue Dt:
06/03/2003
Application #:
10101039
Filing Dt:
03/19/2002
Publication #:
US20020102870
Pub Dt:
08/01/2002
Title:
FLEXIBLE CIRCUIT CONNECTOR FOR STACKED CHIP MODULE
66
Patent #:
6940729
Issue Dt:
09/06/2005
Application #:
10136890
Filing Dt:
05/02/2002
Publication #:
US20030081392
Pub Dt:
05/01/2003
Title:
INTEGRATED CIRCUIT STACKING SYSTEM AND METHOD
67
Patent #:
6908792
Issue Dt:
06/21/2005
Application #:
10263859
Filing Dt:
10/03/2002
Publication #:
US20030025211
Pub Dt:
02/06/2003
Title:
CHIP STACK WITH DIFFERING CHIP PACKAGE TYPES
68
Patent #:
6878571
Issue Dt:
04/12/2005
Application #:
10316566
Filing Dt:
12/11/2002
Publication #:
US20030127746
Pub Dt:
07/10/2003
Title:
PANEL STACKING OF BGA DEVICES TO FORM THREE-DIMENSIONAL MODULES
69
Patent #:
7485951
Issue Dt:
02/03/2009
Application #:
10435192
Filing Dt:
05/09/2003
Publication #:
US20040000707
Pub Dt:
01/01/2004
Title:
MODULARIZED DIE STACKING SYSTEM AND METHOD
70
Patent #:
7066741
Issue Dt:
06/27/2006
Application #:
10449242
Filing Dt:
05/30/2003
Publication #:
US20030203663
Pub Dt:
10/30/2003
Title:
FLEXIBLE CIRCUIT CONNECTOR FOR STACKED CHIP MODULE
71
Patent #:
6914324
Issue Dt:
07/05/2005
Application #:
10453398
Filing Dt:
06/03/2003
Publication #:
US20040000708
Pub Dt:
01/01/2004
Title:
MEMORY EXPANSION AND CHIP SCALE STACKING SYSTEM AND METHOD
72
Patent #:
6856010
Issue Dt:
02/15/2005
Application #:
10620157
Filing Dt:
07/14/2003
Publication #:
US20040108584
Pub Dt:
06/10/2004
Title:
THIN SCALE OUTLINE PACKAGE
73
Patent #:
7026708
Issue Dt:
04/11/2006
Application #:
10631886
Filing Dt:
07/11/2003
Publication #:
US20040052060
Pub Dt:
03/18/2004
Title:
LOW PROFILE CHIP SCALE STACKING SYSTEM AND METHOD
74
Patent #:
6955945
Issue Dt:
10/18/2005
Application #:
10709732
Filing Dt:
05/25/2004
Publication #:
US20040197956
Pub Dt:
10/07/2004
Title:
MEMORY EXPANSION AND CHIP SCALE STACKING SYSTEM AND METHOD
75
Patent #:
6992501
Issue Dt:
01/31/2006
Application #:
10800816
Filing Dt:
03/15/2004
Publication #:
US20050200380
Pub Dt:
09/15/2005
Title:
REFLECTION-CONTROL SYSTEM AND METHOD
76
Patent #:
7542304
Issue Dt:
06/02/2009
Application #:
10804452
Filing Dt:
03/19/2004
Publication #:
US20050057911
Pub Dt:
03/17/2005
Title:
MEMORY EXPANSION AND INTEGRATED CIRCUIT STACKING SYSTEM AND METHOD
77
Patent #:
6893899
Issue Dt:
05/17/2005
Application #:
10814531
Filing Dt:
03/31/2004
Publication #:
US20040183206
Pub Dt:
09/23/2004
Title:
CONTACT MEMBER STACKING SYSTEM AND METHOD
78
Patent #:
6956284
Issue Dt:
10/18/2005
Application #:
10814532
Filing Dt:
03/31/2004
Publication #:
US20040183183
Pub Dt:
09/23/2004
Title:
INTEGRATED CIRCUIT STACKING SYSTEM AND METHOD
79
Patent #:
7371609
Issue Dt:
05/13/2008
Application #:
10836855
Filing Dt:
04/30/2004
Publication #:
US20040201091
Pub Dt:
10/14/2004
Title:
STACKED MODULE SYSTEMS AND METHODS
80
Patent #:
7094632
Issue Dt:
08/22/2006
Application #:
10873847
Filing Dt:
06/22/2004
Publication #:
US20040229402
Pub Dt:
11/18/2004
Title:
LOW PROFILE CHIP SCALE STACKING SYSTEM AND METHOD
81
Patent #:
RE39628
Issue Dt:
05/15/2007
Application #:
10900073
Filing Dt:
07/27/2004
Title:
STACKABLE FLEX CIRCUIT IC PACKAGE AND METHOD OF MAKING SAME
82
Patent #:
7053478
Issue Dt:
05/30/2006
Application #:
10914483
Filing Dt:
08/09/2004
Publication #:
US20050018412
Pub Dt:
01/27/2005
Title:
PITCH CHANGE AND CHIP SCALE STACKING SYSTEM
83
Patent #:
7606048
Issue Dt:
10/20/2009
Application #:
10958584
Filing Dt:
10/05/2004
Publication #:
US20050041402
Pub Dt:
02/24/2005
Title:
INTEGRATED CIRCUIT STACKING SYSTEM
84
Patent #:
7586758
Issue Dt:
09/08/2009
Application #:
10958924
Filing Dt:
10/05/2004
Publication #:
US20050041403
Pub Dt:
02/24/2005
Title:
INTEGRATED CIRCUIT STACKING SYSTEM
85
Patent #:
7335975
Issue Dt:
02/26/2008
Application #:
10958934
Filing Dt:
10/05/2004
Publication #:
US20050041404
Pub Dt:
02/24/2005
Title:
INTEGRATED CIRCUIT STACKING SYSTEM AND METHOD
86
Patent #:
RE41039
Issue Dt:
12/15/2009
Application #:
10974046
Filing Dt:
10/26/2004
Title:
STACKABLE CHIP PACKAGE WITH FLEX CARRIER
87
Patent #:
7480152
Issue Dt:
01/20/2009
Application #:
11005992
Filing Dt:
12/07/2004
Publication #:
US20060050496
Pub Dt:
03/09/2006
Title:
THIN MODULE SYSTEM AND METHOD
88
Patent #:
7511968
Issue Dt:
03/31/2009
Application #:
11007551
Filing Dt:
12/08/2004
Publication #:
US20060050497
Pub Dt:
03/09/2006
Title:
BUFFERED THIN MODULE SYSTEM AND METHOD
89
Patent #:
7180167
Issue Dt:
02/20/2007
Application #:
11011469
Filing Dt:
12/14/2004
Publication #:
US20050146031
Pub Dt:
07/07/2005
Title:
LOW PROFILE STACKING SYSTEM AND METHOD
90
Patent #:
7309914
Issue Dt:
12/18/2007
Application #:
11039615
Filing Dt:
01/20/2005
Publication #:
US20060157842
Pub Dt:
07/20/2006
Title:
INVERTED CSP STACKING SYSTEM AND METHOD
91
Patent #:
7468893
Issue Dt:
12/23/2008
Application #:
11058979
Filing Dt:
02/16/2005
Publication #:
US20060049500
Pub Dt:
03/09/2006
Title:
THIN MODULE SYSTEM AND METHOD
92
Patent #:
7202555
Issue Dt:
04/10/2007
Application #:
11074026
Filing Dt:
03/08/2005
Publication #:
US20050146011
Pub Dt:
07/07/2005
Title:
PITCH CHANGE AND CHIP SCALE STACKING SYSTEM AND METHOD
93
Patent #:
7606040
Issue Dt:
10/20/2009
Application #:
11077952
Filing Dt:
03/11/2005
Publication #:
US20080278901
Pub Dt:
11/13/2008
Title:
MEMORY MODULE SYSTEM AND METHOD
94
Patent #:
7606049
Issue Dt:
10/20/2009
Application #:
11125018
Filing Dt:
05/09/2005
Publication #:
US20060049502
Pub Dt:
03/09/2006
Title:
MODULE THERMAL MANAGEMENT SYSTEM AND METHOD
95
Patent #:
7033861
Issue Dt:
04/25/2006
Application #:
11131812
Filing Dt:
05/18/2005
Title:
STACKED MODULE SYSTEMS AND METHOD
96
Patent #:
7423885
Issue Dt:
09/09/2008
Application #:
11157565
Filing Dt:
06/21/2005
Publication #:
US20060050498
Pub Dt:
03/09/2006
Title:
DIE MODULE SYSTEM
97
Patent #:
7595550
Issue Dt:
09/29/2009
Application #:
11173445
Filing Dt:
07/01/2005
Publication #:
US20050263872
Pub Dt:
12/01/2005
Title:
FLEX-BASED CIRCUIT MODULE
98
Patent #:
7606050
Issue Dt:
10/20/2009
Application #:
11187269
Filing Dt:
07/22/2005
Publication #:
US20060050592
Pub Dt:
03/09/2006
Title:
COMPACT MODULE SYSTEM AND METHOD
99
Patent #:
7495334
Issue Dt:
02/24/2009
Application #:
11197267
Filing Dt:
08/04/2005
Publication #:
US20050280135
Pub Dt:
12/22/2005
Title:
STACKING SYSTEM AND METHOD
100
Patent #:
7524703
Issue Dt:
04/28/2009
Application #:
11221597
Filing Dt:
09/07/2005
Publication #:
US20060008945
Pub Dt:
01/12/2006
Title:
INTEGRATED CIRCUIT STACKING SYSTEM AND METHOD
Assignor
1
ENTORIAN GP LLC
Exec Dt:
07/14/2010
Assignee
1
ENTORIAN TECHNOLOGIES INC.
4030 W. BRAKER LANE
BLDG 2-100
AUSTIN, TEXAS 78759
Correspondence name and address
J. SCOTT DENKO
1501 SOUTH MOPAC EXPY, SUITE A315
AUSTIN, TX 78746

Search Results as of: 05/11/2024 02:31 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT