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Total properties:
24
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Patent #:
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|
Issue Dt:
|
10/14/2003
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Application #:
|
09475400
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Filing Dt:
|
12/30/1999
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|
Title:
|
MULTI-SCALE PROGRAMMABLE ARRAY
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|
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Patent #:
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|
Issue Dt:
|
07/30/2002
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Application #:
|
09550919
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Filing Dt:
|
04/17/2000
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Title:
|
CARRY LOOKAHEAD FOR PROGRAMMABLE LOGIC ARRAY
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|
|
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Patent #:
|
|
Issue Dt:
|
03/29/2005
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Application #:
|
09569741
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Filing Dt:
|
05/11/2000
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Title:
|
APPARATUS AND METHOD FOR SELF TESTING PROGRAMMABLE LOGIC ARRAYS
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Patent #:
|
|
Issue Dt:
|
09/18/2001
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Application #:
|
09606791
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Filing Dt:
|
06/28/2000
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Title:
|
Efficient and robust random access memory cell suitable for programmable logic configuration control
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Patent #:
|
NONE
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Issue Dt:
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Application #:
|
09738055
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Filing Dt:
|
12/14/2000
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|
Publication #:
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Pub Dt:
|
06/20/2002
| | | | |
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Title:
|
Built-in self test for a programmable logic device using linear feedback shift registers and hierarchical signature generation
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Patent #:
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|
Issue Dt:
|
06/13/2006
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Application #:
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09883976
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Filing Dt:
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06/19/2001
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Publication #:
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Pub Dt:
|
12/06/2001
| | | | |
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Title:
|
MULTI-SCALE PROGRAMMABLE ARRAY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
07/09/2002
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Application #:
|
09896406
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Filing Dt:
|
06/28/2001
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|
Publication #:
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Pub Dt:
|
01/03/2002
| | | | |
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Title:
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EFFICIENT AND ROBUST RANDOM ACCESS MEMORY CELL SUITABLE FOR PROGRAMMABLE LOGIC CONFIGURATION CONTROL
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|
|
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Patent #:
|
|
Issue Dt:
|
02/15/2005
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Application #:
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10067151
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Filing Dt:
|
01/29/2002
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|
Title:
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DESIGN METHODOLOGY FOR MERGING PROGRAMMABLE LOGIC INTO A CUSTOM IC
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|
|
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Patent #:
|
|
Issue Dt:
|
06/01/2004
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Application #:
|
10206872
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Filing Dt:
|
07/26/2002
|
|
Title:
|
PROGRAMMABLE LOGIC CORE ADAPTER
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/11/2007
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Application #:
|
10394824
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Filing Dt:
|
03/21/2003
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Publication #:
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Pub Dt:
|
09/23/2004
| | | | |
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Title:
|
TRANSITIVE PROCESSING UNIT FOR PERFORMING COMPLEX OPERATIONS
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|
|
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Patent #:
|
|
Issue Dt:
|
02/14/2006
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Application #:
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10404680
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Filing Dt:
|
03/31/2003
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|
Publication #:
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|
Pub Dt:
|
09/30/2004
| | | | |
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Title:
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SYSTEM AND METHOD FOR EFFICIENTLY MAPPING HETEROGENEOUS OBJECTS ONTO AN ARRAY OF HETEROGENEOUS PROGRAMMABLE LOGIC RESOURCES
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|
|
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Patent #:
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|
Issue Dt:
|
09/15/2009
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Application #:
|
10404706
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Filing Dt:
|
03/31/2003
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|
Publication #:
|
|
Pub Dt:
|
09/30/2004
| | | | |
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Title:
|
EXTENSION ADAPTER
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|
|
|
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Patent #:
|
|
Issue Dt:
|
05/13/2008
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Application #:
|
10630542
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Filing Dt:
|
07/29/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
|
Title:
|
DEFINING INSTRUCTION EXTENSIONS IN A STANDARD PROGRAMMING LANGUAGE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
09/02/2008
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Application #:
|
10686882
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Filing Dt:
|
10/15/2003
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|
Publication #:
|
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Pub Dt:
|
02/03/2005
| | | | |
|
Title:
|
INSTRUCTION SET FOR EFFICIENT BIT STREAM AND BYTE STREAM I/O
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
10732392
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Filing Dt:
|
12/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
02/03/2005
| | | | |
|
Title:
|
RECONFIGURABLE INSTRUCTION SET COMPUTING
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|
|
|
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Patent #:
|
|
Issue Dt:
|
08/25/2009
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Application #:
|
10750714
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Filing Dt:
|
12/31/2003
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|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
|
Title:
|
SYSTEMS AND METHODS FOR SOFTWARE EXTENSIBLE MULTI-PROCESSING
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/26/2007
|
Application #:
|
10931491
|
Filing Dt:
|
08/31/2004
|
|
Title:
|
SYSTEM, APPARATUS AND METHOD FOR DATA PATH ROUTING CONFIGURABLE TO PERFORM DYNAMIC BIT PERMUTATIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/2009
|
Application #:
|
10971372
|
Filing Dt:
|
10/22/2004
|
|
Title:
|
SYSTEM, APPARATUS AND METHOD FOR IMPLEMENTING MULTIFUNCTIONAL MEMORY IN RECONFIGURABLE DATA PATH PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11021247
|
Filing Dt:
|
12/21/2004
|
|
Publication #:
|
|
Pub Dt:
|
05/26/2005
| | | | |
|
Title:
|
SYSTEMS AND METHODS FOR SELECTING INPUT/OUTPUT CONFIGURATION IN AN INTEGRATED CIRCUIT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11099280
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Filing Dt:
|
04/04/2005
|
|
Publication #:
|
|
Pub Dt:
|
08/04/2005
| | | | |
|
Title:
|
VIDEO PROCESSING SYSTEM WITH RECONFIGURABLE INSTRUCTIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
|
Application #:
|
11129146
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Filing Dt:
|
05/12/2005
|
|
Publication #:
|
|
Pub Dt:
|
11/16/2006
| | | | |
|
Title:
|
LONG INSTRUCTION WORD PROCESSING WITH INSTRUCTION EXTENSIONS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2009
|
Application #:
|
11204555
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Filing Dt:
|
08/15/2005
|
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
|
Title:
|
PROGRAMMABLE LOGIC CONFIGURATION FOR INSTRUCTION EXTENSIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
11768113
|
Filing Dt:
|
06/25/2007
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
|
Title:
|
SYSTEM, APPARATUS AND METHOD FOR DATA PATH ROUTING CONFIGURABLE TO PERFORM DYNAMIC BIT PERMUTATIONS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12561184
|
Filing Dt:
|
09/16/2009
|
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
|
Title:
|
Programmable Logic Configuration for Instruction Extensions
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|
