|
Total properties:
98
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|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2016
|
Application #:
|
13632549
|
Filing Dt:
|
10/01/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2014
| | | | |
|
Title:
|
Method and System for Automatically Controlling the Insertion of Control Word in CPRI Daisy Chain Configuration
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|
|
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|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13632616
|
Filing Dt:
|
10/01/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2014
| | | | |
|
Title:
|
Multiply and Accumulate Feedback
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13633124
|
Filing Dt:
|
10/01/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2014
| | | | |
|
Title:
|
SPLIT GATE FLASH CELL
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13643358
|
Filing Dt:
|
10/25/2012
|
|
Publication #:
|
|
Pub Dt:
|
02/28/2013
| | | | |
|
Title:
|
INTEGRATED CIRCUIT DEVICE, SIGNAL PROCESSING SYSTEM AND METHOD FOR MANAGING POWER RESOURCES OF A SIGNAL PROCESSING SYSTEM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13645050
|
Filing Dt:
|
10/04/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/10/2014
| | | | |
|
Title:
|
OPPORTUNISTIC CACHE REPLACEMENT POLICY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
|
Application #:
|
13647951
|
Filing Dt:
|
10/09/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/10/2014
| | | | |
|
Title:
|
LATENT SLOW BIT DETECTION FOR NON-VOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13648501
|
Filing Dt:
|
10/10/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/10/2014
| | | | |
|
Title:
|
COMPILER OPTIMIZED SAFETY MECHANISM
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13649461
|
Filing Dt:
|
10/11/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2014
| | | | |
|
Title:
|
Method and System for Low Power Transmission and Data Alignment
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
10/28/2014
|
Application #:
|
13650138
|
Filing Dt:
|
10/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2014
| | | | |
|
Title:
|
TIMING EVENT GENERATION CIRCUIT FOR MOBILE COMMUNICATION DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2014
|
Application #:
|
13650141
|
Filing Dt:
|
10/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2014
| | | | |
|
Title:
|
PROCESSOR SWITCHABLE BETWEEN TEST AND DEBUG MODES
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/16/2014
|
Application #:
|
13650872
|
Filing Dt:
|
10/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2014
| | | | |
|
Title:
|
CHIP-LEVEL HUMIDITY PROTECTION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
|
Application #:
|
13651995
|
Filing Dt:
|
10/15/2012
|
|
Title:
|
ENCAPSULANT FOR A SEMICONDUCTOR DEVICE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/18/2014
|
Application #:
|
13653155
|
Filing Dt:
|
10/16/2012
|
|
Title:
|
ELECTRONIC CIRCUITS WITH VARIABLE ATTENUATORS AND METHODS OF THEIR OPERATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/07/2015
|
Application #:
|
13656073
|
Filing Dt:
|
10/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2014
| | | | |
|
Title:
|
FLEXIBLE CONTROL MECHANISM FOR STORE GATHERING IN A WRITE BUFFER
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|
|
|
Patent #:
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|
Issue Dt:
|
06/16/2015
|
Application #:
|
13656103
|
Filing Dt:
|
10/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2014
| | | | |
|
Title:
|
RESURF HIGH VOLTAGE DIODE
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|
|
|
|
Patent #:
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|
Issue Dt:
|
05/26/2015
|
Application #:
|
13656122
|
Filing Dt:
|
10/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2014
| | | | |
|
Title:
|
HIGH VOLTAGE DIODE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2014
|
Application #:
|
13656253
|
Filing Dt:
|
10/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2014
| | | | |
|
Title:
|
DYNAMICALLY BIASED OUTPUT STRUCTURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13656551
|
Filing Dt:
|
10/19/2012
|
|
Title:
|
AMPLIFIER CALIBRATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
|
Application #:
|
13657250
|
Filing Dt:
|
10/22/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2014
| | | | |
|
Title:
|
PACKAGING FOR SEMICONDUCTOR SENSOR DEVICES AND METHODS
|
|
|
|
|
Patent #:
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|
Issue Dt:
|
07/01/2014
|
Application #:
|
13660243
|
Filing Dt:
|
10/25/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
PACKAGED INTEGRATED CIRCUIT HAVING LARGE SOLDER PADS AND METHOD FOR FORMING
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|
|
|
|
Patent #:
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|
Issue Dt:
|
11/26/2013
|
Application #:
|
13661131
|
Filing Dt:
|
10/26/2012
|
|
Title:
|
VIA PLACEMENT AND ELECTRONIC CIRCUIT DESIGN PROCESSING METHOD AND ELECTRONIC CIRCUIT DESIGN UTILIZING SAME
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
13661157
|
Filing Dt:
|
10/26/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
METHOD OF MAKING A LOGIC TRANSISTOR AND A NON-VOLATILE MEMORY (NVM) CELL
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13661377
|
Filing Dt:
|
10/26/2012
|
|
Title:
|
METHODS AND STRUCTURES FOR CAPPING A STRUCTURE WITH A PROTECTIVE COATING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2014
|
Application #:
|
13661861
|
Filing Dt:
|
10/26/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
SRAM WITH IMPROVED WRITE OPERATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/16/2014
|
Application #:
|
13663462
|
Filing Dt:
|
10/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH THERMAL DISSIPATION LEAD FRAME
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|
|
|
|
Patent #:
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|
Issue Dt:
|
03/03/2015
|
Application #:
|
13663636
|
Filing Dt:
|
10/30/2012
|
|
Publication #:
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|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
CONTROL GATE WORD LINE DRIVER CIRCUIT FOR MULTIGATE MEMORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2015
|
Application #:
|
13663991
|
Filing Dt:
|
10/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
PRODUCTION-TEST DIE TEMPERATURE MEASUREMENT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/15/2015
|
Application #:
|
13663998
|
Filing Dt:
|
10/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
SENSOR SINGLE TRACK TRIM USING STATIONARY HARDWARE AND FIELDS
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|
|
|
Patent #:
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|
Issue Dt:
|
05/03/2016
|
Application #:
|
13664565
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR ASSIGNING A MESSAGE
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|
|
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|
Patent #:
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|
Issue Dt:
|
06/17/2014
|
Application #:
|
13665256
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
SYSTEMS AND METHODS FOR DETERMINING AGING DAMAGE FOR SEMICONDUCTOR DEVICES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2014
|
Application #:
|
13665518
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
GATE DRIVER WITH DESATURATION DETECTION AND ACTIVE CLAMPING
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|
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|
Patent #:
|
|
Issue Dt:
|
07/08/2014
|
Application #:
|
13665665
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
LDMOS Device with Minority Carrier Shunt Region
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/15/2014
|
Application #:
|
13665840
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
METHODS AND INTEGRATED CIRCUIT PACKAGE FOR SENSING FLUID PROPERTIES
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|
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|
Patent #:
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|
Issue Dt:
|
08/02/2016
|
Application #:
|
13665864
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR A TUNABLE DRIVER CIRCUIT
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|
|
|
Patent #:
|
NONE
|
Issue Dt:
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|
Application #:
|
13665902
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
LCD DRIVER VERIFICATION SYSTEM
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|
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|
Patent #:
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|
Issue Dt:
|
07/08/2014
|
Application #:
|
13665903
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
RELAXATION OSCILLATOR
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
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|
Application #:
|
13665906
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
MEMORY CONTROLLER FOR MEMORY DEVICE
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|
|
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|
Patent #:
|
|
Issue Dt:
|
01/20/2015
|
Application #:
|
13665917
|
Filing Dt:
|
10/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
MEMORY DEVICE REDUNDANCY MANAGEMENT SYSTEM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
02/04/2014
|
Application #:
|
13665921
|
Filing Dt:
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10/31/2012
|
|
Title:
|
SYSTEM FOR GENERATING GATED CLOCK SIGNALS
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|
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|
Patent #:
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|
Issue Dt:
|
07/21/2015
|
Application #:
|
13666289
|
Filing Dt:
|
11/01/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
|
Title:
|
Vector NCO and Twiddle Factor Generator
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/30/2014
|
Application #:
|
13668496
|
Filing Dt:
|
11/05/2012
|
|
Publication #:
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|
Pub Dt:
|
05/08/2014
| | | | |
|
Title:
|
DELAY COMPENSATED CONTINUOUS TIME SIGMA DELTA ANALOG-TO-DIGITAL CONVERTER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2017
|
Application #:
|
13668951
|
Filing Dt:
|
11/05/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2014
| | | | |
|
Title:
|
HARDWARE-BASED MEMORY INITIALIZATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/22/2015
|
Application #:
|
13671503
|
Filing Dt:
|
11/07/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND DRIVER CIRCUIT WITH AN ACTIVE DEVICE AND ISOLATION STRUCTURE INTERCONNECTED THROUGH A DIODE CIRCUIT, AND METHOD OF MANUFACTURE THEREOF
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|
Patent #:
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|
Issue Dt:
|
07/11/2017
|
Application #:
|
13671506
|
Filing Dt:
|
11/07/2012
|
|
Publication #:
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|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND DRIVER CIRCUIT WITH AN ACTIVE DEVICE AND ISOLATION STRUCTURE INTERCONNECTED THROUGH A RESISTOR CIRCUIT, AND METHOD OF MANUFACTURE THEREOF
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|
Patent #:
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|
Issue Dt:
|
04/28/2015
|
Application #:
|
13671623
|
Filing Dt:
|
11/08/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2014
| | | | |
|
Title:
|
PROTECTION DEVICE AND RELATED FABRICATION METHODS
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|
Patent #:
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|
Issue Dt:
|
04/08/2014
|
Application #:
|
13671951
|
Filing Dt:
|
11/08/2012
|
|
Publication #:
|
|
Pub Dt:
|
03/14/2013
| | | | |
|
Title:
|
OFFSET ERROR AUTOMATIC CALIBRATION INTEGRATED CIRCUIT
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|
Patent #:
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|
Issue Dt:
|
06/30/2015
|
Application #:
|
13673212
|
Filing Dt:
|
11/09/2012
|
|
Publication #:
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|
Pub Dt:
|
05/15/2014
| | | | |
|
Title:
|
WETTABLE LEAD ENDS ON A FLAT-PACK NO-LEAD MICROELECTRONIC PACKAGE
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|
Patent #:
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|
Issue Dt:
|
12/29/2015
|
Application #:
|
13674367
|
Filing Dt:
|
11/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
|
Title:
|
PROGRAMMING A NON-VOLATILE MEMORY (NVM) SYSTEM HAVING ERROR CORRECTION CODE (ECC)
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|
Patent #:
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|
Issue Dt:
|
10/28/2014
|
Application #:
|
13675008
|
Filing Dt:
|
11/13/2012
|
|
Publication #:
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|
Pub Dt:
|
05/15/2014
| | | | |
|
Title:
|
TRACE ROUTING WITHIN A SEMICONDUCTOR PACKAGE SUBSTRATE
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|
Patent #:
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|
Issue Dt:
|
01/05/2016
|
Application #:
|
13677800
|
Filing Dt:
|
11/15/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
|
Title:
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INTEGRATED CIRCUIT WITH DEGRADATION MONITORING
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|
Patent #:
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|
Issue Dt:
|
03/17/2015
|
Application #:
|
13678117
|
Filing Dt:
|
11/15/2012
|
|
Publication #:
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|
Pub Dt:
|
05/15/2014
| | | | |
|
Title:
|
TEMPERATURE DEPENDENT TIMER CIRCUIT
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|
Patent #:
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|
Issue Dt:
|
09/15/2015
|
Application #:
|
13678789
|
Filing Dt:
|
11/16/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
TABLE MODEL CIRCUIT SIMULATION ACCELERATION USING MODEL CACHING
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|
Patent #:
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|
Issue Dt:
|
07/14/2015
|
Application #:
|
13679481
|
Filing Dt:
|
11/16/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
DYNAMIC READ SCHEME FOR HIGH RELIABILITY HIGH PERFORMANCE FLASH MEMORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2016
|
Application #:
|
13679515
|
Filing Dt:
|
11/16/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
NON-VOLATILE MEMORY ROBUST START-UP USING ANALOG-TO-DIGITAL CONVERTER
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|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13681401
|
Filing Dt:
|
11/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2014
| | | | |
|
Title:
|
SEMICONDUCTOR WAFER DICING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13681406
|
Filing Dt:
|
11/19/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2014
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR PERFORMING SCAN TEST
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2014
|
Application #:
|
13681437
|
Filing Dt:
|
11/20/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE PACKAGE WITH CAP ELEMENT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2015
|
Application #:
|
13681956
|
Filing Dt:
|
11/20/2012
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|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
LOW-POWER VOLTAGE TAMPER DETECTION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13682350
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Filing Dt:
|
11/20/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
FLEXIBLE CONTROL MECHANISM FOR STORE GATHERING IN A WRITE BUFFER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
13682367
|
Filing Dt:
|
11/20/2012
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|
Publication #:
|
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Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
FLEXIBLE CONTROL MECHANISM FOR STORE GATHERING IN A WRITE BUFFER
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|
|
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|
Patent #:
|
|
Issue Dt:
|
03/22/2016
|
Application #:
|
13682558
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Filing Dt:
|
11/20/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
INTEGRATED CIRCUIT ELECTRICAL PROTECTION DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2016
|
Application #:
|
13682604
|
Filing Dt:
|
11/20/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
TRIGGER CIRCUIT AND METHOD FOR IMPROVED TRANSIENT IMMUNITY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2014
|
Application #:
|
13682749
|
Filing Dt:
|
11/21/2012
|
|
Publication #:
|
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Pub Dt:
|
02/06/2014
| | | | |
|
Title:
|
LOW POWER SCAN FLIP-FLOP CELL
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|
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
13682751
|
Filing Dt:
|
11/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
02/27/2014
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR DEBLOCK FILTERING CODED MACROBLOCKS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2015
|
Application #:
|
13682755
|
Filing Dt:
|
11/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
SYSTEM FOR DATA TRANSFER BETWEEN ASYNCHRONOUS CLOCK DOMAINS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2017
|
Application #:
|
13684840
|
Filing Dt:
|
11/26/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/04/2013
| | | | |
|
Title:
|
TEST STRUCTURE ACTIVATED BY PROBE NEEDLE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2016
|
Application #:
|
13686102
|
Filing Dt:
|
11/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
ELECTRONIC DEVICES WITH CAVITY-TYPE, PERMEABLE MATERIAL FILLED PACKAGES, AND METHODS OF THEIR MANUFACTURE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2014
|
Application #:
|
13686889
|
Filing Dt:
|
11/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
VOLTAGE RAMP-UP PROTECTION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2014
|
Application #:
|
13686901
|
Filing Dt:
|
11/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
METHOD AND INTEGRATED CIRCUIT THAT PROVIDES TRACKING BETWEEN MULTIPLE REGULATED VOLTAGES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2016
|
Application #:
|
13687299
|
Filing Dt:
|
11/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
INERTIAL SENSOR AND METHOD OF LEVITATION EFFECT COMPENSATION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13687424
|
Filing Dt:
|
11/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
SPRING FOR MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICE
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2016
|
Application #:
|
13688820
|
Filing Dt:
|
11/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
ELECTRONIC DEVICES WITH EMBEDDED DIE INTERCONNECT STRUCTURES, AND METHODS OF MANUFACTURE THEREOF
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13689034
|
Filing Dt:
|
11/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2015
|
Application #:
|
13689037
|
Filing Dt:
|
11/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/04/2013
| | | | |
|
Title:
|
SYSTEMS AND METHODS FOR DELIVERING POWER IN RESPONSE TO A CONNECTION EVENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13689043
|
Filing Dt:
|
11/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
SYSTEMS AND METHODS FOR CONTROLLING POWER IN SEMICONDUCTOR CIRCUITS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13689274
|
Filing Dt:
|
11/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
|
Title:
|
METHODS FOR THE FABRICATION OF SEMICONDUCTOR DEVICES INCLUDING SUB-ISOLATION BURIED LAYERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2016
|
Application #:
|
13689331
|
Filing Dt:
|
11/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
|
Title:
|
MEMORY COLUMN DROWSY CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13689424
|
Filing Dt:
|
11/29/2012
|
|
Title:
|
PROVIDING AN AUTOMATIC OPTICAL INSPECTION FEATURE FOR SOLDER JOINTS ON SEMICONDUCTOR PACKAGES
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13689845
|
Filing Dt:
|
11/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE PACKAGES PROVIDING ENHANCED EXPOSED TOE FILLETS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
13690046
|
Filing Dt:
|
11/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
|
Title:
|
OVER VOLTAGE PROTECTION FOR A THIN OXIDE LOAD CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2014
|
Application #:
|
13690336
|
Filing Dt:
|
11/30/2012
|
|
Title:
|
AC COUPLED LEVEL SHIFTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2016
|
Application #:
|
13690888
|
Filing Dt:
|
11/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2014
| | | | |
|
Title:
|
RANDOM ACCESS OF A CACHE PORTION USING AN ACCESS MODULE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
13695670
|
Filing Dt:
|
11/01/2012
|
|
Publication #:
|
|
Pub Dt:
|
03/07/2013
| | | | |
|
Title:
|
INTEGRATED CIRCUIT, ELECTRONIC DEVICE AND ESD PROTECTION THEREFOR
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
13698122
|
Filing Dt:
|
11/15/2012
|
|
Publication #:
|
|
Pub Dt:
|
03/07/2013
| | | | |
|
Title:
|
POWER SWITCHING APPARATUS AND METHOD FOR IMPROVING CURRENT SENSE ACCURACY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2015
|
Application #:
|
13701303
|
Filing Dt:
|
11/30/2012
|
|
Publication #:
|
|
Pub Dt:
|
03/28/2013
| | | | |
|
Title:
|
INTEGRATED CIRCUIT DEVICE, ELECTRONIC DEVICE AND METHOD FOR DETECTING TIMING VIOLATIONS WITHIN A CLOCK SIGNAL
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13709049
|
Filing Dt:
|
12/09/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/18/2013
| | | | |
|
Title:
|
EMBEDDED LOGIC ANALYZER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
13709103
|
Filing Dt:
|
12/10/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2014
| | | | |
|
Title:
|
REDUCING THE POWER CONSUMPTION OF MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2014
|
Application #:
|
13712051
|
Filing Dt:
|
12/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2014
| | | | |
|
Title:
|
INTEGRATED CIRCUITS INCLUDING INTEGRATED PASSIVE DEVICES AND METHODS OF MANUFACTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2015
|
Application #:
|
13712070
|
Filing Dt:
|
12/12/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2014
| | | | |
|
Title:
|
SYSTEMS WITH ADJUSTABLE SAMPLING PARAMETERS AND METHODS OF THEIR OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2014
|
Application #:
|
13714415
|
Filing Dt:
|
12/14/2012
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2014
| | | | |
|
Title:
|
BAND GAP REFERENCE VOLTAGE GENERATOR
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13716193
|
Filing Dt:
|
12/16/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2014
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR CLEANING BOND WIRE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2014
|
Application #:
|
13716194
|
Filing Dt:
|
12/16/2012
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
|
Title:
|
RAIL TO RAIL DIFFERENTIAL BUFFER INPUT STAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
|
Application #:
|
13717646
|
Filing Dt:
|
12/17/2012
|
|
Title:
|
MULTI-VOLTAGE DOMAIN CIRCUIT DESIGN VERIFICATION METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2015
|
Application #:
|
13718081
|
Filing Dt:
|
12/18/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
|
Title:
|
SEMICONDUCTOR PACKAGE SIGNAL ROUTING USING CONDUCTIVE VIAS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2014
|
Application #:
|
13718598
|
Filing Dt:
|
12/18/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
|
Title:
|
REDUCING MEMS STICTION BY INTRODUCTION OF A CARBON BARRIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2016
|
Application #:
|
13718614
|
Filing Dt:
|
12/18/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
|
Title:
|
REDUCING MEMS STICTION BY DEPOSITION OF NANOCLUSTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2014
|
Application #:
|
13723207
|
Filing Dt:
|
12/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2014
| | | | |
|
Title:
|
SYSTEM FOR OPTIMIZING NUMBER OF DIES PRODUCED ON A WAFER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13731242
|
Filing Dt:
|
12/31/2012
|
|
Publication #:
|
|
Pub Dt:
|
06/06/2013
| | | | |
|
Title:
|
METHODS OF FORMING 3-D CIRCUITS WITH INTEGRATED PASSIVE DEVICES
|
|
