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Patent Assignment Details

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Reel/Frame:	030380/0653			Pages:	7
		Recorded:	05/09/2013
Attorney Dkt #:	CPU ACQUISITION SUB, INC.
Conveyance:	MERGER (SEE DOCUMENT FOR DETAILS).

Total properties: 11

Patent #:	5832253	Issue Dt:	11/03/1998	Application #:	08163442	Filing Dt:	12/06/1993
Title:	MULTIPROCESSORS SYSTEM FOR SELECTIVELY WIRE-ORING A COMBINATION OF SIGNAL LINES AND THEREAFTER USING ONE LINE TO CONTROL THE RUNNING OR STALLING OF A SELECTED PROCESSOR

Patent #:	5499376	Issue Dt:	03/12/1996	Application #:	08163460	Filing Dt:	12/06/1993
Title:	HIGH SPEED MASK AND LOGICAL COMBINATION OPERATIONS FOR PARALLEL PROCESSOR UNITS

Patent #:	5615356	Issue Dt:	03/25/1997	Application #:	08334769	Filing Dt:	11/04/1994
Title:	METHOD AND APPARATUS FOR INTERACTIVELY DISPLAYING SIGNAL INFORMATION DURING COMPUTER SIMULATION OF AN ELECTRICAL CIRCUIT

Patent #:	5761455	Issue Dt:	06/02/1998	Application #:	08384293	Filing Dt:	02/06/1995
Title:	DYNAMIC BUS RECONFIGURATION LOGIC

Patent #:	5652907	Issue Dt:	07/29/1997	Application #:	08470675	Filing Dt:	06/06/1995
Title:	HIGH SPEED MASK AND LOGICAL COMBINATION OPERATIONS FOR PARALLEL PROCESSOR UNITS

Patent #:	5848276	Issue Dt:	12/08/1998	Application #:	08554671	Filing Dt:	11/08/1995
Title:	HIGH SPEED, DIRECT REGISTER ACCESS OPERATION FOR PARALLEL PROCESSING UNITS

Patent #:	5838961	Issue Dt:	11/17/1998	Application #:	08724198	Filing Dt:	10/01/1996
Title:	METHOD OF OPERATION AND APPARATUS FOR OPTIMIZING EXECUTION OF SHORT INSTRUCTION BRANCHES

Patent #:	5852564	Issue Dt:	12/22/1998	Application #:	08752498	Filing Dt:	11/20/1996
Title:	METHOD AND APPARATUS FOR INTERACTIVELY DISPLAYING SIGNAL INFORMATION DURING COMPUTER SIMULATION OF AN ELECTRICAL CIRCUIT

Patent #:	7500162	Issue Dt:	03/03/2009	Application #:	10908958	Filing Dt:	06/02/2005
Publication #:	US20070022345	Pub Dt:	01/25/2007
Title:	SOURCING INTERNAL SIGNALS TO OUTPUT PINS OF AN INTEGRATED CIRCUT THROUGH SEQUENTIAL MULTIPLEXING

Patent #:	7630875	Issue Dt:	12/08/2009	Application #:	11160430	Filing Dt:	06/23/2005
Publication #:	US20070010982	Pub Dt:	01/11/2007
Title:	AUTOMATIC TIME WARP FOR ELECTRONIC SYSTEM SIMULATION

Patent #:	8839001	Issue Dt:	09/16/2014	Application #:	13341630	Filing Dt:	12/30/2011
Publication #:	US20130013934	Pub Dt:	01/10/2013
Title:	INFINITE KEY MEMORY TRANSACTION UNIT

Assignor

Exec Dt:

02/22/2013

Assignee

100 N. RIVERSIDE DRIVE

CHICAGO, ILLINOIS 60606

Correspondence name and address
	TRACEY PATERSON
	325 JAMES MCDONNELL BLVD.
	MAIL CODE: S306-4075
	ST. LOUIS, MO 63042

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