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Patent Assignment Details
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Reel/Frame:032037/0527   Pages: 6
Recorded: 01/15/2014
Attorney Dkt #:253185-040
Conveyance: RELEASE OF SECURITY INTEREST IN PATENTS
Total properties: 25
1
Patent #:
6633181
Issue Dt:
10/14/2003
Application #:
09475400
Filing Dt:
12/30/1999
Title:
MULTI-SCALE PROGRAMMABLE ARRAY
2
Patent #:
6426648
Issue Dt:
07/30/2002
Application #:
09550919
Filing Dt:
04/17/2000
Title:
CARRY LOOKAHEAD FOR PROGRAMMABLE LOGIC ARRAY
3
Patent #:
6874110
Issue Dt:
03/29/2005
Application #:
09569741
Filing Dt:
05/11/2000
Title:
APPARATUS AND METHOD FOR SELF TESTING PROGRAMMABLE LOGIC ARRAYS
4
Patent #:
6292388
Issue Dt:
09/18/2001
Application #:
09606791
Filing Dt:
06/28/2000
Title:
Efficient and robust random access memory cell suitable for programmable logic configuration control
5
Patent #:
NONE
Issue Dt:
Application #:
09738055
Filing Dt:
12/14/2000
Publication #:
US20020078412
Pub Dt:
06/20/2002
Title:
Built-in self test for a programmable logic device using linear feedback shift registers and hierarchical signature generation
6
Patent #:
7062520
Issue Dt:
06/13/2006
Application #:
09883976
Filing Dt:
06/19/2001
Publication #:
US20010049816
Pub Dt:
12/06/2001
Title:
MULTI-SCALE PROGRAMMABLE ARRAY
7
Patent #:
6418045
Issue Dt:
07/09/2002
Application #:
09896406
Filing Dt:
06/28/2001
Publication #:
US20020001222
Pub Dt:
01/03/2002
Title:
EFFICIENT AND ROBUST RANDOM ACCESS MEMORY CELL SUITABLE FOR PROGRAMMABLE LOGIC CONFIGURATION CONTROL
8
Patent #:
6857110
Issue Dt:
02/15/2005
Application #:
10067151
Filing Dt:
01/29/2002
Title:
DESIGN METHODOLOGY FOR MERGING PROGRAMMABLE LOGIC INTO A CUSTOM IC
9
Patent #:
6744274
Issue Dt:
06/01/2004
Application #:
10206872
Filing Dt:
07/26/2002
Title:
PROGRAMMABLE LOGIC CORE ADAPTER
10
Patent #:
7269616
Issue Dt:
09/11/2007
Application #:
10394824
Filing Dt:
03/21/2003
Publication #:
US20040186872
Pub Dt:
09/23/2004
Title:
TRANSITIVE PROCESSING UNIT FOR PERFORMING COMPLEX OPERATIONS
11
Patent #:
7000211
Issue Dt:
02/14/2006
Application #:
10404680
Filing Dt:
03/31/2003
Publication #:
US20040194048
Pub Dt:
09/30/2004
Title:
SYSTEM AND METHOD FOR EFFICIENTLY MAPPING HETEROGENEOUS OBJECTS ONTO AN ARRAY OF HETEROGENEOUS PROGRAMMABLE LOGIC RESOURCES
12
Patent #:
7590829
Issue Dt:
09/15/2009
Application #:
10404706
Filing Dt:
03/31/2003
Publication #:
US20040193852
Pub Dt:
09/30/2004
Title:
EXTENSION ADAPTER
13
Patent #:
7373642
Issue Dt:
05/13/2008
Application #:
10630542
Filing Dt:
07/29/2003
Publication #:
US20050027971
Pub Dt:
02/03/2005
Title:
DEFINING INSTRUCTION EXTENSIONS IN A STANDARD PROGRAMMING LANGUAGE
14
Patent #:
7421561
Issue Dt:
09/02/2008
Application #:
10686882
Filing Dt:
10/15/2003
Publication #:
US20050027944
Pub Dt:
02/03/2005
Title:
INSTRUCTION SET FOR EFFICIENT BIT STREAM AND BYTE STREAM I/O
15
Patent #:
6954845
Issue Dt:
10/11/2005
Application #:
10732392
Filing Dt:
12/09/2003
Publication #:
US20050027970
Pub Dt:
02/03/2005
Title:
RECONFIGURABLE INSTRUCTION SET COMPUTING
16
Patent #:
7581081
Issue Dt:
08/25/2009
Application #:
10750714
Filing Dt:
12/31/2003
Publication #:
US20040250046
Pub Dt:
12/09/2004
Title:
SYSTEMS AND METHODS FOR SOFTWARE EXTENSIBLE MULTI-PROCESSING
17
Patent #:
8001266
Issue Dt:
08/16/2011
Application #:
10815453
Filing Dt:
03/31/2004
Title:
CONFIGURING A MULTI-PROCESSOR SYSTEM
18
Patent #:
7237055
Issue Dt:
06/26/2007
Application #:
10931491
Filing Dt:
08/31/2004
Title:
SYSTEM, APPARATUS AND METHOD FOR DATA PATH ROUTING CONFIGURABLE TO PERFORM DYNAMIC BIT PERMUTATIONS
19
Patent #:
7526632
Issue Dt:
04/28/2009
Application #:
10971372
Filing Dt:
10/22/2004
Title:
SYSTEM, APPARATUS AND METHOD FOR IMPLEMENTING MULTIFUNCTIONAL MEMORY IN RECONFIGURABLE DATA PATH PROCESSING
20
Patent #:
7613900
Issue Dt:
11/03/2009
Application #:
11021247
Filing Dt:
12/21/2004
Publication #:
US20050114565
Pub Dt:
05/26/2005
Title:
SYSTEMS AND METHODS FOR SELECTING INPUT/OUTPUT CONFIGURATION IN AN INTEGRATED CIRCUIT
21
Patent #:
7284114
Issue Dt:
10/16/2007
Application #:
11099280
Filing Dt:
04/04/2005
Publication #:
US20050169550
Pub Dt:
08/04/2005
Title:
VIDEO PROCESSING SYSTEM WITH RECONFIGURABLE INSTRUCTIONS
22
Patent #:
7418575
Issue Dt:
08/26/2008
Application #:
11129146
Filing Dt:
05/12/2005
Publication #:
US20060259747
Pub Dt:
11/16/2006
Title:
LONG INSTRUCTION WORD PROCESSING WITH INSTRUCTION EXTENSIONS
23
Patent #:
7610475
Issue Dt:
10/27/2009
Application #:
11204555
Filing Dt:
08/15/2005
Publication #:
US20050273581
Pub Dt:
12/08/2005
Title:
PROGRAMMABLE LOGIC CONFIGURATION FOR INSTRUCTION EXTENSIONS
24
Patent #:
7620764
Issue Dt:
11/17/2009
Application #:
11768113
Filing Dt:
06/25/2007
Publication #:
US20070250656
Pub Dt:
10/25/2007
Title:
SYSTEM, APPARATUS AND METHOD FOR DATA PATH ROUTING CONFIGURABLE TO PERFORM DYNAMIC BIT PERMUTATIONS
25
Patent #:
NONE
Issue Dt:
Application #:
12561184
Filing Dt:
09/16/2009
Publication #:
US20100005338
Pub Dt:
01/07/2010
Title:
Programmable Logic Configuration for Instruction Extensions
Assignor
1
SILICON VALLEY BANK
Exec Dt:
01/14/2014
Assignee
1
STRETCH, INC.
686 WEST MAUDE AVENUE, SUITE 104
SUNNYVALE, CALIFORNIA 94085
Correspondence name and address
MAUREEN BURKE
O'MELVENY & MYERS LLP
2 EMBARCADERO CENTER, 28TH FLOOR
SAN FRANCISCO, CA 94111

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