|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
09015414
|
Filing Dt:
|
01/29/1998
|
|
Title:
|
INTEGRATED CIRCUITRY FUSE FORMING METHODS, INTEGRATED CIRCUITRY PROGRAMMING METHODS, AND RELATED INTEGRATED CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2002
|
Application #:
|
09028050
|
Filing Dt:
|
02/23/1998
|
|
Title:
|
ENHANCED CAPACITOR SHAPE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
09030130
|
Filing Dt:
|
02/25/1998
|
|
Title:
|
METHOD OF ANTI-FUSE REPAIR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
09031868
|
Filing Dt:
|
02/27/1998
|
|
Title:
|
CIRCUITS AND METHODS FOR SELECTIVELY COUPLING REDUNDANT ELEMENTS INTO AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/1999
|
Application #:
|
09031973
|
Filing Dt:
|
02/26/1998
|
|
Title:
|
CIRCUIT AND METHOD FOR TESTING A MEMORY DEVICE WITH A CELL PLATE GENERATOR HAVING A VARIABLE CURRENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
09034517
|
Filing Dt:
|
03/04/1998
|
|
Title:
|
METHOD AND APPARATUS FOR EVALUATING INTERNAL FILM STRESS AT HIGH LATERAL RESOLUTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2001
|
Application #:
|
09038252
|
Filing Dt:
|
03/10/1998
|
|
Title:
|
THERMAL PROCESSING OF METAL ALLOYS FOR AN IMPROVED CMP PROCESS IN INTEGRATED CIRCUIT FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
09042791
|
Filing Dt:
|
03/17/1998
|
|
Title:
|
BORIDE ELECTRODES AND BARRIERS FOR CELL DIELECTRICS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2000
|
Application #:
|
09046636
|
Filing Dt:
|
03/24/1998
|
|
Title:
|
METHOD FOR MULTILEVEL DRAM SENSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09047760
|
Filing Dt:
|
03/24/1998
|
|
Title:
|
METHOD FOR DETECTING OR REPAIRING INTERCELL DEFECTS IN MORE THAN ONE ARRAY OF A MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2000
|
Application #:
|
09052249
|
Filing Dt:
|
03/31/1998
|
|
Title:
|
METHODS OF DESIGNING AND FABRICATING INTERGRATED CIRCUITS WHICH TAKE INTO ACCOUNT CAPACITIVE LOADING BY THE INTERGRATED CIRCUIT POTTING MATERIAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2002
|
Application #:
|
09054872
|
Filing Dt:
|
04/03/1998
|
|
Title:
|
EFFICIENT DIGITAL ITU-COMPLIANT ZERO-BUFFERING DTMF DETECTION USING THE NON-UNIFORM DISCRETE FOURIER TRANSFORM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/1999
|
Application #:
|
09063529
|
Filing Dt:
|
04/21/1998
|
|
Title:
|
STAGGERED PIPELINE ACCESS SCHEME FOR SYNCHRONOUS RANDOM ACCESS MEM0RY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2002
|
Application #:
|
09066614
|
Filing Dt:
|
04/24/1998
|
|
Title:
|
SEMICONDUCTOR PROCESSING METHODS OF POLISHING ALUMINUM-COMPRISING LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
09069140
|
Filing Dt:
|
04/29/1998
|
|
Title:
|
DIGITAL DELAY LOCKED LOOP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
09083886
|
Filing Dt:
|
05/26/1998
|
|
Title:
|
FIN-SHAPED CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09092732
|
Filing Dt:
|
06/05/1998
|
|
Title:
|
METHOD AND SYSTEM FOR STATE-DEPENDENT ADMISSION CONTROL AND ROUTING OF MULTI-RATE CIRCUIT-SWITCHED TRAFFIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09093217
|
Filing Dt:
|
06/08/1998
|
|
Title:
|
SELECTIVE METHOD TO FORM ROUGHENED SILICON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2000
|
Application #:
|
09099464
|
Filing Dt:
|
06/18/1998
|
|
Title:
|
REGULATED DRAM CELL PLATE AND PRECHARGE VOLTAGE GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2000
|
Application #:
|
09099765
|
Filing Dt:
|
06/19/1998
|
|
Title:
|
SHARED LENGTH CELL FOR IMPROVED CAPACITANCE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2001
|
Application #:
|
09106755
|
Filing Dt:
|
06/30/1998
|
|
Title:
|
PROCESS, VOLTAGE, TEMPERATURE INDEPENDENT SWITCHED DELAY COMPENSATION SCHEME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2001
|
Application #:
|
09107929
|
Filing Dt:
|
06/30/1998
|
|
Title:
|
SEMICONDUCTOR CONSTRUCTIONS COMPRISING ALUMINUM-CONTAINING LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2002
|
Application #:
|
09118835
|
Filing Dt:
|
07/20/1998
|
|
Publication #:
|
|
Pub Dt:
|
08/09/2001
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR INSPECTING WAFERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
09119355
|
Filing Dt:
|
07/20/1998
|
|
Title:
|
ALUMINUM-BERYLLIUM ALLOYS FOR AIR BRIDGES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
09121528
|
Filing Dt:
|
07/23/1998
|
|
Title:
|
CONTINUOUS GOOD STEP COVERAGE CVD PLATINUM METAL DEPOSITION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
09123486
|
Filing Dt:
|
07/28/1998
|
|
Title:
|
LOCAL AREA NETWORK OF SERIAL INTELLIGENT CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
09123634
|
Filing Dt:
|
07/28/1998
|
|
Title:
|
MULTIPLICATION OF STORAGE CAPACITANCE IN MEMORY CELLS BY USING THE MILLER EFFECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2001
|
Application #:
|
09126877
|
Filing Dt:
|
07/30/1998
|
|
Title:
|
A SEMICONDUCTOR CIRCUIT DESIGN METHOD FOR EMPLOYING SPACING CONSTRAINTS AND CIRCUITS THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09129878
|
Filing Dt:
|
08/06/1998
|
|
Publication #:
|
|
Pub Dt:
|
11/15/2001
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY ASYNCHRONOUS PIPELINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/1999
|
Application #:
|
09133586
|
Filing Dt:
|
08/13/1998
|
|
Title:
|
CIRCUIT FOR CANCELLING AND REPLACING REDUNDANT ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2001
|
Application #:
|
09133714
|
Filing Dt:
|
08/13/1998
|
|
Title:
|
CIRCUIT FOR CANCELLING AND REPLACING REDUNDANT ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2001
|
Application #:
|
09135377
|
Filing Dt:
|
08/17/1998
|
|
Title:
|
INTEGRATED CIRCUITRY FUSE FORMING METHODS, INTEGRATED CIRCUITRY PROGRAMMING METHODS, AND RELATED INTEGRATED CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2001
|
Application #:
|
09135392
|
Filing Dt:
|
08/17/1998
|
|
Title:
|
INTEGRATED CIRCUITRY FUSE FORMING METHODS, INTEGRATED CIRCUITRY PROGRAMMING METHODS, AND RELATED INTEGRATED CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2001
|
Application #:
|
09138811
|
Filing Dt:
|
08/21/1998
|
|
Title:
|
GRADED LAYER FOR USE IN SEMICONDUCTOR CIRCUITS AND METHOD FOR MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
|
09139934
|
Filing Dt:
|
08/26/1998
|
|
Publication #:
|
|
Pub Dt:
|
01/10/2002
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR SELECTIVELY INCREASING SURFACE TEMPERATURE OF AN OBJECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2000
|
Application #:
|
09140878
|
Filing Dt:
|
08/27/1998
|
|
Title:
|
METHODS FOR PREPARING RUTHENIUM METAL FILMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2000
|
Application #:
|
09140932
|
Filing Dt:
|
08/27/1998
|
|
Title:
|
METHODS FOR PREPARING RUTHENIUM OXIDE FILMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
|
Application #:
|
09141321
|
Filing Dt:
|
08/27/1998
|
|
Title:
|
COMMUNICATIONS AND CONTROL NETWORK HAVING MULTIPLE POWER SUPPLIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
09141384
|
Filing Dt:
|
08/27/1998
|
|
Title:
|
SURFACE CLEANING APPARATUS AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2001
|
Application #:
|
09143283
|
Filing Dt:
|
08/28/1998
|
|
Title:
|
DEVICE AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2002
|
Application #:
|
09146299
|
Filing Dt:
|
09/03/1998
|
|
Title:
|
ISOLATION AND/OR REMOVAL OF IONIC CONTAMINANTS FROM PLANARIZATION FLUID COMPOSITIONS USING MACROCYCLIC POLYETHERS AND METHODS OF USING SUCH COMPOSITIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2001
|
Application #:
|
09146866
|
Filing Dt:
|
09/03/1998
|
|
Title:
|
DIFFUSION BARRIER LAYERS AND METHODS OF FORMING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2000
|
Application #:
|
09148032
|
Filing Dt:
|
09/03/1998
|
|
Title:
|
GAPPED-PLATE CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2001
|
Application #:
|
09153053
|
Filing Dt:
|
09/15/1998
|
|
Title:
|
METHODS AND SOLUTIONS FOR CLEANING POLISHED ALUMINUM-CONTAINING LAYERS, METHODS FOR MAKING METALLIZATION STRUCTURES, AND THE STRUCTURES RESULTING FROM THESE METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
09153088
|
Filing Dt:
|
09/14/1998
|
|
Title:
|
SEMICONDUCTOR CONSTRUCTUIONS COMPRISING ELECTRICALLY CONDUCTIVE PLUGS HAVING MONOCRYSTALLINE AND POLYCRYSTALLINE SILICON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
09163341
|
Filing Dt:
|
09/30/1998
|
|
Title:
|
BI-DIRECTIONAL DATA BUS SCHEME WITH OPTIMIZED READ AND WRITE CHARACTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
09167042
|
Filing Dt:
|
10/05/1998
|
|
Title:
|
MEMORY DEVICE WITH DISTRIBUTED VOLTAGE REGULATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
09182494
|
Filing Dt:
|
10/30/1998
|
|
Publication #:
|
|
Pub Dt:
|
11/29/2001
| | | | |
|
Title:
|
HIGH BANDWIDTH MEMORY INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2000
|
Application #:
|
09182495
|
Filing Dt:
|
10/30/1998
|
|
Title:
|
COLUMN REDUNDANCY CIRCUIT WITH REDUCED SIGNAL PATH DELAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2000
|
Application #:
|
09184918
|
Filing Dt:
|
11/02/1998
|
|
Title:
|
METHODS OF FABRICATING CONDUCTIVE LINES IN INTEGRATED CIRCUITS USING INSULATING SIDEWALL SPACERS AND CONDUCTIVE LINES SO FABRICATED
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
09187267
|
Filing Dt:
|
11/06/1998
|
|
Title:
|
DEMONSTRATION CONTROL ADJUNCT DEVICE FOR PRINTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2000
|
Application #:
|
09193239
|
Filing Dt:
|
11/17/1998
|
|
Title:
|
IMPROVED REDUNDANCY SELECTION CIRCUIT FOR SEMICONDUCTOR MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2000
|
Application #:
|
09196661
|
Filing Dt:
|
11/19/1998
|
|
Title:
|
DILUTE COMPOSITION CLEANING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2001
|
Application #:
|
09198826
|
Filing Dt:
|
11/24/1998
|
|
Publication #:
|
|
Pub Dt:
|
06/14/2001
| | | | |
|
Title:
|
METHOD OF FORMING A CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2000
|
Application #:
|
09204526
|
Filing Dt:
|
12/03/1998
|
|
Title:
|
CELL CAPACITORS, MEMORY CELLS, MEMORY ARRAYS, AND METHOD OF FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09205480
|
Filing Dt:
|
12/04/1998
|
|
Title:
|
DIRECT MEMORY ACCESS EXECUTION ENGINE WITH INDIRECT ADDRESSING OF CIRCULAR QUEUES IN ADDITION TO DIRECT MEMORY ADDRESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
09209649
|
Filing Dt:
|
12/10/1998
|
|
Title:
|
CONTACT STRUCTURE OF SEMICONDUCTOR MEMORY DEVICE FOR REDUCING CONTACT RELATED DEFECT AND CONTACT RESISTANCE AND METHOD FOR FORMING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09210456
|
Filing Dt:
|
12/14/1998
|
|
Title:
|
METHOD AND APPARATUS FOR CONNECTING NETWORK SEGMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
09212053
|
Filing Dt:
|
12/15/1998
|
|
Title:
|
DYNAMIC RANDOM ACCESS MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
09212854
|
Filing Dt:
|
12/16/1998
|
|
Title:
|
METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN DIGITAL ELECTRONIC CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09222044
|
Filing Dt:
|
05/03/1999
|
|
Title:
|
NONVOLATILE MEMORY DEVICES HAVING ALTERNATIVE PROGRAMMING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09224695
|
Filing Dt:
|
01/04/1999
|
|
Title:
|
ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING SYSTEM WITH SELECTABLE RATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
09225887
|
Filing Dt:
|
01/05/1999
|
|
Title:
|
CAPACITOR ELECTRODE FOR INTEGRATING HIGH K MATERIALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2001
|
Application #:
|
09229857
|
Filing Dt:
|
01/13/1999
|
|
Title:
|
GAPPED-PLATE CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2000
|
Application #:
|
09233412
|
Filing Dt:
|
01/19/1999
|
|
Title:
|
METHOD FOR FORMING INTEGRATED CIRCUIT MEMORY DEVICES WITH HIGH AND LOW DOPANT CONCENTRATION REGIONS OF DIFFERENT DIFFUSIVITIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2001
|
Application #:
|
09235752
|
Filing Dt:
|
01/25/1999
|
|
Title:
|
METHOD FOR IMPROVED PROCESSING AND ETCHBACK OF A CONTAINER CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2002
|
Application #:
|
09250974
|
Filing Dt:
|
02/16/1999
|
|
Publication #:
|
|
Pub Dt:
|
11/15/2001
| | | | |
|
Title:
|
METHODS OF FORMING MATERIALS COMPRISING TUNGSTEN AND NITROGEN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2001
|
Application #:
|
09251035
|
Filing Dt:
|
02/18/1999
|
|
Title:
|
METHOD FOR AN ERASE OPERATION OF FLASH MEMORY USING A SOURCE REGULATION CIRCUIT
|
|
|
|
|
Patent #:
|
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Issue Dt:
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05/14/2002
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Application #:
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09251104
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Filing Dt:
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02/16/1999
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Publication #:
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Pub Dt:
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02/28/2002
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Title:
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METHODS OF FORMING SEMICONDUCTOR CIRCUIT CONSTRUCTIONS AND CAPACITOR CONSTRUCTIONS
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09251387
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Filing Dt:
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02/17/1999
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Title:
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METHOD OF FORMING A CAPACITOR AND A CAPACITOR CONSTRUCTION
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09252022
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Filing Dt:
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02/16/1999
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Title:
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COMPOSITION AND METHOD OF FORMATION AND USE THEREFOR IN CHEMICAL-MECHANICAL POLISHING
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09253307
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Filing Dt:
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02/19/1999
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Title:
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METHODS OF MAKING SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09258467
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Filing Dt:
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02/26/1999
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Title:
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CARBURIZED SILICON GATE INSULATORS FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/15/2003
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Application #:
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09259142
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Filing Dt:
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02/26/1999
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Title:
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STEREOLITHOGRAPHIC METHOD AND APPARATUS FOR PACKAGING ELECTRONIC COMPONENTS AND RESULTING STRUCTURES
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09259143
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Filing Dt:
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02/26/1999
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Title:
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STEREOLITHOGRAPHIC METHOD FOR APPLYING MATERIALS TO ELECTRONIC COMPONENT SUBSTRATES AND RESULTING STRUCTURES
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09260237
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Filing Dt:
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03/01/1999
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Title:
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METHOD OF DEPOSITING A NITROGEN ENRICHED METAL LAYER, METHOD OF FORMING A SILICIDE CONTACT TO A SILICON COMPRISING SUBSTRATE, METHOD OF FORMING A METAL SOURCE LAYER IN AN INTEGRATED CIRCUIT, METHOD OF ANALYZING IMPACT OF OPERATING PARAMETER CHANGES FOR A PLASMA DEPOSITIO
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09283606
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Filing Dt:
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04/01/1999
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Title:
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CAPACITOR STRUCTURE
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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09283778
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Filing Dt:
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03/31/1999
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Title:
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METHOD AND APPARATUS FOR PROVIDING A PACKET BUFFER RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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09292396
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Filing Dt:
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04/15/1999
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Title:
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APPARATUS AND METHOD FOR FEATURE EDGE DETECTION IN SEMICONDUCTOR PROCESSING
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09292993
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Filing Dt:
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04/16/1999
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Title:
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CHEMICAL VAPOR DEPOSITION OF TITANIUM FROM TITANIUM TETRACHLORIDE AND HYDROCARBON REACTANTS
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09293635
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Filing Dt:
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04/15/1999
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Title:
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METHOD OF FORMING HIGH ASPECT RATIO STRUCTURES FOR SEMINCONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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09298012
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Filing Dt:
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04/22/1999
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Title:
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POLISHING SYSTEMS, METHODS OF POLISHING SUBSTRATES, AND METHODS OF PREPARING LIQUIDS FOR SEMICONDUCTOR FABRICATION PROCESSES
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Patent #:
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Issue Dt:
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04/06/2004
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Application #:
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09298160
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Filing Dt:
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04/22/1999
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Title:
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POLISHING SYSTEMS, METHODS OF POLISHING SUBSTRATES, AND METHODS OF PREPARING LIQUIDS FOR SEMICONDUCTOR FABRICATION PROCESSES
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09298312
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Filing Dt:
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04/22/1999
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Title:
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POLISHING SYSTEMS, METHODS OF POLISHING SUBSTRATES, AND METHODS OF PREPARING LIQUIDS FOR SEMICONDUCTOR FABRICATION PROCESSES
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09300902
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Filing Dt:
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04/28/1999
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Title:
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SLEEPMODE ACTIVATION IN A SLAVE DEVICE
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09310520
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Filing Dt:
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05/12/1999
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Title:
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RETICLE CLEANING WITHOUT DAMAGING PELLICLE
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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09310521
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Filing Dt:
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05/12/1999
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Title:
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RETICLE CLEANING WITHOUT DAMAGING PELLICLE
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Patent #:
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Issue Dt:
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02/24/2004
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Application #:
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09312486
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Filing Dt:
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05/17/1999
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Title:
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SYSTEM FOR TRANSMITTING MESSAGES TO IMPROVED STATIONS, AND CORRESPONDING PROCESSING
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09323440
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Filing Dt:
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06/01/1999
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Title:
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METHOD OF FORMING A PAIR OF CAPACITORS HAVING A COMMON CAPACITOR ELECTRODE, METHOD OF FORMING DRAM CIRCUITRY, INTEGRATED CIRCUITRY AND DRAM CIRCUITRY
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09324919
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Filing Dt:
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06/03/1999
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Title:
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TRENCH ISOLATION METHOD
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Patent #:
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Issue Dt:
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03/06/2001
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Application #:
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09325030
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Filing Dt:
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06/03/1999
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Title:
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SELF-LOCATING REMOTE MONITORING SYSTEMS
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Patent #:
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Issue Dt:
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11/06/2001
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Application #:
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09325375
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Filing Dt:
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06/04/1999
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Title:
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DILUTE CLEANING COMPOSITION AND METHOD FOR USING SAME
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09327152
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Filing Dt:
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06/07/1999
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Title:
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METHOD FOR REDUCING GASEOUS SPECIES OF CONTAMINATION IN WET PROCESSES
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09339890
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Filing Dt:
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06/25/1999
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Publication #:
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Pub Dt:
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08/09/2001
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Title:
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METHOD OF FORMING DRAM TRENCH CAPACITOR WITH METAL LAYER OVER HEMISPHERICAL GRAIN POLYSILICON
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09340983
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Filing Dt:
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06/28/1999
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Title:
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MEMORY CELL ARRAYS COMPRISING INTERSECTING SLANTED PORTIONS
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Patent #:
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Issue Dt:
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05/29/2001
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Application #:
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09343353
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Filing Dt:
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06/30/1999
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Title:
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METHOD FOR FABRICATING A DRAM CELL CAPACITOR INCLUDING ETCHING UPPER CONDUCTIVE LAYER WITH ETCHING BYPRODUCT FORMING A ETCH BARRIER ON THE CONDUCTIVE PATTERN
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Patent #:
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Issue Dt:
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07/31/2001
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Application #:
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09346450
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Filing Dt:
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07/01/1999
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Title:
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TRENCH ISOLATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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01/08/2002
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Application #:
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09347821
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Filing Dt:
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07/02/1999
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Title:
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METHOD FOR FABRICATING A SEMICONDUCTOR MEMORY DEVICE AND THE STRUCTURE THEREOF
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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09348314
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Filing Dt:
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07/07/1999
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Title:
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COLUMN REDUNDANCY IN SEMICONDUCTOR MEMORIES
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09348381
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Filing Dt:
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07/07/1999
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Title:
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SEMICONDUCTOR DEVICE HAVING TRIPLE-WELL
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