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59
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01/05/1999
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08710230
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Filing Dt:
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09/13/1996
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Title:
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04/14/1998
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08724595
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Filing Dt:
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09/30/1996
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Title:
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Patent #:
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Issue Dt:
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03/09/1999
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08758606
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Filing Dt:
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11/27/1996
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Title:
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Patent #:
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10/17/2000
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08910847
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08/13/1997
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Title:
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MEMORY CONTROLLER SUPPORTING DRAM CIRCUITS WITH DIFFERENT OPERATING SPEEDS
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09114426
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Filing Dt:
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07/13/1998
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Title:
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METHOD AND APPARATUS FOR SUPPORTING HETEROGENEOUS MEMORY IN COMPUTER SYSTEMS
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Patent #:
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Issue Dt:
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12/17/2002
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09266506
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Filing Dt:
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03/11/1999
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Title:
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METHOD AND APPARATUS FOR DISABLING A PROCESSOR IN A MULTIPROCESSOR COMPUTER
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09295668
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Filing Dt:
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04/21/1999
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Title:
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SCALABLE SYSTEM CONTROL UNIT FOR DISTRIBUTED SHARED MEMORY MULTI-PROCESSOR SYSTEMS
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Patent #:
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Issue Dt:
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07/17/2001
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Application #:
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09296038
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Filing Dt:
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04/21/1999
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Title:
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BACKUP REDUNDANT ROUTING SYSTEM CROSSBAR SWITCH ARCHITECTURE FOR MULTI-PROCESSOR SYSTEM INTERCONNECTION NETWORKS
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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09296045
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Filing Dt:
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04/21/1999
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Publication #:
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Pub Dt:
|
07/10/2003
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Title:
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SCALABLE, RE-CONFIGURABLE CROSSBAR SWITCH ARCHITECTURE FOR MULTI-PROCESSOR SYSTEM INTERCONNECTION NETWORKS
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Patent #:
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Issue Dt:
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10/03/2000
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Application #:
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09368401
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Filing Dt:
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08/04/1999
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Title:
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MULTIPLE FREQUENCY SWITCHING POWER SUPPLY AND METHODS TO OPERATE A SWITCHING POWER SUPPLY
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Patent #:
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Issue Dt:
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12/23/2003
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Application #:
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09392424
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Filing Dt:
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09/09/1999
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Title:
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SYSTEM FOR ENABLING A RECEIVER FOR ONLY A FIX AMOUNT OF TIME AND DISABLING THE RECEIVER THEREAFTER
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Patent #:
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Issue Dt:
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07/24/2001
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Application #:
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09466493
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Filing Dt:
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12/17/1999
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Title:
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CONTENTION BASED LOGIC GATE DRIVING A LATCH AND DRIVEN BY PULSED CLOCK
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09505561
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Filing Dt:
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02/17/2000
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Title:
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System and method for enabling/disabling sram banks for memory access
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Patent #:
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Issue Dt:
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05/20/2003
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09514981
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Filing Dt:
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02/29/2000
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Title:
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READ AROUND SPECULATIVE LOAD
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Patent #:
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Issue Dt:
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10/14/2003
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09540386
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Filing Dt:
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03/31/2000
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Title:
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METHOD AND APPARATUS FOR RESTORING COMPUTER RESOURCES
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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09540811
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Filing Dt:
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03/31/2000
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Title:
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COMPUTER SYSTEM HAVING SECURITY FEATURES FOR AUTHENTICATING DIFFERENT COMPONENTS
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09726738
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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METHOD AND APPARATUS FOR SCHEDULING AND USING MEMORY CALIBRATIONS TO REDUCE MEMORY ERRORS IN HIGH SPEED MEMORY DEVICES
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09727861
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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05/30/2002
| | | | |
Title:
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ADAPTIVE CALIBRATION TECHNIQUE FOR HIGH SPEED MEMORY DEVICES
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09735436
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12/12/2000
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Publication #:
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Pub Dt:
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06/13/2002
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Title:
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METHOD AND SYSTEM FOR DIRECTLY INTERCONNECTING STORAGE DEVICES TO CONTROLLER CARDS WITHIN A HIGHLY AVAILABLE STORAGE SYSTEM
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Patent #:
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12/03/2002
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09811243
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03/16/2001
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Publication #:
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Pub Dt:
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09/19/2002
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Title:
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SYSTEM AND METHOD UTILIZING ON-CHIP VOLTAGE MONITORING TO MANAGE POWER CONSUMPTION
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Patent #:
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Issue Dt:
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09/13/2005
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09823596
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Filing Dt:
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03/30/2001
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Publication #:
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Pub Dt:
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10/03/2002
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Title:
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RETIRING EARLY-COMPLETION INSTRUCTIONS TO IMPROVE COMPUTER OPERATION THROUGHPUT
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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09864527
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Filing Dt:
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05/23/2001
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Publication #:
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Pub Dt:
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11/28/2002
| | | | |
Title:
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METHOD AND SYSTEM FOR CREATING SECURE ADDRESS SPACE USING HARDWARE MEMORY ROUTER
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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09896043
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Filing Dt:
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06/28/2001
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Publication #:
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Pub Dt:
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01/02/2003
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Title:
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MEMORY TABLE AND MEMORY MANAGER FOR USE IN MANAGING MEMORY
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09919294
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Filing Dt:
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07/31/2001
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Publication #:
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Pub Dt:
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02/06/2003
| | | | |
Title:
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CONDITIONAL CLOCK GATE THAT REDUCES DATA DEPENDENT LOADING ON A CLOCK NETWORK
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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09921467
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Filing Dt:
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08/03/2001
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Publication #:
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Pub Dt:
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02/06/2003
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Title:
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OPPORTUNISTIC TRANSMISSION OF PORTABLY STORED DIGITAL DATA
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Patent #:
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Issue Dt:
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06/26/2007
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09967268
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09/28/2001
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Publication #:
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Pub Dt:
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04/03/2003
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Title:
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METHOD AND APPARATUS FOR PRESERVING THE INTEGRITY OF A MANAGEMENT SUBSYSTEM ENVIRONMENT
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Patent #:
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07/01/2003
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10020114
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12/18/2001
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Pub Dt:
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06/19/2003
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Title:
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ADAPTING VLSI CLOCKING TO SHORT TERM VOLTAGE TRANSIENTS
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Patent #:
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09/18/2007
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10033102
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10/25/2001
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Publication #:
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Pub Dt:
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05/29/2003
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Title:
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A METHOD OF PROTECTING USER PROCESS DATA IN A SECURE PLATFORM INACCESSIBLE TO THE OPERATING SYSTEM AND OTHER TASKS ON TOP OF THE SECURE PLATFORM
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Patent #:
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Issue Dt:
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09/13/2005
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10044364
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01/11/2002
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Publication #:
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01/02/2003
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Title:
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MANAGING LATENCIES IN ACCESSING MEMORY OF COMPUTER SYSTEMS
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Patent #:
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08/16/2005
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10053991
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10/22/2001
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Pub Dt:
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04/24/2003
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Title:
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HIGH PERFORMANCE MULTI-CONTROLLER PROCESSING
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08/15/2006
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10095125
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03/11/2002
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09/11/2003
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Title:
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DATA REDUNDANCY IN A HOT PLUGGABLE, LARGE SYMMETRIC MULTI-PROCESSOR SYSTEM
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04/10/2007
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10164534
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06/06/2002
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Title:
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SYSTEM WORKLOAD CHARACTERIZATION
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Patent #:
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07/06/2004
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10167507
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06/13/2002
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Pub Dt:
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12/18/2003
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Title:
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DRIVER CIRCUIT CONNECTED TO A SWITCHED CAPACITOR AND METHOD OF OPERATING SAME
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Patent #:
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09/23/2003
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10205831
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07/26/2002
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Title:
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METHOD AND APPARATUS FOR SAVING POWER IN DYNAMIC CIRCUITS
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09/14/2004
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10212691
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08/07/2002
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02/12/2004
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Title:
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SYSTEM AND METHOD FOR USING A USING VENDOR-LONG DESCRIPTOR IN ACPI FOR THE CHIPSET REGISTERS
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12/25/2007
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10246024
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09/17/2002
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03/18/2004
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Title:
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A SYSTEM AND METHOD FOR MANAGING POWER CONSUMPTION FOR A PLURALITY OF PROCESSORS BASED ON A SUPPLY VOLTAGE TO EACH PROCESSOR, TEMPERATURE, TOTAL POWER CONSUMPTION AND INDIVIDUAL PROCESSOR POWER CONSUMPTION
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01/08/2008
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10355516
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01/31/2003
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08/05/2004
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PHASE-LOCKED LOOP CONTROL CIRCUIT
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03/04/2008
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10376390
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02/28/2003
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09/02/2004
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Title:
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REGISTER-BASED DE-SKEW SYSTEM AND METHOD FOR A SOURCE SYNCHRONOUS RECEIVER
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04/10/2007
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10448763
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05/30/2003
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12/02/2004
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METHOD AND STRUCTURE FOR EXTERNAL CONTROL OF ESD PROTECTION IN ELECTRONIC CIRCUITS
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12/25/2007
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10622672
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07/18/2003
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11/11/2004
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Title:
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03/20/2007
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10629989
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07/30/2003
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Pub Dt:
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11/11/2004
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Title:
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SYSTEM AND METHOD FOR SYNCHRONIZING MULTIPLE SYNCHRONIZER CONTROLLERS
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05/15/2007
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10630159
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07/30/2003
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11/11/2004
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Title:
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PROGRAMMABLE CLOCK SYNCHRONIZER
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08/29/2006
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10630182
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07/30/2003
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11/11/2004
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Title:
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A CONTROLLER ARRANGEMENT FOR SYNCHRONIZER DATA TRANSFER BETWEEN A CORE CLOCK DOMAIN AND BUS CLOCK DOMAIN EACH HAVING ITS OWN INDIVIDUAL SYNCHRONIZING CONTROLLER
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07/03/2007
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10630297
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07/30/2003
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11/11/2004
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Title:
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SYSTEM AND METHOD FOR MAINTAINING A STABLE SYNCHRONIZATION STATE IN A PROGRAMMABLE CLOCK SYNCHRONIZER
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03/08/2005
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10630298
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07/30/2003
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11/11/2004
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Title:
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PHASE DETECTOR FOR A PROGRAMMABLE CLOCK SYNCHRONIZER
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07/17/2007
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10630317
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07/30/2003
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11/11/2004
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Title:
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SYSTEM AND METHOD FOR COMPENSATING FOR SKEW BETWEEN A FIRST CLOCK SIGNAL AND A SECOND CLOCK SIGNAL
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11/28/2006
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10630994
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07/30/2003
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02/03/2005
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Title:
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PERSISTENT VOLATILE MEMORY FAULT TRACKING
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03/25/2008
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10632885
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08/01/2003
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02/03/2005
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Title:
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DISTRIBUTED MULTIPLEXING CIRCUIT WITH BUILT-IN REPEATER
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05/29/2007
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08/29/2003
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12/23/2004
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07/03/2007
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10653760
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09/03/2003
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03/03/2005
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SYSTEM AND METHOD TO MITIGATE VOLTAGE FLUCTUATIONS
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01/02/2007
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10700919
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11/04/2003
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05/05/2005
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04/10/2007
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10732687
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12/10/2003
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06/16/2005
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02/13/2007
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10744174
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12/23/2003
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06/23/2005
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SYSTEM AND METHOD FOR SIGNAL SYNCHRONIZATION BASED ON PLURAL CLOCK SIGNALS
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10/10/2006
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10898693
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07/23/2004
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01/26/2006
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PHASE DETECTION IN A SYNC PULSE GENERATOR
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01/23/2007
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01/20/2005
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07/20/2006
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02/05/2008
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01/31/2005
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08/03/2006
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METHOD AND APPARATUS FOR PROVIDING THE PROPER VOLTAGE TO A MEMORY
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10/18/2011
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11058554
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02/15/2005
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08/17/2006
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Title:
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SYSTEM AND METHOD FOR CONTROLLING POWER TO RESOURCES BASED ON HISTORICAL UTILIZATION DATA
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12/12/2006
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11112121
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04/22/2005
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10/26/2006
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03/30/2010
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10/27/2006
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05/01/2008
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LIMITING POWER STATE CHANGES TO A PROCESSOR OF A COMPUTER DEVICE
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