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401
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Patent #:
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Issue Dt:
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04/30/1996
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Application #:
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08350926
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Filing Dt:
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12/07/1994
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Title:
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TELECOMMUNICATION SYSTEM WITH DETECTION AND CONTROL OF PACKET COLLISIONS
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08510643
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Filing Dt:
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08/03/1995
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Title:
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SINGLE CHIP UNIVERSAL PROTOCOL MULTI-FUNCTION ATM NETWORK INTERFACE
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08513316
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Filing Dt:
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08/10/1995
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Title:
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TRANSMISSION SYSTEM FOR TRANSMITTING AND DETECTING THE BEGINNING OF THE FRAME OF A FRAME SYNCHRONIZED SIGNAL
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08537568
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Filing Dt:
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10/02/1995
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Title:
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METHOD AND APPARATUS FOR REDUCING DATA DELAY WITHIN A MULTI-CHANNEL SHARED-CIRCUIT DATA PROCESSING ENVIRONMENT
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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08607730
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Filing Dt:
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02/27/1996
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Title:
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REAL-TIME HARDWARE METHOD AND APPARATUS FOR REDUCING QUEUE PROCESSING
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Patent #:
|
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Issue Dt:
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04/15/1997
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Application #:
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08611327
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Filing Dt:
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03/08/1996
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Title:
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METHOD AND APPARATUS FOR FAST SYNCHRONIZATION OF T1 EXTENDED SUPERFRAMES
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Patent #:
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Issue Dt:
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03/10/1998
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Application #:
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08612373
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Filing Dt:
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03/07/1996
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Title:
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ATM COMMUNICATION SYSTEM INTERCONNECT/TERMINATION UNIT
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08710207
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Filing Dt:
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09/13/1996
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Title:
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SHARED MEMORY FABRIC ARCHITECTURE FOR VERY HIGH SPEED ATM SWITCHES
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Patent #:
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|
Issue Dt:
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09/28/1999
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Application #:
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08714005
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Filing Dt:
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09/13/1996
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Title:
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SCHEDULER DESIGN FOR ATM SWITCHES, AND ITS IMPLEMENTATION IN A DISTRIBUTED SHARED MEMORY ARCHITECTURE
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|
|
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Patent #:
|
|
Issue Dt:
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05/18/1999
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Application #:
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08751045
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Filing Dt:
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11/15/1996
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Title:
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METHOD AND APPARATUS FOR CONTROLLING DATA TRANSFER RATES USING MARKING THRESHOLD IN ASYNCHRONOUS TRANSFER MODE NETWORKS
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|
|
|
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Patent #:
|
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Issue Dt:
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06/13/2000
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Application #:
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08867249
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Filing Dt:
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06/02/1997
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Title:
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SONET PHYSICAL LAYER DEVICE HAVING ATM AND PPP INTERFACES
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|
|
|
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Patent #:
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|
Issue Dt:
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03/07/2000
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Application #:
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08877909
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Filing Dt:
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06/18/1997
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Title:
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METHOD AND APPARATUS FOR REDUCING NOISE IN SPEECH AND AUDIO SIGNALS
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|
|
|
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Patent #:
|
|
Issue Dt:
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12/18/2001
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Application #:
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08903588
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Filing Dt:
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07/31/1997
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|
Title:
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MULTIPLE LINE FRAMER ENGINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2000
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Application #:
|
08906818
|
Filing Dt:
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08/06/1997
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|
Title:
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MULTIPLE TONE DETECTION USING OUT-OF-BAND BACKGROUND DETECTOR
|
|
|
|
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Patent #:
|
|
Issue Dt:
|
08/07/2001
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Application #:
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08939746
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Filing Dt:
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09/29/1997
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|
Title:
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IN-BAND DEVICE CONFIGURATION PROTOCOL FOR ATM TRANSMISSION CONVERGENCE DEVICES
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|
|
|
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Patent #:
|
|
Issue Dt:
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07/17/2001
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Application #:
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08947538
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Filing Dt:
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10/11/1997
|
|
Title:
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SIMPLIFIED DATA LINK PROTOCOL PROCESSOR
|
|
|
|
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Patent #:
|
|
Issue Dt:
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09/14/1999
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Application #:
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08959888
|
Filing Dt:
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10/29/1997
|
|
Title:
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METHOD AND APPARATUS FOR SYNCHRONIZING DIGITAL SPEECH COMMUNICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2002
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Application #:
|
09036966
|
Filing Dt:
|
03/09/1998
|
|
Title:
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ATM COMMUNICATION SYSTEM INTERCONNECT/TERMINATION UNIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2002
|
Application #:
|
09036966
|
Filing Dt:
|
03/09/1998
|
|
Title:
|
ATM COMMUNICATION SYSTEM INTERCONNECT/TERMINATION UNIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09154991
|
Filing Dt:
|
09/17/1998
|
|
Title:
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ECHO CANCELER INCLUDING SUBBAND ECHO SUPPRESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2001
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Application #:
|
09156432
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Filing Dt:
|
09/18/1998
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|
Title:
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METHOD AND APPARATUS FOR PROCESSING DATA PACKETS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
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Application #:
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09182884
|
Filing Dt:
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10/30/1998
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|
Title:
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METHOD AND APPARATUS FOR GUARANTEEING DATA TRANSFER RATES AND DELAYS IN DATA PACKET NETWORKS USING LOGARITHMIC CALENDAR QUEUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09188625
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Filing Dt:
|
11/09/1998
|
|
Title:
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MIXED-MODE NEXT/ECHO CANCELLER FOR PULSE AMPLITUDE MODULATED (PAM) SIGNALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2001
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Application #:
|
09206519
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Filing Dt:
|
12/07/1998
|
|
Title:
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SECOND ORDER LMS TAP UPDATE ALGORITHM WITH HIGH TRACKING CAPABILITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
09364411
|
Filing Dt:
|
07/30/1999
|
|
Title:
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LOW-COMPLEXITY DMT TRANSCEIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
09405205
|
Filing Dt:
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09/24/1999
|
|
Title:
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METHOD AND APPARATUS FOR INTERFACING MULTIPLE COMMUNICATION DEVICES TO A TIME DIVISION MULTIPLEXING BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
09427961
|
Filing Dt:
|
10/27/1999
|
|
Title:
|
METHOD AND APPARATUS FOR INTERFACING MULTIPLE DATA CHANNELS TO A BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
09432976
|
Filing Dt:
|
11/03/1999
|
|
Title:
|
SINGLE-BIT TIMESTAMPS FOR DATA TRANSFER RATE AND DELAY GUARANTEES IN A PACKET NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09459439
|
Filing Dt:
|
12/13/1999
|
|
Title:
|
COMMUNICATIONS SYSTEM WITH SYMMETRICAL INTERFACES AND ASSOCIATED METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2005
|
Application #:
|
09459831
|
Filing Dt:
|
12/13/1999
|
|
Title:
|
COMMUNICATIONS SYSTEM AND ASSOCIATED METHODS WITH OUT-OF-BAND CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
09459848
|
Filing Dt:
|
12/13/1999
|
|
Title:
|
COMMUNICATIONS SYSTEM AND ASSOCIATED DESKEWING METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
09460165
|
Filing Dt:
|
12/13/1999
|
|
Title:
|
COMMUNICATIONS SYSTEM INCLUDING LOWER RATE PARALLEL ELECTRONICS WITH SKEW COMPENSATION AND ASSOCIATED METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
09464267
|
Filing Dt:
|
12/17/1999
|
|
Title:
|
SONET PHYSICAL LAYER DEVICE HAVING ATM AND PPP INTERFACES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2005
|
Application #:
|
09471806
|
Filing Dt:
|
12/23/1999
|
|
Title:
|
DIGITAL ADAPTIVE EQUALIZER FOR T1/E1 LONG HAUL TRANSCEIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
09549753
|
Filing Dt:
|
04/14/2000
|
|
Title:
|
METHOD FOR DESIGNING ALL PASS DIGITAL FILTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
09585476
|
Filing Dt:
|
06/01/2000
|
|
Title:
|
METHOD FOR RECONSTRUCTING AN AGGREGATE ATM CELL STREAM AND RELATED DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
09587149
|
Filing Dt:
|
06/02/2000
|
|
Title:
|
METHOD AND APPARATUS FOR GUARANTEEING DATA TRANSFER RATES AND DELAYS IN ASYNCHRONOUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
09599250
|
Filing Dt:
|
06/22/2000
|
|
Title:
|
METHOD AND APPARATUS FOR PROVIDING DIFFERENTIATED QUALITY OF SERVICE GUARANTEES IN SCALABLE PACKET SWITCHES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
09648996
|
Filing Dt:
|
08/28/2000
|
|
Title:
|
SYSTEM AND METHOD FOR REDUCING JITTER IN A PACKET TRANSPORT SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
09761172
|
Filing Dt:
|
01/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
|
Title:
|
MULTISTAGE DIGITAL CROSS CONNECT WITH INTEGRAL FRAME TIMING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
09761538
|
Filing Dt:
|
01/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/20/2001
| | | | |
|
Title:
|
MULTISTAGE DIGITAL CROSS CONNECT WITH SYNCHRONIZED CONFIGURATION SWITCHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
09761539
|
Filing Dt:
|
01/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
|
Title:
|
TIME SLOT INTERCHANGER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2004
|
Application #:
|
09791139
|
Filing Dt:
|
02/22/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2002
| | | | |
|
Title:
|
LINK LAYER DEVICE AND METHOD OF TRANSLATING PACKETS BETWEEN TRANSPORT PROTOCOLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
09798112
|
Filing Dt:
|
03/02/2001
|
|
Title:
|
PROCESSOR ARCHITURE AND A METHOD OF PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
09798130
|
Filing Dt:
|
03/02/2001
|
|
Title:
|
PROCESSOR ARCHITECTURE AND A METHOD OF PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2006
|
Application #:
|
09798454
|
Filing Dt:
|
03/02/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/03/2002
| | | | |
|
Title:
|
FUNCTION INTERFACE SYSTEM AND METHOD OF PROCESSING ISSUED FUNCTIONS BETWEEN CO-PROCESSORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2005
|
Application #:
|
09798472
|
Filing Dt:
|
03/02/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/06/2001
| | | | |
|
Title:
|
VIRTUAL REASSEMBLY SYSTEM AND METHOD OF OPERATION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
09798479
|
Filing Dt:
|
03/02/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/06/2001
| | | | |
|
Title:
|
CHECKSUM ENGINE AND A METHOD OF OPERATION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
09821892
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
MULTI-PROTOCOL BUS SYSTEM AND METHOD OF OPERATION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2005
|
Application #:
|
09821893
|
Filing Dt:
|
03/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
|
Title:
|
EXTERNAL DEVICE TRANSMISSION SYSTEM AND A FAST PATTERN PROCESSOR EMPLOYING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2007
|
Application #:
|
09821898
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
EVENT EDGE SYNCHRONIZATION SYSTEM AND METHOD OF OPERATION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2006
|
Application #:
|
09822655
|
Filing Dt:
|
03/30/2001
|
|
Title:
|
VIRTUAL SEGMENTATION SYSTEM AND METHOD OF OPERATION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2005
|
Application #:
|
09873524
|
Filing Dt:
|
06/04/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/28/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR GUARANTEEING DATA TRANSFER RATES AND ENFORCING CONFORMANCE WITH TRAFFIC PROFILES IN A PACKET NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
09885777
|
Filing Dt:
|
06/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
|
Title:
|
DETECTION AND CORRECTION CIRCUIT FOR BLIND EQUALIZATION CONVERGENCE ERRORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
09919221
|
Filing Dt:
|
07/31/2001
|
|
Title:
|
EFFICIENT HIGH DENSITY VOICE PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/25/2006
|
Application #:
|
09952292
|
Filing Dt:
|
09/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR UPDATING FILTER COEFFICIENTS AND ECHO CANCELLER INCLUDING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
09968476
|
Filing Dt:
|
09/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
CIPHER BLOCK CHAINING MODE IN ENCRYPTION/DECRYPTION PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10001654
|
Filing Dt:
|
10/31/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
VOICE PACKET PROCESSOR AND METHOD OF OPERATION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
10025352
|
Filing Dt:
|
12/19/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
PROCESSOR WITH REDUCED MEMORY REQUIREMENTS FOR HIGH-SPEED ROUTING AND SWITCHING OF PACKETS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10026350
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
MEMORY SYSTEM FOR INCREASED BANDWIDTH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
10026351
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD FOR IMPLEMENTING DUAL LINK LIST STRUCTURE TO ENABLE FAST LINK-LIST POINTER UPDATES
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10026353
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
Method for encoding/decoding a binary signal state in a fault tolerant environment
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
10029679
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR USING MULTIPLE REASSEMBLY MEMORIES FOR PERFORMING MULTIPLE FUNCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
10029680
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR FORMING LINKED LIST QUEUE USING CHUNK-BASED STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10029703
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
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Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
PROCESSOR WITH MULTIPLE-PASS NON-SEQUENTIAL PACKET CLASSIFICATION FEATURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/2005
|
Application #:
|
10029704
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
PROCESSOR WITH PACKET DATA FLUSHING FEATURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10029705
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR CLASSIFICATION OF PACKET DATA PRIOR TO STORAGE IN PROCESSOR BUFFER MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
10032025
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
PROCESSOR WITH PACKET PROCESSING ORDER MAINTENANCE BASED ON PACKET FLOW IDENTIFIERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
10037040
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD OF IMPROVING THE LOOKUP PERFORMANCE OF TREE-TYPE KNOWLEDGE BASE SEARCHES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
10037067
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
Method and apparatus for maintaining multicast lists in a data network
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
10037082
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR REASSEMBLY OF DATA BLOCKS WITHIN A NETWORK PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/2004
|
Application #:
|
10037163
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR BUFFER PARTITIONING WITHOUT LOSS OF DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10037164
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR PROVIDING MULTIPLE DATA CLASS DIFFERENTIATION WITH PRIORITIES USING A SINGLE SCHEDULING STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
10037165
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR SWITCHING BETWEEN ACTIVE AND STANDBY SWITCH FABRICS WITH NO LOSS OF DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2006
|
Application #:
|
10074841
|
Filing Dt:
|
02/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
ADAPTIVE THRESHOLD BASED JITTER BUFFER MANAGEMENT FOR PACKETIZED DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
10081308
|
Filing Dt:
|
02/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR ESTABLISHING A BOUND ON THE EFFECT OF TASK INTERFERENCE IN A CACHE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
10082776
|
Filing Dt:
|
02/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
CONTEXT SWITCHING SYSTEM FOR A MULTI-THREAD EXECUTION PIPELINE LOOP AND METHOD OF OPERATION THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
10085219
|
Filing Dt:
|
02/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
PROCESSOR WITH DYNAMIC TABLE-BASED SCHEDULING USING LINKED TRANSMISSION ELEMENTS FOR HANDLING TRANSMISSION REQUEST COLLISIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
10085222
|
Filing Dt:
|
02/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
PROCESSOR WITH TABLE-BASED SCHEDULING USING SOFTWARE-CONTROLLED INTERVAL COMPUTATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10085223
|
Filing Dt:
|
02/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
PROCESSOR WITH DYNAMIC TABLE-BASED SCHEDULING USING MULTI-ENTRY TABLE LOCATIONS FOR HANDLING TRANSMISSION REQUEST COLLISIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
10085771
|
Filing Dt:
|
02/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
PROCESSOR WITH SOFTWARE-CONTROLLED PROGRAMMABLE SERVICE LEVELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
10114398
|
Filing Dt:
|
04/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
NON-BLOCKING GROOMING SWITCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10122997
|
Filing Dt:
|
04/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/16/2003
| | | | |
|
Title:
|
LOW POWER VECTOR SUMMATION METHOD AND APPARATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10131577
|
Filing Dt:
|
04/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/27/2003
| | | | |
|
Title:
|
BUFFER MANAGEMENT FOR MERGING PACKETS OF VIRTUAL CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/2009
|
Application #:
|
10269928
|
Filing Dt:
|
10/11/2002
|
|
Title:
|
STRIPING ALGORITHM FOR SWITCHING FABRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2008
|
Application #:
|
10270264
|
Filing Dt:
|
10/11/2002
|
|
Title:
|
DEFICIT-BASED STRIPING ALGORITHM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
10277238
|
Filing Dt:
|
10/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/22/2004
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR IMPROVED PLAY-OUT PACKET CONTROL ALGORITHM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
10285069
|
Filing Dt:
|
10/31/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
|
Title:
|
PROCESSOR FOR PACKET SWITCHING BETWEEN CELL STREAMS WITH OPTIONAL VIRTUAL CHANNEL AND CHANNEL IDENTIFICATION MODIFICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2007
|
Application #:
|
10325700
|
Filing Dt:
|
12/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR GUARANTEEING QUALITY OF SERVICE IN A MULTI-PLANE CELL SWITCH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
10325701
|
Filing Dt:
|
12/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR ENSURING CELL ORDERING IN LARGE CAPACITY SWITCHING SYSTEMS AND FOR SYNCHRONIZING THE ARRIVAL TIME OF CELLS TO A SWITCH FABRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2007
|
Application #:
|
10339796
|
Filing Dt:
|
01/09/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
|
Title:
|
WEIGHTED FAIR SHARE SCHEDULER FOR LARGE INPUT-BUFFERED HIGH-SPEED CROSS-POINT PACKET/CELL SWITCHES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
10341546
|
Filing Dt:
|
01/13/2003
|
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
|
DIGITAL CROSS-CONNECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2008
|
Application #:
|
10358678
|
Filing Dt:
|
02/05/2003
|
|
Title:
|
BACKPRESSURE MECHANISM FOR SWITCHING FABRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
10370037
|
Filing Dt:
|
02/19/2003
|
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
|
Title:
|
SCHEDULING CONNECTIONS IN A MULTI-STAGE SWITCH TO RETAIN NON-BLOCKING PROPERTIES OF CONSTITUENT SWITCHING ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
10378096
|
Filing Dt:
|
02/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
03/25/2004
| | | | |
|
Title:
|
DUOBINARY PULSE SHAPING FOR OPTICAL TRANSMISSION SYSTEMS EMPLOYING PULSE AMPLITUDE MODULATION TECHNIQUES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2008
|
Application #:
|
10403419
|
Filing Dt:
|
03/28/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
|
Title:
|
DEVICES FOR PERFORMING MULTIPLE INDEPENDENT HARDWARE ACCELERATION OPERATIONS AND METHODS FOR PERFORMING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2009
|
Application #:
|
10417013
|
Filing Dt:
|
04/16/2003
|
|
Title:
|
SIMPLIFIED DATA LINK PROTOCOL PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2010
|
Application #:
|
10420153
|
Filing Dt:
|
04/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
|
Title:
|
POINTER GENERATION METHOD AND APPARATUS FOR DELAY COMPENSATION IN VIRTUAL CONCATENATION APPLICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
10420156
|
Filing Dt:
|
04/22/2003
|
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
|
Title:
|
STALL NEED DETECTION AND ASSOCIATED STALL MECHANISM FOR DELAY COMPENSATION IN VIRTUAL CONCATENATION APPLICATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2011
|
Application #:
|
10438109
|
Filing Dt:
|
05/14/2003
|
|
Publication #:
|
|
Pub Dt:
|
12/25/2003
| | | | |
|
Title:
|
REAL TIME TUNER FOR PROVIDING GRAPHICAL USER INTERFACE
|
|
