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Total properties:
36
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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09063608
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Filing Dt:
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04/21/1998
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Title:
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HIGH ASPECT RATIO METALLIZATION STRUCTURES AND PROCESSES FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
|
03/18/2003
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Application #:
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09548472
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Filing Dt:
|
04/13/2000
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Title:
|
DUAL DAMASCENE INTERCONNECT
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Patent #:
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Issue Dt:
|
12/17/2002
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Application #:
|
09584004
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Filing Dt:
|
05/30/2000
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Title:
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HIGH ASPECT RATIO METALLIZATION STRUCTURES
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Patent #:
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|
Issue Dt:
|
12/26/2006
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Application #:
|
09608117
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Filing Dt:
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06/30/2000
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Title:
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METHOD AND APPARATUS FOR PROVIDING A SECURE-PRIVATE PARTITION ON A HARD DISK DRIVE OF A COMPUTER SYSTEM VIA IDE CONTROLLER
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Patent #:
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Issue Dt:
|
12/13/2005
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Application #:
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09752882
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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11/04/2004
| | | | |
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Title:
|
SYSTEM AND METHOD FOR PROTECTED MESSAGING
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Patent #:
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Issue Dt:
|
01/08/2008
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Application #:
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09884175
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Filing Dt:
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06/19/2001
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Publication #:
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Pub Dt:
|
12/19/2002
| | | | |
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Title:
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PERIPHERAL DEVICE WITH HARDWARE LINKED LIST
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|
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Patent #:
|
|
Issue Dt:
|
11/18/2003
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Application #:
|
09997809
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Filing Dt:
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11/29/2001
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Publication #:
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Pub Dt:
|
05/29/2003
| | | | |
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Title:
|
LOW VOLTAGE OPERATION OF STATIC RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
|
05/17/2005
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Application #:
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10038305
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Filing Dt:
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01/02/2002
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Publication #:
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Pub Dt:
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05/23/2002
| | | | |
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Title:
|
METHOD OF FORMING A DUAL DAMASCENE INTERCONNECT BY SELECTIVE METAL DEPOSITION
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Patent #:
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Issue Dt:
|
02/10/2004
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Application #:
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10301070
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Filing Dt:
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11/20/2002
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Publication #:
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Pub Dt:
|
04/24/2003
| | | | |
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Title:
|
HIGH ASPECT RATIO METALLIZATION STRUCTURES
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|
|
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Patent #:
|
|
Issue Dt:
|
04/20/2004
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Application #:
|
10317265
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Filing Dt:
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12/11/2002
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Publication #:
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Pub Dt:
|
06/26/2003
| | | | |
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Title:
|
DUAL DAMASCENE INTERCONNECT
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|
|
|
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Patent #:
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|
Issue Dt:
|
06/19/2007
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Application #:
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10695383
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Filing Dt:
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10/27/2003
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Publication #:
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Pub Dt:
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04/28/2005
| | | | |
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Title:
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SYSTEM AND METHOD FOR USING A LEARNING SEQUENCE TO ESTABLISH COMMUNICATIONS ON A HIGH-SPEED NONSYNCHRONOUS INTERFACE IN THE ABSENCE OF CLOCK FORWARDING
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|
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Patent #:
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Issue Dt:
|
11/27/2007
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Application #:
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10932296
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Filing Dt:
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09/02/2004
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Publication #:
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Pub Dt:
|
03/02/2006
| | | | |
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Title:
|
THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS
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|
|
|
|
Patent #:
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|
Issue Dt:
|
08/10/2010
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Application #:
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11219315
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Filing Dt:
|
09/01/2005
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|
Publication #:
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Pub Dt:
|
03/01/2007
| | | | |
|
Title:
|
METHODS OF FORMING BLIND WAFER INTERCONNECTS
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|
|
|
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Patent #:
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|
Issue Dt:
|
12/02/2008
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Application #:
|
11433181
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Filing Dt:
|
05/11/2006
|
|
Publication #:
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|
Pub Dt:
|
09/14/2006
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR USING A LEARNING SEQUENCE TO ESTABLISH COMMUNICATIONS ON A HIGH- SPEED NONSYNCHRONOUS INTERFACE IN THE ABSENCE OF CLOCK FORWARDING
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|
|
|
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Patent #:
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|
Issue Dt:
|
08/18/2009
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Application #:
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11456518
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Filing Dt:
|
07/10/2006
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|
Publication #:
|
|
Pub Dt:
|
11/09/2006
| | | | |
|
Title:
|
PERIPHERAL DEVICE WITH HARDWARE LINKED LIST
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2011
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Application #:
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11776137
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Filing Dt:
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07/11/2007
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|
Publication #:
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Pub Dt:
|
11/08/2007
| | | | |
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Title:
|
METHODS OF FORMING BLIND WAFER INTERCONNECTS, AND RELATED STRUCTURES AND ASSEMBLIES
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|
|
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Patent #:
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|
Issue Dt:
|
03/23/2010
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Application #:
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11924781
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Filing Dt:
|
10/26/2007
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2008
| | | | |
|
Title:
|
THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2010
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Application #:
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11950609
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Filing Dt:
|
12/05/2007
|
|
Publication #:
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Pub Dt:
|
06/11/2009
| | | | |
|
Title:
|
METHOD, APPARATUS, AND SYSTEM FOR ERASING MEMORY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
01/04/2011
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Application #:
|
12234956
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Filing Dt:
|
09/22/2008
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Publication #:
|
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Pub Dt:
|
03/25/2010
| | | | |
|
Title:
|
PROGRAMMING A MEMORY DEVICE TO INCREASE DATA RELIABILITY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2013
|
Application #:
|
12269766
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Filing Dt:
|
11/12/2008
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|
Publication #:
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|
Pub Dt:
|
05/13/2010
| | | | |
|
Title:
|
DYNAMIC SLC/MLC BLOCKS ALLOCATIONS FOR NON-VOLATILE MEMORY
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
12532828
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Filing Dt:
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04/26/2011
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|
Publication #:
|
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Pub Dt:
|
12/08/2011
| | | | |
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Title:
|
NON-VOLATILE MEMORY WITH EXTENDED OPERATING TEMPERATURE RANGE
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/07/2011
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Application #:
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12725724
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Filing Dt:
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03/17/2010
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|
Publication #:
|
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Pub Dt:
|
07/08/2010
| | | | |
|
Title:
|
THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
12833562
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Filing Dt:
|
07/09/2010
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|
Publication #:
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|
Pub Dt:
|
10/28/2010
| | | | |
|
Title:
|
METHOD, APPARATUS, AND SYSTEM FOR ERASING MEMORY
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|
Patent #:
|
|
Issue Dt:
|
09/18/2012
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Application #:
|
12893400
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Filing Dt:
|
09/29/2010
|
|
Publication #:
|
|
Pub Dt:
|
03/29/2012
| | | | |
|
Title:
|
VOLTAGE DISCHARGE CIRCUITS AND METHODS
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|
Patent #:
|
|
Issue Dt:
|
09/03/2013
|
Application #:
|
12905238
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Filing Dt:
|
10/15/2010
|
|
Publication #:
|
|
Pub Dt:
|
04/19/2012
| | | | |
|
Title:
|
SELECTIVE ERROR CONTROL CODING IN MEMORY DEVICES
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|
|
|
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Patent #:
|
|
Issue Dt:
|
12/13/2011
|
Application #:
|
12981873
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Filing Dt:
|
12/30/2010
|
|
Publication #:
|
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Pub Dt:
|
04/28/2011
| | | | |
|
Title:
|
PROGRAMMING A MEMORY DEVICE TO INCREASE DATA RELIABILITY
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|
Patent #:
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|
Issue Dt:
|
08/06/2013
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Application #:
|
13154550
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Filing Dt:
|
06/07/2011
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|
Publication #:
|
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Pub Dt:
|
09/29/2011
| | | | |
|
Title:
|
THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS
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|
Patent #:
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|
Issue Dt:
|
12/04/2012
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Application #:
|
13187133
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Filing Dt:
|
07/20/2011
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|
Publication #:
|
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Pub Dt:
|
11/10/2011
| | | | |
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Title:
|
SEMICONDUCTOR DICE INCLUDING AT LEAST ONE BLIND HOLE, WAFERS INCLUDING SUCH SEMICONDUCTOR DICE, AND INTERMEDIATE PRODUCTS MADE WHILE FORMING AT LEAST ONE BLIND HOLE IN A SUBSTRATE
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Patent #:
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Issue Dt:
|
01/01/2013
|
Application #:
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13305906
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Filing Dt:
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11/29/2011
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Publication #:
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Pub Dt:
|
03/29/2012
| | | | |
|
Title:
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PROGRAMMING A MEMORY DEVICE TO INCREASE DATA RELIABILITY
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Patent #:
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Issue Dt:
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05/07/2013
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Application #:
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13595002
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Filing Dt:
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08/27/2012
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Publication #:
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Pub Dt:
|
12/20/2012
| | | | |
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Title:
|
METHOD FOR DISCHARGING A VOLTAGE FROM A CAPACITANCE IN A MEMORY DEVICE
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Patent #:
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Issue Dt:
|
01/28/2014
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Application #:
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13620065
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Filing Dt:
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09/14/2012
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Publication #:
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Pub Dt:
|
02/21/2013
| | | | |
|
Title:
|
SEMICONDUCTOR DICE INCLUDING AT LEAST ONE BLIND HOLE, WAFERS INCLUDING SUCH SEMICONDUCTOR DICE, AND INTERMEDIATE PRODUCTS MADE WHILE FORMING AT LEAST ONE BLIND HOLE IN A SUBSTRATE
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13713149
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Filing Dt:
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12/13/2012
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Publication #:
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Pub Dt:
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04/25/2013
| | | | |
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Title:
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PROGRAMMING A MEMORY DEVICE TO INCREASE DATA RELIABILITY
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Patent #:
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Issue Dt:
|
03/04/2014
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Application #:
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13846638
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Filing Dt:
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03/18/2013
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Publication #:
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Pub Dt:
|
08/29/2013
| | | | |
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Title:
|
DYNAMIC SLC/MLC BLOCKS ALLOCATIONS FOR NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
|
03/11/2014
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Application #:
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13940034
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Filing Dt:
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07/11/2013
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Publication #:
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|
Pub Dt:
|
11/07/2013
| | | | |
|
Title:
|
THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS
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Patent #:
|
NONE
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Issue Dt:
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Application #:
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13963636
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Filing Dt:
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08/09/2013
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Publication #:
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|
Pub Dt:
|
12/05/2013
| | | | |
|
Title:
|
SELECTIVE ERROR CONTROL CODING IN MEMORY DEVICES
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|
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|
|
Patent #:
|
|
Issue Dt:
|
11/24/2015
|
Application #:
|
14159041
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Filing Dt:
|
01/20/2014
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
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Title:
|
ERASING PHYSICAL MEMORY BLOCKS OF NON-VOLATILE MEMORY
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|
