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Reel/Frame:035225/0352   Pages: 83
Recorded: 03/19/2015
Attorney Dkt #:40767.149
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 100
Page 1 of 2
Pages: 1 2
1
Patent #:
6216191
Issue Dt:
04/10/2001
Application #:
08950444
Filing Dt:
10/15/1997
Title:
FIELD PROGRAMMABLE GATE ARRAY HAVING A DEDICATED PROCESSOR INTERFACE
2
Patent #:
5986471
Issue Dt:
11/16/1999
Application #:
08950446
Filing Dt:
10/15/1997
Title:
BI-DIRECTIONAL BUFFERS AND SUPPLEMENTAL LOGIC AND INTERCONNECT CELLS FOR PROGRAMMABLE LOGIC DEVICES
3
Patent #:
6060902
Issue Dt:
05/09/2000
Application #:
08950448
Filing Dt:
10/15/1997
Title:
PROGRAMMABLE CLOCK MANAGER FOR A PROGRAMMABLE LOGIC DEVICE THAT CAN BE PROGRAMMED WITHOUT RECONFIGURING THE DEVICE
4
Patent #:
6049224
Issue Dt:
04/11/2000
Application #:
08950624
Filing Dt:
10/15/1997
Title:
PROGRAMMABLE LOGIC DEVICE WITH LOGIC CELLS HAVING A FLEXIBLE INPUT STRUCTURE
5
Patent #:
6043677
Issue Dt:
03/28/2000
Application #:
08951128
Filing Dt:
10/15/1997
Title:
PROGRAMMABLE CLOCK MANAGER FOR A PROGRAMMABLE LOGIC DEVICE THAT CAN IMPLEMENT DELAY-LOCKED LOOP FUNCTIONS
6
Patent #:
6389321
Issue Dt:
05/14/2002
Application #:
08964421
Filing Dt:
11/04/1997
Publication #:
US20010041943
Pub Dt:
11/15/2001
Title:
SIMULTANEOUS WIRED AND WIRELESS REMOTE IN-SYSTEM PROGRAMMING OF MULTIPLE REMOTE SYSTEMS
7
Patent #:
6003150
Issue Dt:
12/14/1999
Application #:
08974799
Filing Dt:
11/20/1997
Title:
METHOD FOR TESTING FIELD PROGRAMMABLE GATE ARRAYS
8
Patent #:
5990702
Issue Dt:
11/23/1999
Application #:
08995612
Filing Dt:
12/22/1997
Title:
FLEXIBLE DIRECT CONNECTIONS BETWEEN INPUT/OUTPUT BLOCKS (IOBS) AND VARIABLE GRAIN BLOCKS (VGBS) IN FPGA INTEGRATED CIRCUITS
9
Patent #:
5982193
Issue Dt:
11/09/1999
Application #:
08995614
Filing Dt:
12/22/1997
Title:
INPUT/OUTPUT BLOCK (IOB) CONNECTIONS TO MAXL LINES NOR LINES AND DENDRITES IN FPGA INTEGRATED CIRCUITS
10
Patent #:
6034544
Issue Dt:
03/07/2000
Application #:
08995615
Filing Dt:
12/22/1997
Title:
PROGRAMMABLE INPUT/OUTPUT BLOCK (IOB) IN FPGA INTEGRATED CIRCUITS
11
Patent #:
6127843
Issue Dt:
10/03/2000
Application #:
08996049
Filing Dt:
12/22/1997
Title:
DUAL PORT SRAM MEMORY FOR RUN TIME USE IN FPGA INTEGRATED CIRCUITS
12
Patent #:
5986480
Issue Dt:
11/16/1999
Application #:
08996119
Filing Dt:
12/22/1997
Title:
MULTIPLE INPUT ZERO POWER AND /NOR GATE FOR USE IN A FIELD PROGRAMMABLE GATE ARRAY (FPGA)
13
Patent #:
6275064
Issue Dt:
08/14/2001
Application #:
08996361
Filing Dt:
12/22/1997
Title:
SYMMETICAL, EXTENDED AND FAST DIRECT CONNECTIONS BETWEEN VARIABLE GRAIN BLOCKS IN FPGA INTEGRATED CIRCUITS
14
Patent #:
6134703
Issue Dt:
10/17/2000
Application #:
08996530
Filing Dt:
12/23/1997
Title:
PROCESS FOR PROGRAMMING PLDS AND EMBEDDED NON-VOLATILE MEMORIES
15
Patent #:
6107823
Issue Dt:
08/22/2000
Application #:
08997221
Filing Dt:
12/22/1997
Title:
PROGRAMMABLE CONTROL MULTIPLEXING FOR INPUT/OUTPUT BLOCKS (IOBS) IN FPGA INTEGRATED CIRCUITS
16
Patent #:
6102963
Issue Dt:
08/15/2000
Application #:
08998978
Filing Dt:
12/29/1997
Title:
ELECTRICALLY ERASABLE AND REPROGRAMMABLE, NONVOLATILE INTEGRATED STORAGE DEVICE WITH IN-SYSTEM PROGRAMMING AND VERIFICATION (ISPAV) CAPABILITIES FOR SUPPORTING IN-SYSTEM RECONFIGURING OF PLD'S
17
Patent #:
6130551
Issue Dt:
10/10/2000
Application #:
09008762
Filing Dt:
01/19/1998
Title:
SYNTHESIS-FRIENDLY FPGA ARCHITECTURE WITH VARIABLE LENGTH AND VARIABLE TIMING INTERCONNECT
18
Patent #:
6034538
Issue Dt:
03/07/2000
Application #:
09010000
Filing Dt:
01/21/1998
Title:
VIRTUAL LOGIC SYSTEM FOR RECONFIGURABLE HARDWARE
19
Patent #:
6023570
Issue Dt:
02/08/2000
Application #:
09023506
Filing Dt:
02/13/1998
Title:
SEQUENTIAL AND SIMULTANEOUS MANUFACTURING PROGRAMMING OF MULTIPLE IN-SYSTEM PROGRAMMABLE SYSTEMS THROUGH A DATA NETWORK
20
Patent #:
6025637
Issue Dt:
02/15/2000
Application #:
09023669
Filing Dt:
02/10/1998
Title:
SPACER-BASED ANTIFUSE STRUCTURE FOR LOW CAPACITANCE AND HIGH RELIABILITY AND METHOD OF FABRICATION THEREOF
21
Patent #:
6093946
Issue Dt:
07/25/2000
Application #:
09026814
Filing Dt:
02/20/1998
Title:
EEPROM CELL WITH FIELD-EDGELESS TUNNEL WINDOW USING SHALLOW TRENCH ISOLATION PROCESS
22
Patent #:
6128770
Issue Dt:
10/03/2000
Application #:
09037095
Filing Dt:
03/09/1998
Title:
PROGRAMMABLE GATE ARRAY WITH IMPROVED INTERCONNECT STRUCTURE, INPUT/OUTPUT STRUCTURE AND CONFIGUABLE LOGIC BLOCK
23
Patent #:
6064225
Issue Dt:
05/16/2000
Application #:
09045128
Filing Dt:
03/20/1998
Title:
GLOBAL SIGNAL DISTRIBUTION WITH REDUCED ROUTING TRACKS IN AN FPGA
24
Patent #:
5982683
Issue Dt:
11/09/1999
Application #:
09046404
Filing Dt:
03/23/1998
Title:
AN ENHANCED METHOD OF TESTING SEMICONDUCTOR DEVICES HAVING NONVOLATILE ELEMENTS
25
Patent #:
6556154
Issue Dt:
04/29/2003
Application #:
09053251
Filing Dt:
03/31/1998
Title:
OFFSET VOLTAGE CALIBRATION DAC WITH REDUCED SENSITIVITY TO MISMATCH ERRORS
26
Patent #:
6108806
Issue Dt:
08/22/2000
Application #:
09059552
Filing Dt:
04/13/1998
Title:
METHOD OF TESTING AND DIAGNOSING FIELD PROGRAMMABLE GATE ARRAYS
27
Patent #:
6104207
Issue Dt:
08/15/2000
Application #:
09067318
Filing Dt:
04/27/1998
Title:
PROGRAMMABLE LOGIC DEVICE
28
Patent #:
6154050
Issue Dt:
11/28/2000
Application #:
09067320
Filing Dt:
04/27/1998
Title:
INTERNAL TRISTATE BUS WITH ARBITRATION LOGIC
29
Patent #:
6133750
Issue Dt:
10/17/2000
Application #:
09069035
Filing Dt:
04/27/1998
Title:
COMBINATION OF GLOBAL CLOCK AND LOCALIZED CLOCKS
30
Patent #:
6002610
Issue Dt:
12/14/1999
Application #:
09069768
Filing Dt:
04/30/1998
Title:
NON-VOLATILE MEMORY ELEMENT FOR PROGRAMMABLE LOGIC APPLICATIONS AND OPERATIONAL METHODS THEREFOR
31
Patent #:
6225821
Issue Dt:
05/01/2001
Application #:
09080906
Filing Dt:
05/18/1998
Title:
PACKAGE MIGRATION FOR RELATED PROGRAMMABLE LOGIC DEVICES
32
Patent #:
6255847
Issue Dt:
07/03/2001
Application #:
09083205
Filing Dt:
05/21/1998
Title:
PROGRAMMABLE LOGIC DEVICE
33
Patent #:
6304099
Issue Dt:
10/16/2001
Application #:
09083335
Filing Dt:
05/21/1998
Title:
METHOD AND STRUCTURE FOR DYNAMIC IN-SYSTEM PROGRAMMING
34
Patent #:
6066977
Issue Dt:
05/23/2000
Application #:
09083336
Filing Dt:
05/21/1998
Title:
PROGRAMMABLE OUTPUT VOLTAGE LEVELS
35
Patent #:
6087696
Issue Dt:
07/11/2000
Application #:
09086437
Filing Dt:
05/28/1998
Title:
STACKED TUNNELING DIELECTRIC TECHNOLOGY FOR IMPROVING DATA RETENTION OF EEPROM CELL
36
Patent #:
6202182
Issue Dt:
03/13/2001
Application #:
09109123
Filing Dt:
06/30/1998
Title:
METHOD AND APPARATUS FOR TESTING FIELD PROGRAMMABLE GATE ARRAYS
37
Patent #:
6028758
Issue Dt:
02/22/2000
Application #:
09114385
Filing Dt:
07/13/1998
Title:
ELECTROSTATIC DISCHARGE (ESD) PROTECTION FOR A 5.0 VOLT COMPATIBLE INPUT/OUTPUT (I/O) IN A 2.5 VOLT SEMICONDUCTOR PROCESS
38
Patent #:
6091595
Issue Dt:
07/18/2000
Application #:
09114717
Filing Dt:
07/13/1998
Title:
ELECTROSTATIC DISCHARGE (ESD) PROTECTION FOR NMOS PULL UP TRANSISTORS OF A 5.0 VOLT COMPATIBLE OUTPUT BUFFER USING 2.5 VOLT PROCESS TRANSISTORS
39
Patent #:
6043969
Issue Dt:
03/28/2000
Application #:
09114718
Filing Dt:
07/13/1998
Title:
BALLAST RESISTORS WITH PARALLEL STACKED NMOS TRANSISTORS USED TO PREVENT SECONDARY BREAKDOWN DURING ESD WITH 2.5 VOLT PROCESS TRANSISTORS
40
Patent #:
6124732
Issue Dt:
09/26/2000
Application #:
09115683
Filing Dt:
07/15/1998
Title:
SIGNALING VOLTAGE RANGE DISCRIMINATOR
41
Patent #:
6028446
Issue Dt:
02/22/2000
Application #:
09118200
Filing Dt:
07/17/1998
Title:
FLEXIBLE SYNCHRONOUS/AND ASYNCHRONOUS CIRCUITS FOR A VERY HIGH DENSITY PROGRAMMABLE LOGIC DEVICE
42
Patent #:
6064105
Issue Dt:
05/16/2000
Application #:
09134174
Filing Dt:
08/14/1998
Title:
DATA RETENTION OF EEPROM CELL WITH SHALLOW TRENCH ISOLATION USING THICKER LINER OXIDE
43
Patent #:
6087854
Issue Dt:
07/11/2000
Application #:
09145793
Filing Dt:
09/02/1998
Title:
HIGH SPEED LINE DRIVER WITH DIRECT AND COMPLEMENTARY OUTPUTS
44
Patent #:
6424003
Issue Dt:
07/23/2002
Application #:
09169492
Filing Dt:
10/09/1998
Publication #:
US20010042883
Pub Dt:
11/22/2001
Title:
EEPROM CELL WITH SELF-ALIGNED TUNNELING WINDOW
45
Patent #:
6347387
Issue Dt:
02/12/2002
Application #:
09169848
Filing Dt:
10/09/1998
Title:
TEST CIRCUITS FOR TESTING INTER-DEVICE FPGA LINKS INCLUDING A SHIFT REGISTER CONFIGURED FROM FPGA ELEMENTS TO FORM A SHIFT BLOCK THROUGH SAID INTER-DEVICE FPGA LINKS
46
Patent #:
6229336
Issue Dt:
05/08/2001
Application #:
09186917
Filing Dt:
11/06/1998
Title:
PROGRAMMABLE INTEGRATED CIRCUIT DEVICE WITH SLEW CONTROL AND SKEW CONTROL
47
Patent #:
6154051
Issue Dt:
11/28/2000
Application #:
09187689
Filing Dt:
11/05/1998
Title:
TILEABLE AND COMPACT LAYOUT FOR SUPER VARIABLE GRAIN BLOCKS WITHIN FPGA DEVICE
48
Patent #:
6228696
Issue Dt:
05/08/2001
Application #:
09187691
Filing Dt:
11/05/1998
Title:
SEMICONDUCTOR-OXIDE-SEMICONDUCTOR CAPACITOR FORMED IN INTEGRATED CIRCUIT
49
Patent #:
6169432
Issue Dt:
01/02/2001
Application #:
09188778
Filing Dt:
11/09/1998
Title:
HIGH VOLTAGE SWITCH FOR PROVIDING VOLTAGES HIGHER THAN 2.5 VOLTS WITH TRANSISTORS MADE USING A 2.5 VOLT PROCESS
50
Patent #:
6291327
Issue Dt:
09/18/2001
Application #:
09192094
Filing Dt:
11/13/1998
Title:
OPTIMIZATION OF S/D ANNEALING TO MINIMIZE S/D SHORTS IN MEMORY ARRAY
51
Patent #:
6221733
Issue Dt:
04/24/2001
Application #:
09192096
Filing Dt:
11/13/1998
Title:
REDUCTION OF MECHANICAL STRESS IN SHALLOW TRENCH ISOLATION PROCESS
52
Patent #:
5912550
Issue Dt:
06/15/1999
Application #:
09196080
Filing Dt:
11/19/1998
Title:
POWER CONVERTER WITH 2.5 VOLT SEMICONDUCTOR PROCESS COMPONENTS
53
Patent #:
6191612
Issue Dt:
02/20/2001
Application #:
09196449
Filing Dt:
11/19/1998
Title:
ENHANCED I/O CONTROL FLEXIBILITY FOR GENERATING CONTROL SIGNALS
54
Patent #:
6009033
Issue Dt:
12/28/1999
Application #:
09198653
Filing Dt:
11/24/1998
Title:
EEPROM DEVICE HAVING IMPROVED DATA RETENTION AND OPERATING METHOD
55
Patent #:
6218857
Issue Dt:
04/17/2001
Application #:
09198796
Filing Dt:
11/24/1998
Title:
VARIABLE SIZED LINE DRIVING AMPLIFIERS FOR INPUT/OUTPUT BLOCKS (IOBS) IN FPGA INTEGRATED CIRCUITS
56
Patent #:
6353352
Issue Dt:
03/05/2002
Application #:
09199664
Filing Dt:
11/25/1998
Title:
CLOCK TREE TOPOLOGY
57
Patent #:
6261944
Issue Dt:
07/17/2001
Application #:
09200395
Filing Dt:
11/24/1998
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING HIGH RELIABILITY PASSIVATION OVERLYING A MULTI-LEVEL INTERCONNECT
58
Patent #:
6133769
Issue Dt:
10/17/2000
Application #:
09201081
Filing Dt:
11/30/1998
Title:
PHASE LOCKED LOOP WITH A LOCK DETECTOR
59
Patent #:
6404006
Issue Dt:
06/11/2002
Application #:
09203149
Filing Dt:
12/01/1998
Publication #:
US20010030343
Pub Dt:
10/18/2001
Title:
EEPROM CELL WITH TUNNELING ACROSS ENTIRE SEPARATED CHANNELS
60
Patent #:
6175266
Issue Dt:
01/16/2001
Application #:
09207558
Filing Dt:
12/08/1998
Title:
OPERATIONAL AMPLIFIER WITH CMOS TRANSISTORS MADE USING 2.5 VOLT PROCESS TRANSISTORS
61
Patent #:
6163168
Issue Dt:
12/19/2000
Application #:
09208203
Filing Dt:
12/09/1998
Title:
EFFICIENT INTERCONNECT NETWORK FOR USE IN FPGA DEVICE HAVING VARIABLE GRAIN ARCHITECTURE
62
Patent #:
6124730
Issue Dt:
09/26/2000
Application #:
09212022
Filing Dt:
12/15/1998
Title:
METHODS FOR CONFIGURING FPGA'S HAVING VARIABLE GRAIN COMPONENTS FOR PROVIDING TIME-SHARED ACCESS TO INTERCONNECT RESOURCES
63
Patent #:
6100715
Issue Dt:
08/08/2000
Application #:
09212330
Filing Dt:
12/15/1998
Title:
METHODS FOR CONFIGURING FPGA'S HAVING VARIABLE GRAIN BLOCKS AND LOGIC FOR PROVIDING TIME-SHARED ACCESS TO INTERCONNECT RESOURCES
64
Patent #:
6081473
Issue Dt:
06/27/2000
Application #:
09212331
Filing Dt:
12/15/1998
Title:
FPGA INTEGRATED CIRCUIT HAVING EMBEDDED SRAM MEMORY BLOCKS EACH WITH STATICALLY AND DYNAMICALLY CONTROLLABLE READ MODE
65
Patent #:
6214666
Issue Dt:
04/10/2001
Application #:
09216051
Filing Dt:
12/18/1998
Title:
METHOD OF FORMING A NON-VOLATILE MEMORY DEVICE
66
Patent #:
6204686
Issue Dt:
03/20/2001
Application #:
09216662
Filing Dt:
12/16/1998
Title:
METHODS FOR CONFIGURING FPGA'S HAVING VARIABLE GRAIN BLOCKS AND SHARED LOGIC FOR PROVIDING SYMMETRIC ROUTING OF RESULT OUTPUT TO DIFFERENTLY-DIRECTED AND TRISTATEABLE INTERCONNECT RESOURCES
67
Patent #:
6282123
Issue Dt:
08/28/2001
Application #:
09217646
Filing Dt:
12/21/1998
Title:
METHOD OF FABRICATING PROGRAMMING AND ERASING A DUAL POCKET TWO SIDED PROGRAM/ERASE NON-VOLATILE MEMORY CELL
68
Patent #:
5969992
Issue Dt:
10/19/1999
Application #:
09217647
Filing Dt:
12/21/1998
Title:
EEPROM CELL USING P-WELL FOR TUNNELING ACROSS A CHANNEL
69
Patent #:
6232631
Issue Dt:
05/15/2001
Application #:
09217648
Filing Dt:
12/21/1998
Title:
FLOATING GATE MEMORY CELL STRUCTURE WITH PROGRAMMING MECHANISM OUTSIDE THE READ PATH
70
Patent #:
6294810
Issue Dt:
09/25/2001
Application #:
09218987
Filing Dt:
12/22/1998
Title:
EEPROM CELL WITH TUNNELING AT SEPARATE EDGE AND CHANNEL REGIONS
71
Patent #:
6157568
Issue Dt:
12/05/2000
Application #:
09220469
Filing Dt:
12/23/1998
Title:
AVALANCHE PROGRAMMED FLOATING GATE MEMORY CELL STRUCTURE WITH PROGRAM ELEMENT IN FIRST POLYSILICON LAYER
72
Patent #:
6294809
Issue Dt:
09/25/2001
Application #:
09221360
Filing Dt:
12/28/1998
Title:
AVALANCHE PROGRAMMED FLOATING GATE MEMORY CELL STRUCTURE WITH PROGRAM ELEMENT IN POLYSILICON
73
Patent #:
6215700
Issue Dt:
04/10/2001
Application #:
09226702
Filing Dt:
01/07/1999
Title:
PMOS AVALANCHE PROGRAMMED FLOATING GATE MEMORY CELL STRUCTURE
74
Patent #:
6197638
Issue Dt:
03/06/2001
Application #:
09227981
Filing Dt:
01/08/1999
Title:
OXIDE FORMATION PROCESS FOR MANUFACTURING PROGRAMMABLE LOGIC DEVICE
75
Patent #:
6181163
Issue Dt:
01/30/2001
Application #:
09235351
Filing Dt:
01/21/1999
Title:
FPGA INTEGRATED CIRCUIT HAVING EMBEDDED SRAM MEMORY BLOCKS AND INTERCONNECT CHANNEL FOR BROADCASTING ADDRESS AND CONTROL SIGNALS
76
Patent #:
6097664
Issue Dt:
08/01/2000
Application #:
09235356
Filing Dt:
01/21/1999
Title:
MULTI-PORT SRAM CELL ARRAY HAVING PLURAL WRITE PATHS INCLUDING FOR WRITING THROUGH ADDRESSABLE PORT AND THROUGH SERIAL BOUNDARY SCAN
77
Patent #:
6211695
Issue Dt:
04/03/2001
Application #:
09235615
Filing Dt:
01/21/1999
Title:
FPGA INTEGRATED CIRCUIT HAVING EMBEDDED SRAM MEMORY BLOCKS WITH REGISTERED ADDRESS AND DATA INPUT SECTIONS
78
Patent #:
5999449
Issue Dt:
12/07/1999
Application #:
09239072
Filing Dt:
01/27/1999
Title:
TWO TRANSISTOR EEPROM CELL USING P-WELL FOR TUNNELING ACROSS A CHANNEL
79
Patent #:
6297128
Issue Dt:
10/02/2001
Application #:
09240560
Filing Dt:
01/29/1999
Title:
PROCESS FOR MANUFACTURING SHALLOW TRENCHES FILLED WITH DIELECTRIC MATERIAL HAVING LOW MECHANICAL STRESS
80
Patent #:
6294811
Issue Dt:
09/25/2001
Application #:
09245813
Filing Dt:
02/05/1999
Title:
TWO TRANSISTOR EEPROM CELL
81
Patent #:
6255169
Issue Dt:
07/03/2001
Application #:
09255053
Filing Dt:
02/22/1999
Title:
PROCESS FOR FABRICATING A HIGH-ENDURANCE NON-VOLATILE MEMORY DEVICE
82
Patent #:
6075724
Issue Dt:
06/13/2000
Application #:
09255410
Filing Dt:
02/22/1999
Title:
METHOD FOR SORTING SEMICONDUCTOR DEVICES HAVING A PLURALITY OF NON-VOLATILE MEMORY CELLS
83
Patent #:
6133164
Issue Dt:
10/17/2000
Application #:
09256245
Filing Dt:
02/23/1999
Title:
FABRICATION OF OXIDE REGIONS HAVING MULTIPLE THICKNESSES USING MINIMIZED NUMBER OF THERMAL CYCLES
84
Patent #:
6256758
Issue Dt:
07/03/2001
Application #:
09261776
Filing Dt:
03/03/1999
Title:
FAULT TOLERANT OPERATION OF FIELD PROGRAMMABLE GATE ARRAYS
85
Patent #:
6075293
Issue Dt:
06/13/2000
Application #:
09263412
Filing Dt:
03/05/1999
Title:
SEMICONDUCTOR DEVICE HAVING A MULTI-LAYER METAL INTERCONNECT STRUCTURE
86
Patent #:
6207989
Issue Dt:
03/27/2001
Application #:
09268897
Filing Dt:
03/16/1999
Title:
NON-VOLATILE MEMORY DEVICE HAVING A HIGH-RELIABILITY COMPOSITE INSULATON LAYER
87
Patent #:
6163175
Issue Dt:
12/19/2000
Application #:
09276990
Filing Dt:
03/26/1999
Title:
HIGH VOLTAGE DETECTOR TO CONTROL A POWER SUPPLY VOLTAGE PUMP FOR A 2.5 VOLT SEMICONDUCTOR PROCESS DEVICE
88
Patent #:
6031365
Issue Dt:
02/29/2000
Application #:
09276991
Filing Dt:
03/26/1999
Title:
BAND GAP REFERENCE USING A LOW VOLTAGE POWER SUPPLY
89
Patent #:
6326663
Issue Dt:
12/04/2001
Application #:
09277441
Filing Dt:
03/26/1999
Title:
AVALANCHE INJECTION EEPROM MEMORY CELL WITH P-TYPE CONTROL GATE
90
Patent #:
6172392
Issue Dt:
01/09/2001
Application #:
09280887
Filing Dt:
03/29/1999
Title:
BORON DOPED SILICON CAPACITOR PLATE
91
Patent #:
6284626
Issue Dt:
09/04/2001
Application #:
09286830
Filing Dt:
04/06/1999
Title:
ANGLED NITROGEN ION IMPLANTATION FOR MINIMIZING MECHANICAL STRESS ON SIDE WALLS OF AN ISOLATION TRENCH
92
Patent #:
6413826
Issue Dt:
07/02/2002
Application #:
09287976
Filing Dt:
04/07/1999
Publication #:
US20020009855
Pub Dt:
01/24/2002
Title:
HIGH DIELECTRIC GATE INSULATOR PROCESS FOR NANOMETER MOSFETS
93
Patent #:
6265900
Issue Dt:
07/24/2001
Application #:
09288062
Filing Dt:
04/07/1999
Title:
HIGH SPEED LOGICAL OR CIRCUIT
94
Patent #:
6424000
Issue Dt:
07/23/2002
Application #:
09310071
Filing Dt:
05/11/1999
Title:
FLOATING GATE MEMORY APPARATUS AND METHOD FOR SELECTED PROGRAMMING THEREOF
95
Patent #:
6274898
Issue Dt:
08/14/2001
Application #:
09316241
Filing Dt:
05/21/1999
Title:
TRIPLE-WELL EEPROM CELL USING P-WELL FOR TUNNELING ACROSS A CHANNEL
96
Patent #:
6552595
Issue Dt:
04/22/2003
Application #:
09318570
Filing Dt:
05/26/1999
Title:
CURRENT-CONTROLLED HIGH VOLTAGE DISCHARGE SCHEME
97
Patent #:
6118693
Issue Dt:
09/12/2000
Application #:
09320389
Filing Dt:
05/26/1999
Title:
ELECTRICALLY ERASABLE NON-VOLATILE MEMORY CELL WITH INTEGRATED SCRAM CELL TO REDUCE TESTING TIME
98
Patent #:
6067252
Issue Dt:
05/23/2000
Application #:
09320392
Filing Dt:
05/26/1999
Title:
ELECTRICALLY ERASABLE NON-VOLATILE MEMORY CELL WITH NO POWER DISSIPATION
99
Patent #:
6150841
Issue Dt:
11/21/2000
Application #:
09326140
Filing Dt:
06/06/1999
Title:
ENHANCED MACROCELL MODULE FOR HIGH DENSITY CPLD ARCHITECTURES
100
Patent #:
6184713
Issue Dt:
02/06/2001
Application #:
09326940
Filing Dt:
06/06/1999
Title:
SCALABLE ARCHITECTURE FOR HIGH DENSITY CPLD'S HAVING TWO-LEVEL HIERARACHY OF ROUTING RESOURCES
Assignors
1
LATTICE SEMICONDUCTOR CORPORATION
Exec Dt:
03/10/2015
2
SIBEAM, INC.
Exec Dt:
03/10/2015
3
SILICON IMAGE, INC.
Exec Dt:
03/10/2015
4
DVDO, INC.
Exec Dt:
03/10/2015
Assignee
1
JEFFERIES FINANCE LLC
520 MADISON AVENUE
NEW YORK, NEW YORK 10022
Correspondence name and address
PROSKAUER ROSE LLP
ONE INTERNATIONAL PLACE
BOSTON, MA 02110

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