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Reel/Frame:	035309/0142			Pages:	83
		Recorded:	03/24/2015
Attorney Dkt #:	40767-149
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 93

1

Patent #:	4642797	Issue Dt:	02/10/1987	Application #:	06551735	Filing Dt:	11/10/1983
Title:	HIGH SPEED FIRST-IN-FIRST-OUT MEMORY

2

Patent #:	4833646	Issue Dt:	05/23/1989	Application #:	06707670	Filing Dt:	03/04/1985
Title:	PROGRAMMABLE LOGIC DEVICE WITH LIMITED SENSE CURRENTS AND NOISE ISOLATION

3

Patent #:	4879688	Issue Dt:	11/07/1989	Application #:	06862815	Filing Dt:	05/13/1986
Title:	IN-SYSTEM PROGRAMMABLE LOGIC DEVICE

4

Patent #:	4766569	Issue Dt:	08/23/1988	Application #:	06871063	Filing Dt:	06/05/1986
Title:	PROGRAMMABLE LOGIC ARRAY

5

Patent #:	4887239	Issue Dt:	12/12/1989	Application #:	06882602	Filing Dt:	07/07/1986
Title:	ONE-TIME PROGRAMMABLE DATA SECURITY SYSTEM FOR PROGRAMMABLE LOGIC DEVICE

6

Patent #:	4852044	Issue Dt:	07/25/1989	Application #:	07236348	Filing Dt:	08/22/1988
Title:	PROGRAMMABLE DATA SECURITY CIRCUIT FOR PROGRAMMABLE LOGIC DEVICE

7

Patent #:	4896296	Issue Dt:	01/23/1990	Application #:	07288945	Filing Dt:	12/23/1988
Title:	PROGRAMMABLE LOGIC DEVICE CONFIGURABLE INPUT/OUTPUT CELL

8

Patent #:	5255203	Issue Dt:	10/19/1993	Application #:	07538211	Filing Dt:	06/14/1990
Title:	INTERCONNECT STRUCTURE FOR PROGRAMMABLE LOGIC DEVICE

9

Patent #:	5255221	Issue Dt:	10/19/1993	Application #:	07679370	Filing Dt:	04/02/1991
Title:	FULLY CONFIGURABLE VERSATILE FIELD PROGRAMMABLE FUNCTION ELEMENT

10

Patent #:	5251169	Issue Dt:	10/05/1993	Application #:	07696453	Filing Dt:	05/06/1991
Title:	NON-VOLATILE ERASABLE AND PROGRAMMABLE INTERCONNECT CELL

11

Patent #:	5281906	Issue Dt:	01/25/1994	Application #:	07785442	Filing Dt:	10/29/1991
Title:	TUNABLE VOLTAGE REFERENCE CIRCUIT TO PROVIDE AN OUTPUT VOLTAGE WITH A PREDETERMINED TEMPERATURE COEFFICIENT INDEPENDENT OF VARIATION IN SUPPLY VOLTAGE

12

Patent #:	5231316	Issue Dt:	07/27/1993	Application #:	07853453	Filing Dt:	03/17/1992
Title:	TEMPERATURE COMPENSATED CMOS VOLTAGE TO CURRENT CONVERTER

13

Patent #:	5357156	Issue Dt:	10/18/1994	Application #:	07911841	Filing Dt:	07/10/1992
Title:	ACTIVE CLAMP CIRCUIT SCHEME FOR CMOS DEVICES

14

Patent #:	5329179	Issue Dt:	07/12/1994	Application #:	07957311	Filing Dt:	10/05/1992
Title:	ARRANGEMENT FOR PARALLEL PROGRAMMING OF IN-SYSTEM PROGRAMMABLE IC LOGIC DEVICES

15

Patent #:	5452229	Issue Dt:	09/19/1995	Application #:	07993711	Filing Dt:	12/18/1992
Title:	PROGRAMMABLE INTEGRATED-CIRCUIT SWITCH

16

Patent #:	5418390	Issue Dt:	05/23/1995	Application #:	08033934	Filing Dt:	03/19/1993
Title:	SINGLE POLYSILICON LAYER E2PROM CELL

17

Patent #:	5394037	Issue Dt:	02/28/1995	Application #:	08042533	Filing Dt:	04/05/1993
Title:	SENSE AMPLIFIERS AND SENSING METHODS

18

Patent #:	5412260	Issue Dt:	05/02/1995	Application #:	08106263	Filing Dt:	08/13/1993
Title:	MULTIPLEXED CONTROL PINS FOR IN-SYSTEM PROGRAMMING AND BOUNDARY SCAN STATE MACHINES IN A HIGH DENSITY PROGRAMMABLE LOGIC DEVICE

19

Patent #:	5353246	Issue Dt:	10/04/1994	Application #:	08108363	Filing Dt:	08/18/1993
Title:	PROGRAMMABLE SEMICONDUCTOR ANTIFUSE STRUCTURE AND METHOD OF FABRICATING

20

Patent #:	5404055	Issue Dt:	04/04/1995	Application #:	08115533	Filing Dt:	09/01/1993
Title:	INPUT ROUTING POOL

21

Patent #:	5394033	Issue Dt:	02/28/1995	Application #:	08115723	Filing Dt:	09/01/1993
Title:	STRUCTURE AND METHOD FOR IMPLEMENTING HIERARCHICAL ROUTING POOLS IN A PROGRAMMABLE LOGIC CIRCUIT

22

Patent #:	5886378	Issue Dt:	03/23/1999	Application #:	08179887	Filing Dt:	01/10/1994
Title:	SINGLE POLYSILICON LAYER FLASH E2PROM CELL

23

Patent #:	5506517	Issue Dt:	04/09/1996	Application #:	08342675	Filing Dt:	11/21/1994
Title:	OUTPUT ENABLE STRUCTURE AND METHOD FOR A PROGRAMMABLE LOGIC DEVICE

24

Patent #:	6786564	Issue Dt:	09/07/2004	Application #:	10253507	Filing Dt:	09/25/2002
Publication #:	US20030020772	Pub Dt:	01/30/2003
Title:	INKJET PRINTER, DRIVE METHOD AND DRIVE DEVICE FOR SAME

25

Patent #:	7411424	Issue Dt:	08/12/2008	Application #:	11400924	Filing Dt:	04/10/2006
Publication #:	US20070176644	Pub Dt:	08/02/2007
Title:	PROGRAMMABLE LOGIC FUNCTION GENERATOR USING NON-VOLATILE PROGRAMMABLE MEMORY SWITCHES

26

Patent #:	7327160	Issue Dt:	02/05/2008	Application #:	11676196	Filing Dt:	02/16/2007
Title:	SERDES WITH PROGRAMMABLE I/O ARCHITECTURE

27

Patent #:	7856050	Issue Dt:	12/21/2010	Application #:	11839107	Filing Dt:	08/15/2007
Title:	RECEIVER AND TRANSMITTER CALIBRATION TO COMPENSATE FOR FREQUENCY DEPENDENT I/Q IMBALANCE

28

Patent #:	7427874	Issue Dt:	09/23/2008	Application #:	11949454	Filing Dt:	12/03/2007
Title:	INTERFACE BLOCK ARCHITECTURES

29

Patent #:	8314632	Issue Dt:	11/20/2012	Application #:	13193984	Filing Dt:	07/29/2011
Title:	METHOD AND SYSTEM FOR PLACING INTEGRATED CIRCUITS INTO PREDOMINANTLY ULTRA-LOW VOLTAGE MODE FOR STANDBY PURPOSES

30

Patent #:	8451679	Issue Dt:	05/28/2013	Application #:	13212121	Filing Dt:	08/17/2011
Title:	DUAL-PORT SRAM WITH BIT LINE CLAMPING

31

Patent #:	8169237	Issue Dt:	05/01/2012	Application #:	13275102	Filing Dt:	10/17/2011
Title:	COMPARATOR WITH JITTER MITIGATION

32

Patent #:	8370691	Issue Dt:	02/05/2013	Application #:	13299507	Filing Dt:	11/18/2011
Title:	TESTING OF SOFT ERROR DETECTION LOGIC FOR PROGRAMMABLE LOGIC DEVICES

33

Patent #:	8977885	Issue Dt:	03/10/2015	Application #:	13412408	Filing Dt:	03/05/2012
Title:	PROGRAMMABLE LOGIC DEVICE DATA RATE BOOSTER FOR DIGITAL SIGNAL PROCESSING

34

Patent #:	8823561	Issue Dt:	09/02/2014	Application #:	13452060	Filing Dt:	04/20/2012
Title:	IN-SYSTEM RECONFIGURABLE CIRCUIT FOR MAPPING DATA WORDS OF DIFFERENT LENGTHS

35

Patent #:	8461894	Issue Dt:	06/11/2013	Application #:	13585142	Filing Dt:	08/14/2012
Title:	LOW-POWER CONFIGURABLE DELAY ELEMENT

36

Patent #:	8912933	Issue Dt:	12/16/2014	Application #:	13616173	Filing Dt:	09/14/2012
Title:	SERIALIZER WITH MULTIPLE STAGES

37

Patent #:	8710898	Issue Dt:	04/29/2014	Application #:	13653827	Filing Dt:	10/17/2012
Title:	TRIPLE-TRIM REFERENCE VOLTAGE GENERATOR

38

Patent #:	8643398	Issue Dt:	02/04/2014	Application #:	13680947	Filing Dt:	11/19/2012
Title:	PLACING INTEGRATED CIRCUITS INTO LOW VOLTAGE MODE FOR STANDBY PURPOSES

39

Patent #:	9819478	Issue Dt:	11/14/2017	Application #:	13681782	Filing Dt:	11/20/2012
Title:	MULTI-CHANNEL TRANSMITTER SYNCHRONIZATION CIRCUITRY

40

Patent #:	8643168	Issue Dt:	02/04/2014	Application #:	13685385	Filing Dt:	11/26/2012
Title:	INTEGRATED CIRCUIT PACKAGE WITH INPUT CAPACITANCE COMPENSATION

41

Patent #:	8686773	Issue Dt:	04/01/2014	Application #:	13721867	Filing Dt:	12/20/2012
Title:	IN-SYSTEM MARGIN MEASUREMENT CIRCUIT

42

Patent #:	8797064	Issue Dt:	08/05/2014	Application #:	13738265	Filing Dt:	01/10/2013
Title:	HYBRID H-BRIDGE AND CML DRIVER

43

Patent #:	RE45200	Issue Dt:	10/21/2014	Application #:	13764221	Filing Dt:	02/11/2013
Title:	PROGRAMMABLE SIGNAL ROUTING SYSTEMS HAVING LOW STATIC LEAKAGE

44

Patent #:	9191022	Issue Dt:	11/17/2015	Application #:	13777243	Filing Dt:	02/26/2013
Publication #:	US20140104934	Pub Dt:	04/17/2014
Title:	LEAKAGE-CURRENT ABATEMENT CIRCUITRY FOR MEMORY ARRAYS

45

Patent #:	8786482	Issue Dt:	07/22/2014	Application #:	13857919	Filing Dt:	04/05/2013
Title:	INTEGRATED CIRCUIT WITH PIN FOR SETTING DIGITAL ADDRESS

46

Patent #:	8977917	Issue Dt:	03/10/2015	Application #:	13858422	Filing Dt:	04/08/2013
Publication #:	US20140136914	Pub Dt:	05/15/2014
Title:	HIGHLY SECURE AND EXTENSIVE SCAN TESTING OF INTEGRATED CIRCUITS

47

Patent #:	9197237	Issue Dt:	11/24/2015	Application #:	13868738	Filing Dt:	04/23/2013
Publication #:	US20140105265	Pub Dt:	04/17/2014
Title:	LOSS OF SIGNAL DETECTION FOR HIGH-SPEED SERIAL LINKS

48

Patent #:	8648636	Issue Dt:	02/11/2014	Application #:	13892948	Filing Dt:	05/13/2013
Publication #:	US20130249717	Pub Dt:	09/26/2013
Title:	DELAYING DATA SIGNALS

49

Patent #:	8971146	Issue Dt:	03/03/2015	Application #:	13901853	Filing Dt:	05/24/2013
Publication #:	US20130258761	Pub Dt:	10/03/2013
Title:	DUAL-PORT SRAM WITH BIT LINE CLAMPING

50

Patent #:	9722612	Issue Dt:	08/01/2017	Application #:	13904861	Filing Dt:	05/29/2013
Publication #:	US20140108628	Pub Dt:	04/17/2014
Title:	CONFIGURATION SEQUENCE FOR PROGRAMMABLE LOGIC DEVICE

51

Patent #:	9559694	Issue Dt:	01/31/2017	Application #:	13947553	Filing Dt:	07/22/2013
Publication #:	US20150022233	Pub Dt:	01/22/2015
Title:	Stable Supply-Side Reference Over Extended Voltage Range With Hot-Plugging Compatibility

52

Patent #:	NONE	Issue Dt:		Application #:	14021513	Filing Dt:	09/09/2013
Publication #:	US20140009194	Pub Dt:	01/09/2014
Title:	PHASE LOCKED LOOP CIRCUIT WITH SELECTABLE FEEDBACK PATHS

53

Patent #:	8829944	Issue Dt:	09/09/2014	Application #:	14040955	Filing Dt:	09/30/2013
Title:	DYNAMIC POWER SUPPLY SWITCHING FOR CLOCKING SIGNALS

54

Patent #:	9910818	Issue Dt:	03/06/2018	Application #:	14043920	Filing Dt:	10/02/2013
Publication #:	US20150095534	Pub Dt:	04/02/2015
Title:	Serdes Interface Architecture for Multi-Processor Systems

55

Patent #:	9710578	Issue Dt:	07/18/2017	Application #:	14053026	Filing Dt:	10/14/2013
Publication #:	US20140109031	Pub Dt:	04/17/2014
Title:	CONFIGURATION OF SELECTED MODULES OF A HARDWARE BLOCK WITHIN A PROGRAMMABLE LOGIC DEVICE

56

Patent #:	9345137	Issue Dt:	05/17/2016	Application #:	14070975	Filing Dt:	11/04/2013
Publication #:	US20150124419	Pub Dt:	05/07/2015
Title:	Partially Depopulated Interconnection Arrays for Packaged Semiconductor Devices and Printed Circuit Boards

57

Patent #:	9537308	Issue Dt:	01/03/2017	Application #:	14095310	Filing Dt:	12/03/2013
Publication #:	US20150155707	Pub Dt:	06/04/2015
Title:	ESD PROTECTION USING SHARED RC TRIGGER

58

Patent #:	NONE	Issue Dt:		Application #:	14136482	Filing Dt:	12/20/2013
Publication #:	US20150178436	Pub Dt:	06/25/2015
Title:	CLOCK ASSIGNMENTS FOR PROGRAMMABLE LOGIC DEVICE

59

Patent #:	9152756	Issue Dt:	10/06/2015	Application #:	14137443	Filing Dt:	12/20/2013
Publication #:	US20150178437	Pub Dt:	06/25/2015
Title:	GROUP BASED ROUTING IN PROGRAMMABLE LOGIC DEVICE

60

Patent #:	9515643	Issue Dt:	12/06/2016	Application #:	14147796	Filing Dt:	01/06/2014
Publication #:	US20150194953	Pub Dt:	07/09/2015
Title:	HOT-SOCKET CIRCUITRY

61

Patent #:	9172366	Issue Dt:	10/27/2015	Application #:	14172678	Filing Dt:	02/04/2014
Publication #:	US20150222258	Pub Dt:	08/06/2015
Title:	COLLECTOR CURRENT DRIVER FOR A BIPOLAR JUNCTION TRANSISTOR TEMPERATURE TRANSDUCER

62

Patent #:	9230617	Issue Dt:	01/05/2016	Application #:	14179651	Filing Dt:	02/13/2014
Publication #:	US20140233326	Pub Dt:	08/21/2014
Title:	LOW-VOLTAGE CURRENT SENSE AMPLIFER

63

Patent #:	10262096	Issue Dt:	04/16/2019	Application #:	14194484	Filing Dt:	02/28/2014
Publication #:	US20150248512	Pub Dt:	09/03/2015
Title:	COMPONENT PLACEMENT WITH REPACKING FOR PROGRAMMABLE LOGIC DEVICES

64

Patent #:	9606954	Issue Dt:	03/28/2017	Application #:	14220377	Filing Dt:	03/20/2014
Publication #:	US20150199291	Pub Dt:	07/16/2015
Title:	Communicating with MIPI-Compliant Devices Using Non-MIPI Interfaces

65

Patent #:	9009379	Issue Dt:	04/14/2015	Application #:	14223096	Filing Dt:	03/24/2014
Title:	Communicating with MIPI-Compliant Devices Using Non-MIPI Interfaces

66

Patent #:	9535445	Issue Dt:	01/03/2017	Application #:	14245920	Filing Dt:	04/04/2014
Publication #:	US20150286240	Pub Dt:	10/08/2015
Title:	TRANSISTOR MATCHING FOR GENERATION OF PRECISE CURRENT RATIOS

67

Patent #:	9437506	Issue Dt:	09/06/2016	Application #:	14271331	Filing Dt:	05/06/2014
Publication #:	US20140335631	Pub Dt:	11/13/2014
Title:	SEMICONDUCTOR DEFECT CHARACTERIZATION

68

Patent #:	9449133	Issue Dt:	09/20/2016	Application #:	14271955	Filing Dt:	05/07/2014
Publication #:	US20150324509	Pub Dt:	11/12/2015
Title:	PARTITION BASED DESIGN IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES

69

Patent #:	9728273	Issue Dt:	08/08/2017	Application #:	14283329	Filing Dt:	05/21/2014
Publication #:	US20150340103	Pub Dt:	11/26/2015
Title:	Embedded Memory Testing Using Back-To-Back Write/Read Operations

70

Patent #:	9287872	Issue Dt:	03/15/2016	Application #:	14308747	Filing Dt:	06/19/2014
Publication #:	US20150372679	Pub Dt:	12/24/2015
Title:	PVT Compensation Scheme for Output Buffers

71

Patent #:	NONE	Issue Dt:		Application #:	14313443	Filing Dt:	06/24/2014
Publication #:	US20150370672	Pub Dt:	12/24/2015
Title:	TRIGGER DETECTION FOR POST CONFIGURATION TESTING OF PROGRAMMABLE LOGIC DEVICES

72

Patent #:	9330217	Issue Dt:	05/03/2016	Application #:	14313778	Filing Dt:	06/24/2014
Publication #:	US20150370941	Pub Dt:	12/24/2015
Title:	HOLDTIME CORRECTION USING INPUT/OUTPUT BLOCK DELAY

73

Patent #:	9841945	Issue Dt:	12/12/2017	Application #:	14316049	Filing Dt:	06/26/2014
Publication #:	US20150378682	Pub Dt:	12/31/2015
Title:	EFFICIENT CONSTANT MULTIPLIER IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES

74

Patent #:	9152753	Issue Dt:	10/06/2015	Application #:	14319481	Filing Dt:	06/30/2014
Title:	INCREMENTER ABSORPTION INTO MULTIPLIER LOGIC FOR PROGRAMMABLE LOGIC DEVICES

75

Patent #:	9286952	Issue Dt:	03/15/2016	Application #:	14320074	Filing Dt:	06/30/2014
Publication #:	US20150380064	Pub Dt:	12/31/2015
Title:	SRAM WITH TWO-LEVEL VOLTAGE REGULATOR

76

Patent #:	9576093	Issue Dt:	02/21/2017	Application #:	14320169	Filing Dt:	06/30/2014
Publication #:	US20150379164	Pub Dt:	12/31/2015
Title:	MIXED-WIDTH MEMORY TECHNIQUES FOR PROGRAMMABLE LOGIC DEVICES

77

Patent #:	9772856	Issue Dt:	09/26/2017	Application #:	14327811	Filing Dt:	07/10/2014
Publication #:	US20160011878	Pub Dt:	01/14/2016
Title:	SYSTEM-LEVEL DUAL-BOOT CAPABILITY IN SYSTEMS HAVING ONE OR MORE DEVICES WITHOUT NATIVE DUAL-BOOT CAPABILITY

78

Patent #:	NONE	Issue Dt:		Application #:	14339164	Filing Dt:	07/23/2014
Publication #:	US20160026745	Pub Dt:	01/28/2016
Title:	CLOCK TO OUT PATH OPTIMIZATION

79

Patent #:	9390220	Issue Dt:	07/12/2016	Application #:	14339229	Filing Dt:	07/23/2014
Publication #:	US20160026746	Pub Dt:	01/28/2016
Title:	BUS-BASED CLOCK TO OUT PATH OPTIMIZATION

80

Patent #:	NONE	Issue Dt:		Application #:	14482001	Filing Dt:	09/10/2014
Publication #:	US20150310933	Pub Dt:	10/29/2015
Title:	Configurable Test Address And Data Generation For Multimode Memory Built-In Self-Testing

81

Patent #:	9390210	Issue Dt:	07/12/2016	Application #:	14509564	Filing Dt:	10/08/2014
Publication #:	US20150347642	Pub Dt:	12/03/2015
Title:	LOGIC ABSORPTION TECHNIQUES FOR PROGRAMMABLE LOGIC DEVICES

82

Patent #:	NONE	Issue Dt:		Application #:	14525240	Filing Dt:	10/28/2014
Publication #:	US20160118987	Pub Dt:	04/28/2016
Title:	Level Shifter With Low Static Power Dissipation

83

Patent #:	NONE	Issue Dt:		Application #:	14535351	Filing Dt:	11/07/2014
Publication #:	US20160134264	Pub Dt:	05/12/2016
Title:	META-STABILITY PREVENTION FOR OSCILLATORS

84

Patent #:	9407208	Issue Dt:	08/02/2016	Application #:	14535454	Filing Dt:	11/07/2014
Publication #:	US20160134238	Pub Dt:	05/12/2016
Title:	CLASS AB AMPLIFIER WITH PROGRAMMABLE QUIESCENT CURRENT

85

Patent #:	9325302	Issue Dt:	04/26/2016	Application #:	14558851	Filing Dt:	12/03/2014
Title:	PROGRAMMABLE FILTER

86

Patent #:	NONE	Issue Dt:		Application #:	14576245	Filing Dt:	12/19/2014
Publication #:	US20160179707	Pub Dt:	06/23/2016
Title:	Sharing a Common Resource Via Multiple Interfaces

87

Patent #:	10296061	Issue Dt:	05/21/2019	Application #:	14576348	Filing Dt:	12/19/2014
Publication #:	US20160179071	Pub Dt:	06/23/2016
Title:	Reconfigurable and Scalable Hardware Management Architecture

88

Patent #:	9575123	Issue Dt:	02/21/2017	Application #:	14604515	Filing Dt:	01/23/2015
Publication #:	US20160216330	Pub Dt:	07/28/2016
Title:	REGISTERS FOR POST CONFIGURATION TESTING OF PROGRAMMABLE LOGIC DEVICES

89

Patent #:	9819174	Issue Dt:	11/14/2017	Application #:	14609181	Filing Dt:	01/29/2015
Publication #:	US20160226241	Pub Dt:	08/04/2016
Title:	HOTSWAP OPERATIONS FOR PROGRAMMABLE LOGIC DEVICES

90

Patent #:	9735761	Issue Dt:	08/15/2017	Application #:	14610074	Filing Dt:	01/30/2015
Publication #:	US20160028400	Pub Dt:	01/28/2016
Title:	FLEXIBLE RIPPLE MODE DEVICE IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES

91

Patent #:	9716491	Issue Dt:	07/25/2017	Application #:	14610127	Filing Dt:	01/30/2015
Publication #:	US20160028401	Pub Dt:	01/28/2016
Title:	MULTIPLE MODE DEVICE IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES

92

Patent #:	9543950	Issue Dt:	01/10/2017	Application #:	14611069	Filing Dt:	01/30/2015
Publication #:	US20160020767	Pub Dt:	01/21/2016
Title:	HIGH SPEED COMPLEMENTARY NMOS LUT LOGIC

93

Patent #:	9252755	Issue Dt:	02/02/2016	Application #:	14611095	Filing Dt:	01/30/2015
Publication #:	US20160028383	Pub Dt:	01/28/2016
Title:	SHARED LOGIC FOR MULTIPLE REGISTERS WITH ASYNCHRONOUS INITIALIZATION

Assignors

1

LATTICE SEMICONDUCTOR CORPORATION

Exec Dt:

03/10/2015

2

Exec Dt:

03/10/2015

3

SILICON IMAGE, INC.

Exec Dt:

03/10/2015

4

Exec Dt:

03/10/2015

Assignee

1

JEFFERIES FINANCE LLC

520 MADISON AVENUE

NEW YORK, NEW YORK 10022

Correspondence name and address
	PROSKAUER ROSE LLP
	ONE INTERNATIONAL PLACE
	BOSTON, MA 02110

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