Total properties:
74
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|
Patent #:
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|
Issue Dt:
|
04/24/2012
|
Application #:
|
11163305
|
Filing Dt:
|
10/13/2005
|
Publication #:
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|
Pub Dt:
|
04/19/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM USING ETCHED LEADFRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11164132
|
Filing Dt:
|
11/10/2005
|
Publication #:
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|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE SYSTEM WITH SUBSTRATE HEAT SINK
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
11164209
|
Filing Dt:
|
11/14/2005
|
Publication #:
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|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
HYPER THERMALLY ENHANCED SEMICONDUCTOR PACKAGE SYSTEM COMPRISING HEAT SLUGS ON OPPOSITE SURFACES OF A SEMICONDUCTOR CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
11276716
|
Filing Dt:
|
03/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING INTERCONNECT STACK AND EXTERNAL INTERCONNECT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11306098
|
Filing Dt:
|
12/15/2005
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
Title:
|
WAFER STRENGTH REINFORCEMENT SYSTEM FOR ULTRA THIN WAFER THINNING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11306806
|
Filing Dt:
|
01/11/2006
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
BUMP CHIP CARRIER SEMICONDUCTOR PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
11307128
|
Filing Dt:
|
01/24/2006
|
Publication #:
|
|
Pub Dt:
|
07/26/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
11307723
|
Filing Dt:
|
02/17/2006
|
Publication #:
|
|
Pub Dt:
|
08/23/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DIE ON BASE PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
11381684
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-PLANAR PADDLE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11456551
|
Filing Dt:
|
07/10/2006
|
Publication #:
|
|
Pub Dt:
|
01/17/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT MOUNT SYSTEM WITH SOLDER MASK PAD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11458078
|
Filing Dt:
|
07/17/2006
|
Publication #:
|
|
Pub Dt:
|
01/17/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING AN EXPOSED THERMALLY CONDUCTIVE COATING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
11469576
|
Filing Dt:
|
09/01/2006
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT SYSTEM WITH METAL-INSULATOR-METAL CIRCUIT ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2012
|
Application #:
|
11615923
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
SEMICONDUCTOR WAFER SCALE PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
11616878
|
Filing Dt:
|
12/28/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
BRIDGE STACK INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
11694927
|
Filing Dt:
|
03/30/2007
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONDUCTIVE SPACER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2012
|
Application #:
|
11750218
|
Filing Dt:
|
05/17/2007
|
Publication #:
|
|
Pub Dt:
|
11/20/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THIN PROFILE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
11849263
|
Filing Dt:
|
08/31/2007
|
Publication #:
|
|
Pub Dt:
|
12/20/2007
| | | | |
Title:
|
NESTED INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
11855114
|
Filing Dt:
|
09/13/2007
|
Publication #:
|
|
Pub Dt:
|
03/19/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE ENCAPSULATION HAVING RECESS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
11857402
|
Filing Dt:
|
09/18/2007
|
Publication #:
|
|
Pub Dt:
|
03/19/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL CONNECTIVITY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11859359
|
Filing Dt:
|
09/21/2007
|
Publication #:
|
|
Pub Dt:
|
03/26/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
11860460
|
Filing Dt:
|
09/24/2007
|
Publication #:
|
|
Pub Dt:
|
03/27/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKED DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
11927646
|
Filing Dt:
|
10/29/2007
|
Publication #:
|
|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE HAVING A CONDUCTOR-FREE RECESS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11958546
|
Filing Dt:
|
12/18/2007
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PASSIVE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12037774
|
Filing Dt:
|
02/26/2008
|
Publication #:
|
|
Pub Dt:
|
08/27/2009
| | | | |
Title:
|
PACKAGE SYSTEM FOR SHIELDING SEMICONDUCTOR DIES FROM ELECTROMAGNETIC INTERFERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12044688
|
Filing Dt:
|
03/07/2008
|
Publication #:
|
|
Pub Dt:
|
09/10/2009
| | | | |
Title:
|
OPTICAL SEMICONDUCTOR DEVICE HAVING PRE-MOLDED LEADFRAME WITH WINDOW AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2012
|
Application #:
|
12134179
|
Filing Dt:
|
06/05/2008
|
Publication #:
|
|
Pub Dt:
|
12/11/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12143047
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12144931
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
01/01/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
12185616
|
Filing Dt:
|
08/04/2008
|
Publication #:
|
|
Pub Dt:
|
02/04/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONCAVE TERMINAL
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12194507
|
Filing Dt:
|
08/19/2008
|
Publication #:
|
|
Pub Dt:
|
02/25/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM FLIP CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12207324
|
Filing Dt:
|
09/09/2008
|
Publication #:
|
|
Pub Dt:
|
03/26/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE IN NON-ACTIVE AREA OF WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12235111
|
Filing Dt:
|
09/22/2008
|
Publication #:
|
|
Pub Dt:
|
04/09/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE HAVING RELIEVED ACTIVE REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12238007
|
Filing Dt:
|
09/25/2008
|
Publication #:
|
|
Pub Dt:
|
03/25/2010
| | | | |
Title:
|
METHOD OF ELECTRICALLY CONNECTING A SHIELDING LAYER TO GROUND THROUGH A CONDUCTIVE VIA DISPOSED IN PERIPHERAL REGION AROUND SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12273541
|
Filing Dt:
|
11/18/2008
|
Publication #:
|
|
Pub Dt:
|
05/20/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF PACKAGE STACKING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12328717
|
Filing Dt:
|
12/04/2008
|
Publication #:
|
|
Pub Dt:
|
06/18/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME INTERPOSER AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12328722
|
Filing Dt:
|
12/04/2008
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM USING BOTTOM FLIP CHIP DIE BONDING AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12329789
|
Filing Dt:
|
12/08/2008
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE IN SUBSTRATE FOR IPD AND BASEBAND CIRCUIT SEPARATED BY HIGH-RESISTIVITY MOLDING COMPOUND
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12329800
|
Filing Dt:
|
12/08/2008
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING BOND WIRES AND STUD BUMPS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12332799
|
Filing Dt:
|
12/11/2008
|
Publication #:
|
|
Pub Dt:
|
06/17/2010
| | | | |
Title:
|
DOUBLE-SIDED SEMICONDUCTOR DEVICE AND METHOD OF FORMING TOP-SIDE AND BOTTOM-SIDE INTERCONNECT STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
12406049
|
Filing Dt:
|
03/17/2009
|
Publication #:
|
|
Pub Dt:
|
09/23/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
12410312
|
Filing Dt:
|
03/24/2009
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING NO-FLOW UNDERFILL MATERIAL AROUND VERTICAL INTERCONNECT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12411040
|
Filing Dt:
|
03/25/2009
|
Publication #:
|
|
Pub Dt:
|
09/30/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12432137
|
Filing Dt:
|
04/29/2009
|
Publication #:
|
|
Pub Dt:
|
08/20/2009
| | | | |
Title:
|
FLIP CHIP INTERCONNECTION PAD LAYOUT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12467865
|
Filing Dt:
|
05/18/2009
|
Publication #:
|
|
Pub Dt:
|
11/18/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12468810
|
Filing Dt:
|
05/19/2009
|
Publication #:
|
|
Pub Dt:
|
09/10/2009
| | | | |
Title:
|
A METHOD OF A PACKAGE ON PACKAGE PACKAGING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
12472083
|
Filing Dt:
|
05/26/2009
|
Publication #:
|
|
Pub Dt:
|
09/10/2009
| | | | |
Title:
|
INTERCONNECTING A CHIP AND A SUBSTRATE BY BONDING PURE METAL BUMPS AND PURE METAL SPOTS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
12486271
|
Filing Dt:
|
06/17/2009
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH VIA DIE HAVING PEDESTAL AND RECESS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12545357
|
Filing Dt:
|
08/21/2009
|
Publication #:
|
|
Pub Dt:
|
02/24/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF STACKING DIE ON LEADFRAME ELECTRICALLY CONNECTED BY CONDUCTIVE PILLARS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
12557811
|
Filing Dt:
|
09/11/2009
|
Publication #:
|
|
Pub Dt:
|
03/17/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12565380
|
Filing Dt:
|
09/23/2009
|
Publication #:
|
|
Pub Dt:
|
03/24/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
12621738
|
Filing Dt:
|
11/19/2009
|
Publication #:
|
|
Pub Dt:
|
05/19/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING IPD ON MOLDED SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12624482
|
Filing Dt:
|
11/24/2009
|
Publication #:
|
|
Pub Dt:
|
03/18/2010
| | | | |
Title:
|
SOLDER JOINT FLIP CHIP INTERCONNECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2012
|
Application #:
|
12633789
|
Filing Dt:
|
12/08/2009
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2012
|
Application #:
|
12635699
|
Filing Dt:
|
12/10/2009
|
Publication #:
|
|
Pub Dt:
|
06/16/2011
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL ROW LEAD-FRAME HAVING TOP AND BOTTOM TERMINALS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12696923
|
Filing Dt:
|
01/29/2010
|
Publication #:
|
|
Pub Dt:
|
08/04/2011
| | | | |
Title:
|
METHOD OF FORMING THIN PROFILE WLCSP WITH VERTICAL INTERCONNECT OVER PACKAGE FOOTPRINT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12705790
|
Filing Dt:
|
02/15/2010
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPACT COILS FOR HIGH PERFORMANCE FILTER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12705810
|
Filing Dt:
|
02/15/2010
|
Publication #:
|
|
Pub Dt:
|
06/10/2010
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THIN FILM CAPACITOR
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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12715910
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Filing Dt:
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03/02/2010
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Publication #:
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Pub Dt:
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06/24/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM FOR FINE PITCH SUBSTRATES AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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12732423
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Filing Dt:
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03/26/2010
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Publication #:
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Pub Dt:
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09/29/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERMEDIATE PAD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/21/2012
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Application #:
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12763386
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Filing Dt:
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04/20/2010
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Publication #:
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Pub Dt:
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08/12/2010
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Title:
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METHOD OF FORMING TOP ELECTRODE FOR CAPACITOR AND INTERCONNECTION IN INTEGRATED PASSIVE DEVICE (IPD)
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Patent #:
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Issue Dt:
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04/03/2012
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Application #:
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12822954
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Filing Dt:
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06/24/2010
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Publication #:
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Pub Dt:
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10/21/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE AND METHOD FOR MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
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02/07/2012
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Application #:
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12826368
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Filing Dt:
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06/29/2010
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Publication #:
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Pub Dt:
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10/21/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH-FREQUENCY CIRCUIT STRUCTURE AND METHOD THEREOF
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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12831822
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Filing Dt:
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07/07/2010
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Publication #:
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Pub Dt:
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10/28/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKING AND ANTI-FLASH STRUCTURE
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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12832821
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Filing Dt:
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07/08/2010
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Publication #:
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Pub Dt:
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10/28/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE PILLARS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
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Patent #:
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Issue Dt:
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02/21/2012
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Application #:
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12892941
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Filing Dt:
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09/29/2010
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Publication #:
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Pub Dt:
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01/20/2011
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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12965584
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Filing Dt:
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12/10/2010
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF DISSIPATING HEAT FROM THIN PACKAGE-ON-PACKAGE MOUNTED TO SUBSTRATE
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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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12974866
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Filing Dt:
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12/21/2010
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Publication #:
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Pub Dt:
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04/28/2011
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THROUGH SEMICONDUCTOR VIAS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/28/2012
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Application #:
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13004111
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Filing Dt:
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01/11/2011
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Publication #:
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Pub Dt:
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05/05/2011
| | | | |
Title:
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WAFER INTEGRATED WITH PERMANENT CARRIER AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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13017388
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Filing Dt:
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01/31/2011
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Publication #:
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Pub Dt:
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05/26/2011
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Title:
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PACKAGE STACKING SYSTEM WITH MOLD CONTAMINATION PREVENTION AND METHOD FOR MANUFACTURING THEREOF
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Patent #:
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Issue Dt:
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05/01/2012
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Application #:
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13019562
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Filing Dt:
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02/02/2011
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Publication #:
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Pub Dt:
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05/26/2011
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Title:
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SEMICONDUCTOR DEVICE HAVING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON RECESSED AND RAISED BOND FINGERS
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Patent #:
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Issue Dt:
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04/17/2012
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Application #:
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13155312
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Filing Dt:
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06/07/2011
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Publication #:
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Pub Dt:
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09/29/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THREE-DIMENSIONAL VERTICALLY ORIENTED INTEGRATED CAPACITORS
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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13166417
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Filing Dt:
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06/22/2011
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Publication #:
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Pub Dt:
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10/13/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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04/10/2012
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Application #:
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13172560
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Filing Dt:
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06/29/2011
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Publication #:
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Pub Dt:
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10/20/2011
| | | | |
Title:
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METHOD FOR MANUFACTURING INTEGRATED CIRCUIT PACKAGE SYSTEM WITH UNDER PADDLE LEADFINGERS
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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13269258
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Filing Dt:
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10/07/2011
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Publication #:
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Pub Dt:
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02/02/2012
| | | | |
Title:
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METHOD FOR MANUFACTURING BALL GRID ARRAY PACKAGE STACKING SYSTEM
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