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Patent #:
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Issue Dt:
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05/27/2003
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Application #:
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08154162
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Filing Dt:
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11/17/1993
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Title:
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HIGHLY COMPACT EPROM AND FLASH EEPROM DEVICES
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08622333
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Filing Dt:
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03/26/1996
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Title:
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FEEDBACK LOOP FOR READING THRESHOLD VOLTAGE
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Patent #:
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Issue Dt:
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07/28/1998
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Application #:
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08678421
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Filing Dt:
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07/02/1996
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Title:
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INTEGRATED CIRCUIT CHIPS MADE BENDABLE BY FORMING INDENTATIONS IN THEIR BACK SURFACES FLEXIBLE PACKAGES THEREOF AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08684788
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Filing Dt:
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07/22/1996
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Title:
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ANALOG AND MULTI-LEVEL MEMORY WITH REDUCED PROGRAM DISTURB
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Patent #:
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Issue Dt:
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08/25/1998
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Application #:
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08719179
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Filing Dt:
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09/24/1996
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Title:
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PLANE DECODE/VIRTUAL SECTOR ARCHITECTURE
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Patent #:
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Issue Dt:
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07/13/1999
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Application #:
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08781741
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Filing Dt:
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01/10/1997
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Title:
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SOURCE BIASING IN NON-VOLATILE MEMORY HAVING ROW-BASED SECTORS
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08839288
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Filing Dt:
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04/16/1997
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Title:
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LOOK-AHEAD ERASE FOR SEQUENTIAL DATA STORAGE
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Patent #:
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Issue Dt:
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06/01/1999
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Application #:
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08867473
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Filing Dt:
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06/02/1997
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Title:
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MEMORY ARCHITECTURE FOR RECORDING OF MULTIPLE MESSAGES
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Patent #:
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Issue Dt:
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04/20/1999
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Application #:
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08889111
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Filing Dt:
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07/07/1997
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Title:
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MULTIPLE ARRAY ARCHITECTURE FOR ANALOG OR MULTI-BIT-PER-CELL MEMORY
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Patent #:
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Issue Dt:
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07/27/1999
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Application #:
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08902776
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Filing Dt:
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07/30/1997
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Title:
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MULTI-STATE NON-VOLATILE FLASH MEMORY CAPABLE OF BEING ITS OWN TWO STATE WRITE CACHE
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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08936559
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Filing Dt:
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09/24/1997
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Title:
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MULTIPLE FUNCTION, BI-DIRECTIONAL INPUT/OUTPUT INTERFACE FOR SOUND PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08974276
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Filing Dt:
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11/19/1997
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Title:
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HIGH DENSITY NON-VOLATILE FLASH MEMORY WITHOUT ADVERSE EFFECTS OF ELECTRIC FIELD COUPLING BETWEEN ADJACENT FLOATING GATES
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Patent #:
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Issue Dt:
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08/24/1999
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Application #:
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08986210
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Filing Dt:
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12/05/1997
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Title:
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ADDRESS SCRAMBLING IN A SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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09063941
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Filing Dt:
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04/21/1998
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Title:
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PLANE DECODE/VIRTUAL SECTOR ARCHITECTURE
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|
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Patent #:
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|
Issue Dt:
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07/15/2003
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Application #:
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09086785
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Filing Dt:
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05/28/1998
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Title:
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ANALOG/MULTI-LEVEL MEMORY FOR DIGITAL IMAGING
|
|
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Patent #:
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Issue Dt:
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03/21/2000
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Application #:
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09096140
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Filing Dt:
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06/11/1998
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Title:
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SEMICONDUCTOR PACKAGE USING TERMINALS FORMED ON A CONDUCTIVE LAYER OF A CIRCUIT BOARD
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|
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Patent #:
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Issue Dt:
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08/03/1999
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Application #:
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09123888
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Filing Dt:
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07/28/1998
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Title:
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COMPACT MECHANISM FOR REMOVABLE INSERTION OF MULTIPLE INTEGRATED CIRCUIT CARDS INTO PORTABLE AND OTHER ELECTRONIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
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09/11/2007
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Application #:
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09159397
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Filing Dt:
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09/23/1998
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Publication #:
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Pub Dt:
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03/27/2003
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Title:
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ANALOG BUFFER MEMORY FOR HIGH-SPEED DIGITAL IMAGE CAPTURE
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|
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Patent #:
|
|
Issue Dt:
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03/13/2001
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Application #:
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09159848
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Filing Dt:
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09/25/1998
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Title:
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PROGRAMMABLE IMPEDANCE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
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03/28/2000
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Application #:
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09177809
|
Filing Dt:
|
10/23/1998
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Title:
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NON-VOLATILE MEMORY WITH IMPROVED SENSING AND METHOD THEREFOR
|
|
|
Patent #:
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|
Issue Dt:
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08/21/2001
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Application #:
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09185649
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Filing Dt:
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11/04/1998
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Title:
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VOLTAGE NEGOTIATION IN A SINGLE HOST MULTIPLE CARDS SYSTEM
|
|
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Patent #:
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|
Issue Dt:
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05/31/2005
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Application #:
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09186064
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Filing Dt:
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11/04/1998
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Title:
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MULTIPLE MODE COMMUNICATIONS SYSTEM
|
|
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Patent #:
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|
Issue Dt:
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03/07/2000
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Application #:
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09192883
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Filing Dt:
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11/16/1998
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Title:
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VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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02/05/2002
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Application #:
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09199971
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Filing Dt:
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11/25/1998
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Title:
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FLASH MEMORY PERMITTING SIMULTANEOUS READ/WRITE AND ERASE OPERATIONS IN A SINGLE MEMORY ARRAY
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|
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Patent #:
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|
Issue Dt:
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11/28/2000
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Application #:
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09200205
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Filing Dt:
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11/25/1998
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Title:
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NON-LINEAR MAPPING OF THRESHOLD VOLTAGES FOR ANALOG/MULTI-LEVEL MEMORY
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|
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09200500
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Filing Dt:
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11/25/1998
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Title:
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DATA ENCRYPTION AND SIGNAL SCRAMBLING USING PROGRAMMAABLE CONVERSION ARRAYS
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|
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Patent #:
|
|
Issue Dt:
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07/06/2004
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Application #:
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09224168
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Filing Dt:
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12/31/1998
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Publication #:
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Pub Dt:
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05/15/2003
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Title:
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CORRECTION OF CORRUPTED ELEMENTS IN SENSORS USING ANALOG/MULTI- LEVEL NON-VOLATILE MEMORY
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|
|
Patent #:
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|
Issue Dt:
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05/02/2000
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Application #:
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09224183
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Filing Dt:
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12/31/1998
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Title:
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MULTI-BIT-PER-CELL AND ANALOG/MULTI-LEVEL NON-VOLATILE MEMORIES WITH IMPROVED RESOLUTION AD SIGNAL-TO NOISE RATIO
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2000
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Application #:
|
09224656
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Filing Dt:
|
12/31/1998
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Title:
|
DYNAMIC WRITE PROCESS FOR HIGH BANDWIDTH MULTI-BITPER-CELL AND ANALOG/MULTI-LEVEL NON-VOLATILE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2001
|
Application #:
|
09239073
|
Filing Dt:
|
01/27/1999
|
Title:
|
METHOD OF CONTROLLING OF FLOATING GATE OXIDE GROWTH BY USE OF AN OXYGEN BARRIER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2000
|
Application #:
|
09262946
|
Filing Dt:
|
03/04/1999
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Title:
|
AUTO-TRACKING WRITE AND READ PROCESSES FOR MULTI-BIT-PER-CELL NON-VOLATILE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2001
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Application #:
|
09291249
|
Filing Dt:
|
04/13/1999
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Title:
|
METHOD FOR APPLYING VARIABLE ROW BIAS TO REDUCE PROGRAM DISTURB IN A FLASH MEMORY STORAGE ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2001
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Application #:
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09305544
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Filing Dt:
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05/05/1999
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Title:
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WORD-LINE DECODER FOR MULTI-BIT-PER-CELL AND ANALOG/MULTI-LEVEL MEMORIES WITH IMPROVED RESOLUTION AND SIGNAL-TO-NOISE RATIO
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2003
|
Application #:
|
09343117
|
Filing Dt:
|
06/29/1999
|
Publication #:
|
|
Pub Dt:
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09/26/2002
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH ANALOG OR MULTILEVEL STORAGE CELLS AND USER-SELECTABLE SAMPLING FREQUENCY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2002
|
Application #:
|
09343206
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Filing Dt:
|
06/29/1999
|
Title:
|
CHARGE PUMP CIRCUIT ADJUSTABLE IN RESPONSE TO AN EXTERNAL VOLTAGE SOURCE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2000
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Application #:
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09343328
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Filing Dt:
|
06/30/1999
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Title:
|
DUAL FLOATING GATE EEPROM CELL ARRAY WITH STEERING GATES SHARED BY ADJACENT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2000
|
Application #:
|
09343493
|
Filing Dt:
|
06/30/1999
|
Title:
|
PROCESSING TECHNIQUES FOR MAKING A DUAL FLOATING GATE EEPROM CELL ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2000
|
Application #:
|
09370775
|
Filing Dt:
|
08/09/1999
|
Title:
|
MEMORY ARRAY ARCHITECTURE UTILIZING GLOBAL BIT LINES SHARED BY MULTIPLE CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2001
|
Application #:
|
09469658
|
Filing Dt:
|
12/22/1999
|
Title:
|
VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATIE MEMORY AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2002
|
Application #:
|
09487106
|
Filing Dt:
|
01/19/2000
|
Title:
|
SEMICONDUCTOR PACKAGE USING TERMINALS FORMED ON A CONDUCTIVE LAYER OF A CIRCUIT BOARD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09505555
|
Filing Dt:
|
02/17/2000
|
Title:
|
FLASH EEPROM SYSTEM WITH SIMULTANEOUS MULTIPLE DATA SECTOR PROGRAMMING AND STORAGE OF PHYSICAL BLOCK CHARACTERISTICS IN OTHER DESIGNATED BLOCKS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2001
|
Application #:
|
09536930
|
Filing Dt:
|
03/27/2000
|
Title:
|
Non-volatile memory with improved sensing and method therefor
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2003
|
Application #:
|
09590029
|
Filing Dt:
|
06/07/2000
|
Title:
|
MEMORY CARD ELECTRICAL CONTACT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2001
|
Application #:
|
09591090
|
Filing Dt:
|
06/09/2000
|
Title:
|
Eeprom memory chip with multiple use pinouts
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2001
|
Application #:
|
09592469
|
Filing Dt:
|
06/09/2000
|
Title:
|
Multiple output current mirror with improved accuracy
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09613640
|
Filing Dt:
|
07/11/2000
|
Title:
|
PROCESSING TECHNIQUES FOR MAKING A DUAL FLOATING GATE EEPROM CELL ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
09633089
|
Filing Dt:
|
08/04/2000
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Title:
|
USE OF SMALL ELECTRONIC CIRCUIT CARDS WITH DIFFERENT INTERFACES IN AN ELECTRONIC SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2001
|
Application #:
|
09634694
|
Filing Dt:
|
08/08/2000
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Title:
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Dual floating gate EEPROM cell array with sterring gates shared adjacent cells
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09638334
|
Filing Dt:
|
08/14/2000
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Title:
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MODULAR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
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07/23/2002
|
Application #:
|
09638427
|
Filing Dt:
|
08/14/2000
|
Title:
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WRITE-ONCE MEMORY ARRAY CONTROLLER, SYSTEM, AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
09639577
|
Filing Dt:
|
08/14/2000
|
Title:
|
MULTIGATE SEMICONDUCTOR DEVICE WITH VERTICAL CHANNEL CURRENT AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2003
|
Application #:
|
09639750
|
Filing Dt:
|
08/14/2000
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Title:
|
THERMAL PROCESSING FOR THREE DIMENSIONAL CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2004
|
Application #:
|
09641023
|
Filing Dt:
|
08/17/2000
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Title:
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MULTIPLE REMOVABLE NON-VOLATILE MEMORY CARDS SERIALLY COMMUNICATING WITH A HOST
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2001
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Application #:
|
09643151
|
Filing Dt:
|
08/21/2000
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Title:
|
Novel method and structure for reliable data copy operation for non-volatile memories
|
|
|
Patent #:
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|
Issue Dt:
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09/12/2006
|
Application #:
|
09653062
|
Filing Dt:
|
09/01/2000
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Title:
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COOPERATIVE INTERCONNECTION AND OPERATION OF A NON-VOLATILE
MEMORY CARD AND AN INPUT-OUTPUT CARD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2003
|
Application #:
|
09667344
|
Filing Dt:
|
09/22/2000
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Title:
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NON-VOLATILE MEMORY CELL ARRAY HAVING DISCONTINUOUS SOURCE AND DRAIN DIFFUSIONS CONTACTED BY CONTINOUS BIT LINE CONDUCTORS AND METHODS OF FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
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Application #:
|
09671793
|
Filing Dt:
|
09/27/2000
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Title:
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WRITABLE TRACKING CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2003
|
Application #:
|
09703083
|
Filing Dt:
|
10/31/2000
|
Title:
|
METHOD OF REDUCING DISTURBS IN NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2002
|
Application #:
|
09714440
|
Filing Dt:
|
11/15/2000
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Title:
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Vertically stacked field programmable nonvolatile memory and method of fabrication
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2004
|
Application #:
|
09718802
|
Filing Dt:
|
11/22/2000
|
Title:
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TECHNIQUES FOR OPERATING NON-VOLATILE MEMORY SYSTEMS WITH DATA SECTORS HAVING DIFFERENT SIZES THAN THE SIZES OF THE PAGES AND/OR BLOCKS OF THE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09727229
|
Filing Dt:
|
11/30/2000
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
Title:
|
METHOD FOR STORING DIGITAL INFORMATION IN WRITE-ONCE MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09746083
|
Filing Dt:
|
12/22/2000
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
FORMATION OF ANTIFUSE STRUCTURE IN A THREE DIMENSIONAL MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2003
|
Application #:
|
09746204
|
Filing Dt:
|
12/22/2000
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
Title:
|
PATTERNING THREE DIMENSIONAL STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2002
|
Application #:
|
09746469
|
Filing Dt:
|
12/22/2000
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
Title:
|
METHOD OF FORMING NONVOLATILE MEMORY DEVICE UTILIZING A HARD MASK
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2003
|
Application #:
|
09747574
|
Filing Dt:
|
12/22/2000
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
Title:
|
THREE-DIMENSIONAL MEMORY ARRAY AND METHOD FOR STORING DATA BITS AND ECC BITS THEREIN
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2003
|
Application #:
|
09748649
|
Filing Dt:
|
12/22/2000
|
Title:
|
PARTIAL SELECTION OF PASSIVE ELEMENT MEMORY CELL SUB-ARRAYS FOR WRITE OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
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Application #:
|
09748815
|
Filing Dt:
|
12/22/2000
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Title:
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CHARGE PUMP CIRCUIT
|
|
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Patent #:
|
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Issue Dt:
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05/07/2002
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Application #:
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09748816
|
Filing Dt:
|
12/22/2000
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Title:
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INTEGRATED CIRCUIT STRUCTURE INCLUDING THREE-DIMENSIONAL MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2002
|
Application #:
|
09751178
|
Filing Dt:
|
12/28/2000
|
Title:
|
Novel method and structure for efficient data verification operation for non-volatile memories
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
09759835
|
Filing Dt:
|
01/10/2001
|
Publication #:
|
|
Pub Dt:
|
05/02/2002
| | | | |
Title:
|
METHOD OF REDUCING DISTURBS IN NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
09766436
|
Filing Dt:
|
01/19/2001
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
Title:
|
PARTIAL BLOCK DATA PROGRAMMING AND READING OPERATIONS IN A NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
09775499
|
Filing Dt:
|
02/05/2001
|
Publication #:
|
|
Pub Dt:
|
08/08/2002
| | | | |
Title:
|
METHOD FOR FAST WAKE-UP OF A FLASH MEMORY SYSTEM
|
|
|
Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09775761
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Filing Dt:
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02/02/2001
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Publication #:
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Pub Dt:
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08/08/2002
| | | | |
Title:
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METHOD OF GENERATING INTEGRATED CIRCUIT FEATURE LAYOUT FOR IMPROVED CHEMICAL MECHANICAL POLISHING
|
|
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Patent #:
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Issue Dt:
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08/17/2004
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Application #:
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09775939
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Filing Dt:
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02/02/2001
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Publication #:
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Pub Dt:
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08/08/2002
| | | | |
Title:
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MEMORY DEVICE AND METHOD FOR READING DATA STORED IN A PORTION OF A MEMORY DEVICE UNREADABLE BY A FILE SYSTEM OF A HOST DEVICE
|
|
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Patent #:
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Issue Dt:
|
06/18/2002
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Application #:
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09775956
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Filing Dt:
|
02/02/2001
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Title:
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Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays
|
|
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Patent #:
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Issue Dt:
|
06/10/2003
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Application #:
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09785915
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Filing Dt:
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02/16/2001
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Publication #:
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Pub Dt:
|
10/03/2002
| | | | |
Title:
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METHOD AND SYSTEM FOR DISTRIBUTED POWER GENERATION IN MULTI-CHIP MEMORY SYSTEMS
|
|
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Patent #:
|
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Issue Dt:
|
08/13/2002
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Application #:
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09788120
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Filing Dt:
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02/16/2001
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Publication #:
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Pub Dt:
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08/22/2002
| | | | |
Title:
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METHOD AND SYSTEM FOR GENERATION AND DISTRIBUTION OF SUPPLY VOLTAGES IN MEMORY SYSTEMS
|
|
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Patent #:
|
|
Issue Dt:
|
04/01/2008
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Application #:
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09788864
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Filing Dt:
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02/20/2001
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Publication #:
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Pub Dt:
|
08/22/2002
| | | | |
Title:
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MEMORY CARD WITH ENHANCED TESTABILITY AND METHODS OF MAKING AND USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
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Application #:
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09793370
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Filing Dt:
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02/26/2001
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Publication #:
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Pub Dt:
|
08/29/2002
| | | | |
Title:
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NON-VOLATILE MEMORY WITH IMPROVED PROGRAMMING AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2002
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Application #:
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09809878
|
Filing Dt:
|
03/16/2001
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Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
Title:
|
MULTI-STAGE CHARGE PUMP
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09809884
|
Filing Dt:
|
03/16/2001
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Publication #:
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Pub Dt:
|
09/19/2002
| | | | |
Title:
|
INTEGRATED CIRCUIT CURRENT SOURCE WITH SWITCHED CAPACITOR FEEDBACK
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
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Application #:
|
09814727
|
Filing Dt:
|
03/21/2001
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Publication #:
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Pub Dt:
|
07/11/2002
| | | | |
Title:
|
THREE-DIMENSIONAL MEMORY ARRAY AND METHOD OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2008
|
Application #:
|
09823489
|
Filing Dt:
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03/30/2001
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Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
Title:
|
METHOD FOR FIELD-PROGRAMMING A SOLID-STATE MEMORY DEVICE WITH A DIGITAL MEDIA FILE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2002
|
Application #:
|
09823503
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Filing Dt:
|
03/30/2001
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Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
Title:
|
HIGH-VOLTAGE TRANSISTOR AND FABRICATION PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2002
|
Application #:
|
09825615
|
Filing Dt:
|
04/02/2001
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
Title:
|
SYSTEM AND METHOD FOR ACHIEVING FAST SWITCHING OF ANALOG VOLTAGES ON A LARGE CAPACITIVE LOAD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
09829146
|
Filing Dt:
|
04/09/2001
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Publication #:
|
|
Pub Dt:
|
08/23/2001
| | | | |
Title:
|
CARD SYSTEM WITH ERASE TAGGING HIERARCHY AND GROUP BASED WRITE PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
|
Application #:
|
09853052
|
Filing Dt:
|
05/10/2001
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Title:
|
CONTROL OF FLOATING GATE OXIDE GROWTH BY USE OF AN OXYGEN BARRIER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
09860704
|
Filing Dt:
|
05/18/2001
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Publication #:
|
|
Pub Dt:
|
11/13/2003
| | | | |
Title:
|
FLOATING GATE MEMORY CELLS UTILIZING SUBSTRATE TRENCHES TO SCALE DOWN THEIR SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
09866022
|
Filing Dt:
|
05/24/2001
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Publication #:
|
|
Pub Dt:
|
09/27/2001
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE USING TERMINALS FORMED ON A CONDUCTIVE LAYER OF A CIRCUIT BOARD
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
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Application #:
|
09871332
|
Filing Dt:
|
05/31/2001
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
Title:
|
DUAL CELL READING AND WRITING TECHNIQUE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2003
|
Application #:
|
09871333
|
Filing Dt:
|
05/31/2001
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Publication #:
|
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Pub Dt:
|
12/05/2002
| | | | |
Title:
|
STEERING GATE AND BIT LINE SEGMENTATION IN NON-VOLATILE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
09877719
|
Filing Dt:
|
06/08/2001
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Title:
|
MEMORY DEVICE AND METHOD FOR STORING AND READING A FILE SYSTEM STRUCTURE IN A WRITE-ONCE MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2006
|
Application #:
|
09877720
|
Filing Dt:
|
06/08/2001
|
Title:
|
MEMORY DEVICE AND METHOD FOR STORING AND READING DATA IN A WRITE-ONCE MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
09878138
|
Filing Dt:
|
06/08/2001
|
Title:
|
METHOD FOR READING DATA IN A WRITE-ONCE MEMORY DEVICE USING A WRITE-MANY FILE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09895960
|
Filing Dt:
|
06/29/2001
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
Title:
|
METHOD AND SYSTEM FOR INCREASING PROGRAMMING BANDWIDTH IN A NON-VOLATILE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
09896468
|
Filing Dt:
|
06/29/2001
|
Title:
|
CURRENT SENSING METHOD AND APPARATUS PARTICULARLY USEFUL FOR A MEMORY ARRAY OF CELLS HAVING DIODE-LIKE CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
09896814
|
Filing Dt:
|
06/29/2001
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
Title:
|
MEMORY DEVICE WITH ROW AND COLUMN DECODER CIRCUITS ARRANGED IN A CHECKERBOARD PATTERN UNDER A PLURALITY OF MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2003
|
Application #:
|
09896815
|
Filing Dt:
|
06/29/2001
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
Title:
|
MEMORY DEVICE AND METHOD FOR SENSING WHILE PROGRAMMING A NON-VOLATILE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2003
|
Application #:
|
09897704
|
Filing Dt:
|
06/29/2001
|
Title:
|
MEMORY ARRAY INCORPORATING NOISE DETECTION LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
09897771
|
Filing Dt:
|
06/29/2001
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
Title:
|
METHOD AND APPARATUS FOR BIASING SELECTED AND UNSELECTED ARRAY LINES WHEN WRITING A MEMORY ARRAY
|
|