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Reel/Frame:	045084/0184			Pages:	25
		Recorded:	01/17/2018
Attorney Dkt #:	VLSIS001
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 88

Patent #:	5844315	Issue Dt:	12/01/1998	Application #:	08621912	Filing Dt:	03/26/1996
Title:	LOW-PROFILE MICROELECTRONIC PACKAGE

Patent #:	5773314	Issue Dt:	06/30/1998	Application #:	08845457	Filing Dt:	04/25/1997
Title:	PLUG PROTECTION PROCESS FOR USE IN THE MANUFACTURE OF EMBEDDED DYNAMIC RANDOM ACCESS MEMORY (DRAM) CELLS

Patent #:	6174425	Issue Dt:	01/16/2001	Application #:	08856459	Filing Dt:	05/14/1997
Title:	PROCESS FOR DEPOSITING A LAYER OF MATERIAL OVER A SUBSTRATE

Patent #:	6272588	Issue Dt:	08/07/2001	Application #:	08865510	Filing Dt:	05/30/1997
Title:	METHOD AND APPARATUS FOR VERIFYING AND CHARACTERIZING DATA RETENTION TIME IN A DRAM USING BUILT-IN TEST CIRCUITRY

Patent #:	6020024	Issue Dt:	02/01/2000	Application #:	08905755	Filing Dt:	08/04/1997
Title:	METHOD FOR FORMING HIGH DIELECTRIC CONSTANT METAL OXIDES

Patent #:	6001730	Issue Dt:	12/14/1999	Application #:	08954191	Filing Dt:	10/20/1997
Title:	CHEMICAL MECHANICAL POLISHING (CMP) SLURRY FOR POLISHING COPPER INTERCONNECTS WHICH USE TANTALUM-BASED BARRIER LAYERS

Patent #:	5945346	Issue Dt:	08/31/1999	Application #:	08963487	Filing Dt:	11/03/1997
Title:	CHEMICAL MECHANICAL PLANARIZATION SYSTEM AND METHOD THEREFOR

Patent #:	6077726	Issue Dt:	06/20/2000	Application #:	09124720	Filing Dt:	07/30/1998
Title:	METHOD AND APPARATUS FOR STRESS RELIEF IN SOLDER BUMP FORMATION ON A SEMICONDUCTOR DEVICE

Patent #:	6100549	Issue Dt:	08/08/2000	Application #:	09133041	Filing Dt:	08/12/1998
Title:	HIGH BREAKDOWN VOLTAGE RESURF HFET

Patent #:	6194250	Issue Dt:	02/27/2001	Application #:	09152899	Filing Dt:	09/14/1998
Title:	LOW PROFILE MICROELECTRONIC PACKAGE

Patent #:	6133764	Issue Dt:	10/17/2000	Application #:	09238773	Filing Dt:	01/27/1999
Title:	COMPARATOR CIRCUIT AND METHOD

Patent #:	6238967	Issue Dt:	05/29/2001	Application #:	09289915	Filing Dt:	04/12/1999
Title:	METHOD OF FORMING EMBEDDED DRAM STRUCTURE

Patent #:	6149508	Issue Dt:	11/21/2000	Application #:	09318951	Filing Dt:	05/26/1999
Title:	CHEMICAL MECHANICAL PLANARIZATION SYSTEM

Patent #:	6150190	Issue Dt:	11/21/2000	Application #:	09320866	Filing Dt:	05/27/1999
Title:	METHOD OF FORMATION OF BURIED MIRROR SEMICONDUCTIVE DEVICE

Patent #:	6451681	Issue Dt:	09/17/2002	Application #:	09411266	Filing Dt:	10/04/1999
Title:	METHOD OF FORMING COPPER INTERCONNECTION UTILIZING ALUMINUM CAPPING FILM

Patent #:	6231743	Issue Dt:	05/15/2001	Application #:	09476811	Filing Dt:	01/03/2000
Title:	METHOD FOR FORMING A SEMICONDUCTOR DEVICE

Patent #:	6500324	Issue Dt:	12/31/2002	Application #:	09561776	Filing Dt:	05/01/2000
Title:	PROCESS FOR DEPOSITING A LAYER OF MATERILAL ON A SUBSTRATE

Patent #:	6344403	Issue Dt:	02/05/2002	Application #:	09595735	Filing Dt:	06/16/2000
Title:	Memory device and method for manufacture

Patent #:	6465297	Issue Dt:	10/15/2002	Application #:	09679861	Filing Dt:	10/05/2000
Title:	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND SEMICONDUCTOR COMPONENT THEREOF

Patent #:	NONE	Issue Dt:		Application #:	09978096	Filing Dt:	10/17/2001
Publication #:	US20030071327	Pub Dt:	04/17/2003
Title:	Method and apparatus utilizing monocrystalline insulator

Patent #:	6656761	Issue Dt:	12/02/2003	Application #:	09990977	Filing Dt:	11/21/2001
Publication #:	US20030096440	Pub Dt:	05/22/2003
Title:	METHOD FOR FORMING A SEMICONDUCTOR DEVICE FOR DETECTING LIGHT

Patent #:	6620656	Issue Dt:	09/16/2003	Application #:	10024916	Filing Dt:	12/19/2001
Publication #:	US20030113959	Pub Dt:	06/19/2003
Title:	METHOD OF FORMING BODY-TIED SILICON ON INSULATOR SEMICONDUCTOR DEVICE

Patent #:	6608789	Issue Dt:	08/19/2003	Application #:	10027547	Filing Dt:	12/21/2001
Publication #:	US20030117873	Pub Dt:	06/26/2003
Title:	HYSTERESIS REDUCED SENSE AMPLIFIER AND METHOD OF OPERATION

Patent #:	7323094	Issue Dt:	01/29/2008	Application #:	10218810	Filing Dt:	08/14/2002
Publication #:	US20020195347	Pub Dt:	12/26/2002
Title:	PROCESS FOR DEPOSITING A LAYER OF MATERIAL ON A SUBSTRATE AND A PLATING SYSTEM

Patent #:	6887758	Issue Dt:	05/03/2005	Application #:	10267153	Filing Dt:	10/09/2002
Publication #:	US20040070030	Pub Dt:	04/15/2004
Title:	NON-VOLATILE MEMORY DEVICE AND METHOD FOR FORMING

Patent #:	6713812	Issue Dt:	03/30/2004	Application #:	10267199	Filing Dt:	10/09/2002
Title:	NON-VOLATILE MEMORY DEVICE HAVING AN ANTI-PUNCH THROUGH (APT) REGION

Patent #:	6700814	Issue Dt:	03/02/2004	Application #:	10283622	Filing Dt:	10/30/2002
Title:	SENSE AMPLIFIER BIAS CIRCUIT FOR A MEMORY HAVING AT LEAST TWO DISTINCT RESISTANCE STATES

Patent #:	6967390	Issue Dt:	11/22/2005	Application #:	10367344	Filing Dt:	02/13/2003
Publication #:	US20040159916	Pub Dt:	08/19/2004
Title:	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING SAME

Patent #:	6812580	Issue Dt:	11/02/2004	Application #:	10457632	Filing Dt:	06/09/2003
Title:	SEMICONDUCTOR PACKAGE HAVING OPTIMIZED WIRE BOND POSITIONING

Patent #:	6724048	Issue Dt:	04/20/2004	Application #:	10462178	Filing Dt:	06/16/2003
Publication #:	US20030211663	Pub Dt:	11/13/2003
Title:	BODY-TIED SILICON ON INSULATOR SEMICONDUCTOR DEVICE AND METHOD THEREFOR

Patent #:	7179712	Issue Dt:	02/20/2007	Application #:	10640723	Filing Dt:	08/14/2003
Publication #:	US20050037581	Pub Dt:	02/17/2005
Title:	MULTIBIT ROM CELL AND METHOD THEREFOR

Patent #:	7170135	Issue Dt:	01/30/2007	Application #:	10651128	Filing Dt:	08/28/2003
Publication #:	US20040104437	Pub Dt:	06/03/2004
Title:	ARRANGEMENT AND METHOD FOR ESD PROTECTION

Patent #:	7183825	Issue Dt:	02/27/2007	Application #:	10818861	Filing Dt:	04/06/2004
Publication #:	US20050218952	Pub Dt:	10/06/2005
Title:	STATE RETENTION WITHIN A DATA PROCESSING SYSTEM

Patent #:	7088632	Issue Dt:	08/08/2006	Application #:	10854298	Filing Dt:	05/26/2004
Publication #:	US20050276142	Pub Dt:	12/15/2005
Title:	AUTOMATIC HIDDEN REFRESH IN A DRAM AND METHOD THEREFOR

Patent #:	7342276	Issue Dt:	03/11/2008	Application #:	10861467	Filing Dt:	06/07/2004
Publication #:	US20040217444	Pub Dt:	11/04/2004
Title:	METHOD AND APPARATUS UTILIZING MONOCRYSTALLINE INSULATOR

Patent #:	7038959	Issue Dt:	05/02/2006	Application #:	10943579	Filing Dt:	09/17/2004
Publication #:	US20060062066	Pub Dt:	03/23/2006
Title:	MRAM SENSE AMPLIFIER HAVING A PRECHARGE CIRCUIT AND METHOD FOR SENSING

Patent #:	7227366	Issue Dt:	06/05/2007	Application #:	10955219	Filing Dt:	09/30/2004
Publication #:	US20060066316	Pub Dt:	03/30/2006
Title:	DEVICE AND A METHOD FOR BIASING A TRANSISTOR THAT IS CONNECTED TO A POWER CONVERTER

Patent #:	7126172	Issue Dt:	10/24/2006	Application #:	10962944	Filing Dt:	10/12/2004
Publication #:	US20060079047	Pub Dt:	04/13/2006
Title:	INTEGRATION OF MULTIPLE GATE DIELECTRICS BY SURFACE PROTECTION

Patent #:	7563662	Issue Dt:	07/21/2009	Application #:	11084283	Filing Dt:	03/18/2005
Publication #:	US20060211206	Pub Dt:	09/21/2006
Title:	PROCESSES FOR FORMING ELECTRONIC DEVICES INCLUDING NON-VOLATILE MEMORY

Patent #:	7301741	Issue Dt:	11/27/2007	Application #:	11130873	Filing Dt:	05/17/2005
Publication #:	US20060262469	Pub Dt:	11/23/2006
Title:	INTEGRATED CIRCUIT WITH MULTIPLE INDEPENDENT GATE FIELD EFFECT TRANSISTOR (MIGFET) RAIL CLAMP CIRCUIT

Patent #:	7534162	Issue Dt:	05/19/2009	Application #:	11221375	Filing Dt:	09/06/2005
Publication #:	US20070054601	Pub Dt:	03/08/2007
Title:	GROOVED PLATEN WITH CHANNELS OR PATHWAY TO AMBIENT AIR

Patent #:	7446006	Issue Dt:	11/04/2008	Application #:	11226826	Filing Dt:	09/14/2005
Publication #:	US20070059911	Pub Dt:	03/15/2007
Title:	SEMICONDUCTOR FABRICATION PROCESS INCLUDING SILICIDE STRINGER REMOVAL PROCESSING

Patent #:	7432565	Issue Dt:	10/07/2008	Application #:	11236185	Filing Dt:	09/27/2005
Publication #:	US20070069240	Pub Dt:	03/29/2007
Title:	III-V COMPOUND SEMICONDUCTOR HETEROSTRUCTURE MOSFET DEVICE

Patent #:	7429506	Issue Dt:	09/30/2008	Application #:	11236186	Filing Dt:	09/27/2005
Publication #:	US20070072377	Pub Dt:	03/29/2007
Title:	PROCESS OF MAKING A III-V COMPOUND SEMICONDUCTOR HETEROSTRUCTURE MOSFET

Patent #:	7364970	Issue Dt:	04/29/2008	Application #:	11240242	Filing Dt:	09/30/2005
Publication #:	US20070077706	Pub Dt:	04/05/2007
Title:	METHOD OF MAKING A MULTI-BIT NON-VOLATILE MEMORY (NVM) CELL AND STRUCTURE

Patent #:	7241695	Issue Dt:	07/10/2007	Application #:	11244516	Filing Dt:	10/06/2005
Publication #:	US20070082495	Pub Dt:	04/12/2007
Title:	SEMICONDUCTOR DEVICE HAVING NANO-PILLARS AND METHOD THEREFOR

Patent #:	7215268	Issue Dt:	05/08/2007	Application #:	11250993	Filing Dt:	10/14/2005
Publication #:	US20070085721	Pub Dt:	04/19/2007
Title:	SIGNAL CONVERTERS WITH MULTIPLE GATE DEVICES

Patent #:	7344933	Issue Dt:	03/18/2008	Application #:	11324510	Filing Dt:	01/03/2006
Publication #:	US20070155073	Pub Dt:	07/05/2007
Title:	METHOD OF FORMING DEVICE HAVING A RAISED EXTENSION REGION

Patent #:	7497763	Issue Dt:	03/03/2009	Application #:	11390176	Filing Dt:	03/27/2006
Publication #:	US20070224917	Pub Dt:	09/27/2007
Title:	POLISHING PAD, A POLISHING APPARATUS, AND A PROCESS FOR USING THE POLISHING PAD

Patent #:	7430151	Issue Dt:	09/30/2008	Application #:	11392402	Filing Dt:	03/29/2006
Publication #:	US20070237021	Pub Dt:	10/11/2007
Title:	MEMORY WITH CLOCKED SENSE AMPLIFIER

Patent #:	7468313	Issue Dt:	12/23/2008	Application #:	11420849	Filing Dt:	05/30/2006
Publication #:	US20070281435	Pub Dt:	12/06/2007
Title:	ENGINEERING STRAIN IN THICK STRAINED-SOI SUBSTRATES

Patent #:	7476563	Issue Dt:	01/13/2009	Application #:	11561241	Filing Dt:	11/17/2006
Publication #:	US20080119013	Pub Dt:	05/22/2008
Title:	METHOD OF PACKAGING A DEVICE USING A DIELECTRIC LAYER

Patent #:	7649764	Issue Dt:	01/19/2010	Application #:	11619808	Filing Dt:	01/04/2007
Publication #:	US20080168231	Pub Dt:	07/10/2008
Title:	MEMORY WITH SHARED WRITE BIT LINE(S)

Patent #:	7820491	Issue Dt:	10/26/2010	Application #:	11620075	Filing Dt:	01/05/2007
Publication #:	US20080164512	Pub Dt:	07/10/2008
Title:	LIGHT ERASABLE MEMORY AND METHOD THEREFOR

Patent #:	8008935	Issue Dt:	08/30/2011	Application #:	11753003	Filing Dt:	05/24/2007
Title:	TESTER AND A METHOD FOR TESTING AN INTEGRATED CIRCUIT

Patent #:	7811851	Issue Dt:	10/12/2010	Application #:	11864246	Filing Dt:	09/28/2007
Publication #:	US20090085024	Pub Dt:	04/02/2009
Title:	PHASE CHANGE MEMORY STRUCTURES

Patent #:	7719039	Issue Dt:	05/18/2010	Application #:	11864257	Filing Dt:	09/28/2007
Publication #:	US20090085023	Pub Dt:	04/02/2009
Title:	PHASE CHANGE MEMORY STRUCTURES INCLUDING PILLARS

Patent #:	7939482	Issue Dt:	05/10/2011	Application #:	11914870	Filing Dt:	11/19/2007
Publication #:	US20080221004	Pub Dt:	09/11/2008
Title:	CLEANING SOLUTION FOR A SEMICONDUCTOR WAFER

Patent #:	8080439	Issue Dt:	12/20/2011	Application #:	12039371	Filing Dt:	02/28/2008
Publication #:	US20090220744	Pub Dt:	09/03/2009
Title:	METHOD OF MAKING A VERTICAL PHASE CHANGE MEMORY (PCM) AND A PCM DEVICE

Patent #:	7786809	Issue Dt:	08/31/2010	Application #:	12041687	Filing Dt:	03/04/2008
Title:	METHOD OF LOW POWER PLL FOR LOW JITTER DEMANDING APPLICATIONS

Patent #:	8294483	Issue Dt:	10/23/2012	Application #:	12130173	Filing Dt:	05/30/2008
Publication #:	US20090295415	Pub Dt:	12/03/2009
Title:	TESTING OF MULTIPLE INTEGRATED CIRCUITS

Patent #:	7688127	Issue Dt:	03/30/2010	Application #:	12179826	Filing Dt:	07/25/2008
Publication #:	US20100019821	Pub Dt:	01/28/2010
Title:	METHOD FOR GENERATING A OUTPUT CLOCK SIGNAL HAVING A OUTPUT CYCLE AND A DEVICE HAVING A CLOCK SIGNAL GENERATING CAPABILITIES

Patent #:	8094769	Issue Dt:	01/10/2012	Application #:	12180166	Filing Dt:	07/25/2008
Publication #:	US20100020910	Pub Dt:	01/28/2010
Title:	PHASE-LOCKED LOOP SYSTEM WITH A PHASE-ERROR SPREADING CIRCUIT

Patent #:	7892070	Issue Dt:	02/22/2011	Application #:	12243543	Filing Dt:	10/01/2008
Publication #:	US20090023363	Pub Dt:	01/22/2009
Title:	PROCESS OF USING A POLISHING APPARATUS INCLUDING A PLATEN WINDOW AND A POLISHING PAD

Patent #:	7998822	Issue Dt:	08/16/2011	Application #:	12244413	Filing Dt:	10/02/2008
Publication #:	US20090093108	Pub Dt:	04/09/2009
Title:	SEMICONDUCTOR FABRICATION PROCESS INCLUDING SILICIDE STRINGER REMOVAL PROCESSING

Patent #:	8462818	Issue Dt:	06/11/2013	Application #:	12375796	Filing Dt:	01/30/2009
Publication #:	US20090185544	Pub Dt:	07/23/2009
Title:	METHOD FOR PROCESSING CDMA SIGNALS AND A DEVICE HAVING CDMA SIGNAL CAPABILITIES

Patent #:	7955973	Issue Dt:	06/07/2011	Application #:	12375854	Filing Dt:	01/30/2009
Publication #:	US20100019395	Pub Dt:	01/28/2010
Title:	METHOD AND APPARATUS FOR IMPROVEMENTS IN CHIP MANUFACTURE AND DESIGN

Patent #:	8509370	Issue Dt:	08/13/2013	Application #:	12480344	Filing Dt:	06/08/2009
Publication #:	US20100310030	Pub Dt:	12/09/2010
Title:	PHASE LOCKED LOOP DEVICE AND METHOD THEREOF

Patent #:	8318549	Issue Dt:	11/27/2012	Application #:	12608780	Filing Dt:	10/29/2009
Publication #:	US20110101517	Pub Dt:	05/05/2011
Title:	MOLDED SEMICONDUCTOR PACKAGE HAVING A FILLER MATERIAL

Patent #:	9110485	Issue Dt:	08/18/2015	Application #:	12675252	Filing Dt:	02/25/2010
Publication #:	US20100308788	Pub Dt:	12/09/2010
Title:	BAND-GAP VOLTAGE REFERENCE CIRCUIT HAVING MULTIPLE BRANCHES

Patent #:	8390369	Issue Dt:	03/05/2013	Application #:	12850650	Filing Dt:	08/05/2010
Publication #:	US20120032719	Pub Dt:	02/09/2012
Title:	ELECTRONIC CIRCUIT AND METHOD FOR OPERATING A MODULE IN A FUNCTIONAL MODE AND IN AN IDLE MODE

Patent #:	8097873	Issue Dt:	01/17/2012	Application #:	12881678	Filing Dt:	09/14/2010
Publication #:	US20110001113	Pub Dt:	01/06/2011
Title:	PHASE CHANGE MEMORY STRUCTURES

Patent #:	8183639	Issue Dt:	05/22/2012	Application #:	12899663	Filing Dt:	10/07/2010
Publication #:	US20120086082	Pub Dt:	04/12/2012
Title:	DUAL PORT STATIC RANDOM ACCESS MEMORY CELL LAYOUT

Patent #:	8912857	Issue Dt:	12/16/2014	Application #:	12936214	Filing Dt:	10/04/2010
Publication #:	US20130187719	Pub Dt:	07/25/2013
Title:	PLL SYSTEM AND METHOD FOR CONTROLLING A GAIN OF A VCO CIRCUIT

Patent #:	8537519	Issue Dt:	09/17/2013	Application #:	12995325	Filing Dt:	11/30/2010
Publication #:	US20110084339	Pub Dt:	04/14/2011
Title:	SEMICONDUCTOR DEVICE AND METHOD OF ELECTROSTATIC DISCHARGE PROTECTION THEREFOR

Patent #:	8659322	Issue Dt:	02/25/2014	Application #:	13016353	Filing Dt:	01/28/2011
Publication #:	US20120194222	Pub Dt:	08/02/2012
Title:	MEMORY HAVING A LATCHING SENSE AMPLIFIER RESISTANT TO NEGATIVE BIAS TEMPERATURE INSTABILITY AND METHOD THEREFOR

Patent #:	8531197	Issue Dt:	09/10/2013	Application #:	13054122	Filing Dt:	01/14/2011
Publication #:	US20110121818	Pub Dt:	05/26/2011
Title:	INTEGRATED CIRCUIT DIE, AN INTEGRATED CIRCUIT PACKAGE AND A METHOD FOR CONNECTING AN INTEGRATED CIRCUIT DIE TO AN EXTERNAL DEVICE

Patent #:	8558520	Issue Dt:	10/15/2013	Application #:	13120874	Filing Dt:	03/24/2011
Publication #:	US20110175592	Pub Dt:	07/21/2011
Title:	BUS DRIVER FOR AVOIDING AN OVERVOLTAGE

Patent #:	8400213	Issue Dt:	03/19/2013	Application #:	13122321	Filing Dt:	04/01/2011
Publication #:	US20110187445	Pub Dt:	08/04/2011
Title:	COMPLEMENTARY BAND-GAP VOLTAGE REFERENCE CIRCUIT

Patent #:	9097758	Issue Dt:	08/04/2015	Application #:	13255523	Filing Dt:	09/09/2011
Publication #:	US20120038367	Pub Dt:	02/16/2012
Title:	CONNECTION QUALITY VERIFICATION FOR INTEGRATED CIRCUIT TEST

Patent #:	8704555	Issue Dt:	04/22/2014	Application #:	13511321	Filing Dt:	05/22/2012
Publication #:	US20120235732	Pub Dt:	09/20/2012
Title:	INTEGRATED CIRCUIT COMPRISING REFERENCE VOLTAGE GENERATION CIRCUITRY AND ELECTRONIC DEVICE

Patent #:	8598949	Issue Dt:	12/03/2013	Application #:	13634730	Filing Dt:	09/13/2012
Publication #:	US20130076421	Pub Dt:	03/28/2013
Title:	ELECTRONIC CIRCUIT AND METHOD FOR STATE RETENTION POWER GATING

Patent #:	8970283	Issue Dt:	03/03/2015	Application #:	13989288	Filing Dt:	05/23/2013
Publication #:	US20130249616	Pub Dt:	09/26/2013
Title:	SWITCHING ARRANGEMENT, INTEGRATED CIRCUIT COMPRISING SAME, METHOD OF CONTROLLING A SWITCHING ARRANGEMENT, AND RELATED COMPUTER PROGRAM PRODUCT

Patent #:	9214924	Issue Dt:	12/15/2015	Application #:	14006388	Filing Dt:	09/20/2013
Publication #:	US20140002160	Pub Dt:	01/02/2014
Title:	INTEGRATED CIRCUIT AND METHOD FOR REDUCING AN IMPACT OF ELECTRICAL STRESS IN AN INTEGRATED CIRCUIT

Patent #:	9117787	Issue Dt:	08/25/2015	Application #:	14115210	Filing Dt:	11/01/2013
Publication #:	US20140085758	Pub Dt:	03/27/2014
Title:	INTEGRATED CIRCUIT DEVICE AND METHOD OF ENABLING THERMAL REGULATION WITHIN AN INTEGRATED CIRCUIT DEVICE

Patent #:	9075421	Issue Dt:	07/07/2015	Application #:	14116785	Filing Dt:	11/11/2013
Publication #:	US20140176220	Pub Dt:	06/26/2014
Title:	INTEGRATED CIRCUIT DEVICE, VOLTAGE REGULATOR MODULE AND METHOD FOR COMPENSATING A VOLTAGE SIGNAL

Patent #:	9141753	Issue Dt:	09/22/2015	Application #:	14358736	Filing Dt:	05/16/2014
Publication #:	US20140351781	Pub Dt:	11/27/2014
Title:	METHOD FOR PLACING OPERATIONAL CELLS IN A SEMICONDUCTOR DEVICE

Patent #:	9263433	Issue Dt:	02/16/2016	Application #:	14359695	Filing Dt:	05/21/2014
Publication #:	US20150270259	Pub Dt:	09/24/2015
Title:	INTEGRATED CIRCUIT, INTEGRATED CIRCUIT PACKAGE AND METHOD OF PROVIDING PROTECTION AGAINST AN ELECTROSTATIC DISCHARGE EVENT

Assignor

NXP USA, INC.

Exec Dt:

12/04/2017

Assignee

VLSI TECHNOLOGY LLC

1209 ORANGE STREET

WILMINGTON, DELAWARE 19801

Correspondence name and address
	DAYLIGHT LAW, P.C.
	626 JEFFERSON AVENUE, SUITE 7
	REDWOOD CITY, CA 94063

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