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Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
1
Patent #:
Issue Dt:
11/07/2017
Application #:
14519215
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
04/30/2015
Title:
FINFET SEMICONDUCTOR STRUCTURES AND METHODS OF FABRICATING SAME
2
Patent #:
Issue Dt:
03/29/2016
Application #:
14519235
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
06/18/2015
Title:
FORMATION OF ALPHA PARTICLE SHIELDS IN CHIP PACKAGING
3
Patent #:
Issue Dt:
06/07/2016
Application #:
14519291
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
04/21/2016
Title:
VERTICAL BREAKDOWN PROTECTION LAYER
4
Patent #:
Issue Dt:
08/02/2016
Application #:
14519493
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
02/26/2015
Title:
SEMICONDUCTOR DEVICE HAVING DIFFUSION BARRIER TO REDUCE BACK CHANNEL LEAKAGE
5
Patent #:
Issue Dt:
05/02/2017
Application #:
14519596
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
10/08/2015
Title:
MULTI-HEIGHT FIN FIELD EFFECT TRANSISTORS
6
Patent #:
Issue Dt:
09/20/2016
Application #:
14519615
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
12/24/2015
Title:
REPLACEMENT GATE STRUCTURE FOR ENHANCING CONDUCTIVITY
7
Patent #:
Issue Dt:
06/02/2015
Application #:
14519622
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
02/05/2015
Title:
MIDDLE-OF-LINE BORDERLESS CONTACT STRUCTURE AND METHOD OF FORMING
8
Patent #:
Issue Dt:
01/12/2016
Application #:
14519630
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
02/05/2015
Title:
COMPENSATED IMPEDANCE CALIBRATION CIRCUIT
9
Patent #:
Issue Dt:
03/24/2015
Application #:
14519902
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
02/05/2015
Title:
CONTACT POWER RAIL
10
Patent #:
Issue Dt:
10/29/2019
Application #:
14520115
Filing Dt:
10/21/2014
Publication #:
Pub Dt:
04/23/2015
Title:
ELECTRONIC CIRCUIT HAVING SERIAL LATCH SCAN CHAINS
11
Patent #:
Issue Dt:
04/26/2016
Application #:
14520390
Filing Dt:
10/22/2014
Publication #:
Pub Dt:
02/05/2015
Title:
MODIFIED VIA BOTTOM FOR BEOL VIA EFUSE
12
Patent #:
Issue Dt:
05/24/2016
Application #:
14520445
Filing Dt:
10/22/2014
Publication #:
Pub Dt:
02/05/2015
Title:
METHOD, STRUCTURE AND DESIGN STRUCTURE FOR CUSTOMIZING HISTORY EFFECTS OF SOI CIRCUITS
13
Patent #:
Issue Dt:
03/22/2016
Application #:
14521605
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
02/12/2015
Title:
BIPOLAR JUNCTION TRANSISTOR HAVING MULTI-SIDED BASE CONTACT
14
Patent #:
Issue Dt:
08/23/2016
Application #:
14521739
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
04/28/2016
Title:
PERFORMING SECURE ADDRESS RELOCATION WITHIN A MULTI-PROCESSOR SYSTEM SHARING A SAME PHYSICAL MEMORY CHANNEL TO EXTERNAL MEMORY
15
Patent #:
Issue Dt:
07/21/2015
Application #:
14521743
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
02/12/2015
Title:
THERMALLY STABLE HIGH-K TETRAGONAL HFO2 LAYER WITHIN HIGH ASPECT RATIO DEEP TRENCHES
16
Patent #:
Issue Dt:
01/24/2017
Application #:
14521795
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
04/30/2015
Title:
Method and Computer System for Dynamically Providing Multi-Dimensional Based Password/Challenge Authentication
17
Patent #:
Issue Dt:
07/05/2016
Application #:
14521939
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
04/28/2016
Title:
FD DEVICES IN ADVANCED SEMICONDUCTOR TECHNIQUES
18
Patent #:
Issue Dt:
07/12/2016
Application #:
14522000
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
04/28/2016
Title:
MULTI-GATE FETS HAVING CORRUGATED SEMICONDUCTOR STACKS AND METHOD OF FORMING THE SAME
19
Patent #:
Issue Dt:
04/19/2016
Application #:
14522017
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
04/28/2016
Title:
PROGRAMMING AN ELECTRICAL FUSE WITH A SILICON-CONTROLLED RECTIFIER
20
Patent #:
Issue Dt:
01/24/2017
Application #:
14522083
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
04/28/2016
Title:
STRAIN DETECTION STRUCTURES FOR BONDED WAFERS AND CHIPS
21
Patent #:
Issue Dt:
03/01/2016
Application #:
14522090
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
02/26/2015
Title:
SELF-ALIGNED EMITTER-BASE REGION
22
Patent #:
Issue Dt:
08/11/2015
Application #:
14522119
Filing Dt:
10/23/2014
Publication #:
Pub Dt:
02/12/2015
Title:
SELF ALIGNED CONTACT WITH IMPROVED ROBUSTNESS
23
Patent #:
Issue Dt:
03/01/2016
Application #:
14522649
Filing Dt:
10/24/2014
Publication #:
Pub Dt:
02/12/2015
Title:
3D TRANSISTOR CHANNEL MOBILITY ENHANCEMENT
24
Patent #:
Issue Dt:
05/31/2016
Application #:
14522652
Filing Dt:
10/24/2014
Publication #:
Pub Dt:
02/12/2015
Title:
HIGH-VOLTAGE METAL-INSULATOR-SEMICONDUCTOR FIELD EFFECT TRANSISTOR STRUCTURES
25
Patent #:
Issue Dt:
07/21/2015
Application #:
14522664
Filing Dt:
10/24/2014
Publication #:
Pub Dt:
02/12/2015
Title:
STRUCTURES AND METHODS FOR IMPROVING SOLDER BUMP CONNECTIONS IN SEMICONDUCTOR DEVICES
26
Patent #:
Issue Dt:
10/03/2017
Application #:
14522809
Filing Dt:
10/24/2014
Publication #:
Pub Dt:
04/28/2016
Title:
ELECTROPLATING SYSTEM AND METHOD OF USING ELECTROPLATING SYSTEM FOR CONTROLLING CONCENTRATION OF ORGANIC ADDITIVES IN ELECTROPLATING SOLUTION
27
Patent #:
Issue Dt:
12/19/2017
Application #:
14523076
Filing Dt:
10/24/2014
Publication #:
Pub Dt:
02/12/2015
Title:
FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURE
28
Patent #:
Issue Dt:
11/15/2016
Application #:
14523083
Filing Dt:
10/24/2014
Publication #:
Pub Dt:
04/28/2016
Title:
SEMICONDUCTOR STRUCTURES WITH FIELD EFFECT TRANSISTOR(S) HAVING LOW-RESISTANCE SOURCE/DRAIN CONTACT(S)
29
Patent #:
Issue Dt:
02/09/2016
Application #:
14523266
Filing Dt:
10/24/2014
Title:
INTEGRATED CIRCUITS WITH TEST STRUCTURES INCLUDING BI-DIRECTIONAL PROTECTION DIODES
30
Patent #:
Issue Dt:
02/28/2017
Application #:
14523548
Filing Dt:
10/24/2014
Publication #:
Pub Dt:
04/28/2016
Title:
FIN STRUCTURES AND MULTI-VT SCHEME BASED ON TAPERED FIN AND METHOD TO FORM
31
Patent #:
Issue Dt:
12/13/2016
Application #:
14523558
Filing Dt:
10/24/2014
Publication #:
Pub Dt:
04/28/2016
Title:
METHOD AND APPARATUS FOR ASSISTED METAL ROUTING
32
Patent #:
Issue Dt:
05/19/2015
Application #:
14524023
Filing Dt:
10/27/2014
Publication #:
Pub Dt:
02/12/2015
Title:
GATE SILICIDATION
33
Patent #:
Issue Dt:
02/24/2015
Application #:
14524076
Filing Dt:
10/27/2014
Publication #:
Pub Dt:
02/12/2015
Title:
METHODS OF FORMING SPACERS ON FINFETS AND OTHER SEMICONDUCTOR DEVICES
34
Patent #:
Issue Dt:
05/10/2016
Application #:
14524079
Filing Dt:
10/27/2014
Publication #:
Pub Dt:
04/23/2015
Title:
ANISOTROPIC DIELECTRIC MATERIAL GATE SPACER FOR A FIELD EFFECT TRANSISTOR
35
Patent #:
Issue Dt:
12/04/2018
Application #:
14524413
Filing Dt:
10/27/2014
Publication #:
Pub Dt:
04/30/2015
Title:
METHOD AND APPARATUS FOR SIMULATING A DIGITAL CIRCUIT
36
Patent #:
Issue Dt:
02/21/2017
Application #:
14524628
Filing Dt:
10/27/2014
Publication #:
Pub Dt:
04/28/2016
Title:
FABRICATION OF NANOWIRE FIELD EFFECT TRANSISTOR STRUCTURES
37
Patent #:
Issue Dt:
07/21/2015
Application #:
14524637
Filing Dt:
10/27/2014
Publication #:
Pub Dt:
02/12/2015
Title:
SEMICONDUCTOR TEST AND MONITORING STRUCTURE TO DETECT BOUNDARIES OF SAFE EFFECTIVE MODULUS
38
Patent #:
Issue Dt:
06/13/2017
Application #:
14525254
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
04/28/2016
Title:
ANODIZED METAL ON CARRIER WAFER
39
Patent #:
Issue Dt:
08/08/2017
Application #:
14525267
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
04/28/2016
Title:
NON-TRANSPARENT MICROELECTRONIC GRADE GLASS AS A SUBSTRATE, TEMPORARY CARRIER OR WAFER
40
Patent #:
Issue Dt:
04/04/2017
Application #:
14525288
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
04/28/2016
Title:
METHODS OF FORMING A TRI-GATE FINFET DEVICE
41
Patent #:
Issue Dt:
04/28/2015
Application #:
14525559
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
03/05/2015
Title:
INTEGRATED CIRCUIT INCLUDING DRAM AND SRAM/LOGIC
42
Patent #:
Issue Dt:
05/10/2016
Application #:
14525596
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
04/28/2016
Title:
METHOD AND APPARATUS FOR QUANTIFYING DEFECTS DUE TO THROUGH SILICON VIAs IN INTEGRATED CIRCUITS
43
Patent #:
Issue Dt:
10/20/2015
Application #:
14525682
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
02/12/2015
Title:
COMPENSATING FOR WARPAGE OF A FLIP CHIP PACKAGE BY VARYING HEIGHTS OF A REDISTRIBUTION LAYER ON AN INTEGRATED CIRCUIT CHIP
44
Patent #:
Issue Dt:
10/20/2015
Application #:
14525743
Filing Dt:
10/28/2014
Title:
METHOD TO FORM DEFECT FREE REPLACEMENT FINS BY H2 ANNEAL
45
Patent #:
Issue Dt:
04/26/2016
Application #:
14525744
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
04/28/2016
Title:
NON-PLANAR SCHOTTKY DIODE AND METHOD OF FABRICATION
46
Patent #:
Issue Dt:
05/10/2016
Application #:
14525763
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
04/28/2016
Title:
SEMICONDUCTOR STRUCTURE HAVING FINFET ULTRA THIN BODY AND METHODS OF FABRICATION THEREOF
47
Patent #:
Issue Dt:
08/30/2016
Application #:
14525796
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
04/28/2016
Title:
METHODS OF PRODUCING INTEGRATED CIRCUITS WITH AN AIR GAP
48
Patent #:
Issue Dt:
06/23/2015
Application #:
14525833
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
02/12/2015
Title:
RETARGETING SEMICONDUCTOR DEVICE SHAPES FOR MULTIPLE PATTERNING PROCESSES
49
Patent #:
Issue Dt:
11/29/2016
Application #:
14525842
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
04/28/2016
Title:
DUAL THREE-DIMENSIONAL AND RF SEMICONDUCTOR DEVICES USING LOCAL SOI
50
Patent #:
Issue Dt:
02/16/2016
Application #:
14526126
Filing Dt:
10/28/2014
Publication #:
Pub Dt:
02/12/2015
Title:
METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH A PROTECTED GATE CAP LAYER AND THE RESULTING DEVICE
51
Patent #:
Issue Dt:
12/25/2018
Application #:
14526580
Filing Dt:
10/29/2014
Publication #:
Pub Dt:
02/19/2015
Title:
SILICON CONTROLLED RECTIFIERS (SCR), METHODS OF MANUFACTURE AND DESIGN STRUCTURES
52
Patent #:
Issue Dt:
10/25/2016
Application #:
14526617
Filing Dt:
10/29/2014
Publication #:
Pub Dt:
05/05/2016
Title:
FINFET DEVICE INCLUDING A UNIFORM SILICON ALLOY FIN
53
Patent #:
Issue Dt:
01/31/2017
Application #:
14526678
Filing Dt:
10/29/2014
Publication #:
Pub Dt:
05/05/2016
Title:
METHODS OF FORMING AN IMPROVED VIA TO CONTACT INTERFACE BY SELECTIVE FORMATION OF A CONDUCTIVE CAPPING LAYER
54
Patent #:
Issue Dt:
10/11/2016
Application #:
14526729
Filing Dt:
10/29/2014
Publication #:
Pub Dt:
05/05/2016
Title:
METHODS OF FORMING AN IMPROVED VIA TO CONTACT INTERFACE BY SELECTIVE FORMATION OF A METAL SILICIDE CAPPING LAYER
55
Patent #:
Issue Dt:
07/03/2018
Application #:
14526980
Filing Dt:
10/29/2014
Publication #:
Pub Dt:
03/16/2017
Title:
METHODS OF FORMING SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT ELEMENTS AND THE RESULTING DEVICE
56
Patent #:
Issue Dt:
04/19/2016
Application #:
14527042
Filing Dt:
10/29/2014
Publication #:
Pub Dt:
03/05/2015
Title:
TRENCH ISOLATION STRUCTURES AND METHODS FOR BIPOLAR JUNCTION TRANSISTORS
57
Patent #:
Issue Dt:
05/17/2016
Application #:
14527207
Filing Dt:
10/29/2014
Publication #:
Pub Dt:
05/05/2016
Title:
EFFICIENT MAIN SPACER PULL BACK PROCESS FOR ADVANCED VLSI CMOS TECHNOLOGIES
58
Patent #:
Issue Dt:
11/29/2016
Application #:
14527424
Filing Dt:
10/29/2014
Publication #:
Pub Dt:
05/05/2016
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH ISOLATION REGIONS HAVING UNIFORM STEP HEIGHTS
59
Patent #:
Issue Dt:
05/26/2015
Application #:
14527813
Filing Dt:
10/30/2014
Publication #:
Pub Dt:
02/19/2015
Title:
DEVELOPABLE BOTTOM ANTIREFLECTIVE COATING COMPOSITION AND PATTERN FORMING METHOD USING THEREOF
60
Patent #:
Issue Dt:
03/29/2016
Application #:
14527867
Filing Dt:
10/30/2014
Title:
INTEGRATED CIRCUITS WITH SEPARATE WORKFUNCTION MATERIAL LAYERS AND METHODS FOR FABRICATING THE SAME
61
Patent #:
Issue Dt:
08/09/2016
Application #:
14528028
Filing Dt:
10/30/2014
Publication #:
Pub Dt:
03/05/2015
Title:
TWO MASK PROCESS FOR ELECTROPLATING METAL EMPLOYING A NEGATIVE ELECTROPHORETIC PHOTORESIST
62
Patent #:
Issue Dt:
02/21/2017
Application #:
14528316
Filing Dt:
10/30/2014
Publication #:
Pub Dt:
04/30/2015
Title:
LGA SOCKET TERMINAL DAMAGE PREVENTION
63
Patent #:
Issue Dt:
06/30/2015
Application #:
14528388
Filing Dt:
10/30/2014
Publication #:
Pub Dt:
02/26/2015
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED PARASITIC CAPACITANCE
64
Patent #:
Issue Dt:
02/23/2016
Application #:
14528830
Filing Dt:
10/30/2014
Publication #:
Pub Dt:
03/05/2015
Title:
DUMMY FIN FORMATION BY GAS CLUSTER ION BEAM
65
Patent #:
Issue Dt:
08/16/2016
Application #:
14529243
Filing Dt:
10/31/2014
Publication #:
Pub Dt:
03/05/2015
Title:
ELECTRICALLY CONTROLLED OPTICAL FUSE AND METHOD OF FABRICATION
66
Patent #:
Issue Dt:
10/25/2016
Application #:
14529332
Filing Dt:
10/31/2014
Publication #:
Pub Dt:
03/05/2015
Title:
FINFET WITH DIELECTRIC ISOLATION BY SILICON-ON-NOTHING AND METHOD OF FABRICATION
67
Patent #:
Issue Dt:
11/22/2016
Application #:
14529338
Filing Dt:
10/31/2014
Publication #:
Pub Dt:
04/30/2015
Title:
TECHNIQUES FOR MANAGING SECURITY MODES APPLIED TO APPLICATION PROGRAM EXECUTION
68
Patent #:
Issue Dt:
12/22/2015
Application #:
14529825
Filing Dt:
10/31/2014
Publication #:
Pub Dt:
11/26/2015
Title:
FINFET WITH DIELECTRIC ISOLATION BY SILICON-ON-NOTHING AND METHOD OF FABRICATION
69
Patent #:
Issue Dt:
07/05/2016
Application #:
14530796
Filing Dt:
11/02/2014
Publication #:
Pub Dt:
03/05/2015
Title:
DEVICE STRUCTURE WITH INCREASED CONTACT AREA AND REDUCED GATE CAPACITANCE
70
Patent #:
Issue Dt:
09/13/2016
Application #:
14532122
Filing Dt:
11/04/2014
Publication #:
Pub Dt:
03/26/2015
Title:
Gate-All-Around Nanowire MOSFET and Method of Formation
71
Patent #:
Issue Dt:
02/09/2016
Application #:
14532437
Filing Dt:
11/04/2014
Publication #:
Pub Dt:
03/05/2015
Title:
IN-SITU THERMOELECTRIC COOLING
72
Patent #:
Issue Dt:
03/28/2017
Application #:
14533464
Filing Dt:
11/05/2014
Publication #:
Pub Dt:
05/05/2016
Title:
ALTERNATING SPACE DECOMPOSITION IN CIRCUIT STRUCTURE FABRICATION
73
Patent #:
Issue Dt:
05/03/2016
Application #:
14533497
Filing Dt:
11/05/2014
Publication #:
Pub Dt:
05/05/2016
Title:
ACHIEVING A CRITICAL DIMENSION TARGET BASED ON RESIST CHARACTERISTICS
74
Patent #:
Issue Dt:
02/02/2016
Application #:
14533629
Filing Dt:
11/05/2014
Title:
PATTERNING ASSIST FEATURE TO MITIGATE REACTIVE ION ETCH MICROLOADING EFFECT
75
Patent #:
Issue Dt:
03/01/2016
Application #:
14535433
Filing Dt:
11/07/2014
Title:
FABRICATING STACKED NANOWIRE, FIELD-EFFECT TRANSISTORS
76
Patent #:
Issue Dt:
08/09/2016
Application #:
14535942
Filing Dt:
11/07/2014
Publication #:
Pub Dt:
05/12/2016
Title:
METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON FINFET DEVICES AND THE RESULTING DEVICES
77
Patent #:
Issue Dt:
01/10/2017
Application #:
14536026
Filing Dt:
11/07/2014
Publication #:
Pub Dt:
05/12/2016
Title:
METHODS OF FORMING PRODUCTS WITH FINFET SEMICONDUCTOR DEVICES WITHOUT REMOVING FINS IN CERTAIN AREAS OF THE PRODUCT
78
Patent #:
Issue Dt:
06/28/2016
Application #:
14536167
Filing Dt:
11/07/2014
Publication #:
Pub Dt:
05/12/2016
Title:
SELECTIVELY FORMING A PROTECTIVE CONDUCTIVE CAP ON A METAL GATE ELECTRODE
79
Patent #:
Issue Dt:
07/07/2015
Application #:
14536737
Filing Dt:
11/10/2014
Publication #:
Pub Dt:
03/05/2015
Title:
FABRICATION OF NICKEL FREE SILICIDE FOR SEMICONDUCTOR CONTACT METALLIZATION
80
Patent #:
Issue Dt:
10/27/2015
Application #:
14537139
Filing Dt:
11/10/2014
Publication #:
Pub Dt:
02/26/2015
Title:
FINFET STRUCTURE AND METHOD TO ADJUST THRESHOLD VOLTAGE IN A FINFET STRUCTURE
81
Patent #:
Issue Dt:
10/25/2016
Application #:
14537832
Filing Dt:
11/10/2014
Publication #:
Pub Dt:
05/12/2016
Title:
SEMICONDUCTOR JUNCTION FORMATION
82
Patent #:
Issue Dt:
11/08/2016
Application #:
14538170
Filing Dt:
11/11/2014
Publication #:
Pub Dt:
04/23/2015
Title:
FABRICATING PREASSEMBLED OPTOELECTRONIC INTERCONNECT STRUCTURES
83
Patent #:
Issue Dt:
04/18/2017
Application #:
14538401
Filing Dt:
11/11/2014
Publication #:
Pub Dt:
03/05/2015
Title:
SELF-ALIGNED DIELECTRIC ISOLATION FOR FINFET DEVICES
84
Patent #:
Issue Dt:
08/18/2015
Application #:
14538944
Filing Dt:
11/12/2014
Publication #:
Pub Dt:
03/05/2015
Title:
COPPER INTERCONNECT WITH CVD LINER AND METALLIC CAP
85
Patent #:
Issue Dt:
11/17/2015
Application #:
14540504
Filing Dt:
11/13/2014
Title:
TOPOLOGICAL METHOD TO BUILD SELF-ALIGNED MTJ WITHOUT A MASK
86
Patent #:
Issue Dt:
10/11/2016
Application #:
14540724
Filing Dt:
11/13/2014
Publication #:
Pub Dt:
05/19/2016
Title:
METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE
87
Patent #:
Issue Dt:
07/21/2015
Application #:
14541182
Filing Dt:
11/14/2014
Publication #:
Pub Dt:
03/12/2015
Title:
SEMICONDUCTOR DEVICES HAVING DIFFERENT GATE OXIDE THICKNESSES
88
Patent #:
Issue Dt:
09/13/2016
Application #:
14541754
Filing Dt:
11/14/2014
Publication #:
Pub Dt:
05/19/2016
Title:
INTEGRATED CIRCUITS WITH MIDDLE OF LINE CAPACITANCE REDUCTION IN SELF-ALIGNED CONTACT PROCESS FLOW AND FABRICATION METHODS
89
Patent #:
Issue Dt:
11/08/2016
Application #:
14541803
Filing Dt:
11/14/2014
Publication #:
Pub Dt:
05/19/2016
Title:
THREE DIMENSIONAL ORGANIC OR GLASS INTERPOSER
90
Patent #:
Issue Dt:
11/22/2016
Application #:
14543992
Filing Dt:
11/18/2014
Publication #:
Pub Dt:
05/19/2016
Title:
SELF-ALIGNED VIA PROCESS FLOW
91
Patent #:
Issue Dt:
10/20/2015
Application #:
14546058
Filing Dt:
11/18/2014
Publication #:
Pub Dt:
03/12/2015
Title:
HIGH LINEARITY SOI WAFER FOR LOW-DISTORTION CIRCUIT APPLICATIONS
92
Patent #:
Issue Dt:
07/24/2018
Application #:
14546065
Filing Dt:
11/18/2014
Publication #:
Pub Dt:
05/19/2016
Title:
INTEGRATED CIRCUIT PERFORMANCE MODELING USING A CONNECTIVITY-BASED CONDENSED RESISTANCE MODEL FOR A CONDUCTIVE STRUCTURE IN AN INTEGRATED CIRCUIT
93
Patent #:
Issue Dt:
11/26/2019
Application #:
14546318
Filing Dt:
11/18/2014
Publication #:
Pub Dt:
05/19/2016
Title:
SCOPED SEARCH ENGINE
94
Patent #:
Issue Dt:
06/28/2016
Application #:
14546460
Filing Dt:
11/18/2014
Publication #:
Pub Dt:
05/21/2015
Title:
TARGET IDENTIFICATION FOR SENDING CONTENT FROM A MOBILE DEVICE
95
Patent #:
Issue Dt:
09/20/2016
Application #:
14546554
Filing Dt:
11/18/2014
Publication #:
Pub Dt:
03/12/2015
Title:
DYNAMIC RECONFIGURATION-SWITCHING OF WINDINGS IN AN ELECTRIC MOTOR
96
Patent #:
Issue Dt:
07/21/2015
Application #:
14547504
Filing Dt:
11/19/2014
Publication #:
Pub Dt:
06/18/2015
Title:
TAPE SERVO TRACK WRITE COMPENSATION
97
Patent #:
Issue Dt:
12/13/2016
Application #:
14548624
Filing Dt:
11/20/2014
Publication #:
Pub Dt:
05/21/2015
Title:
VIRTUAL MACHINE BACKUP
98
Patent #:
Issue Dt:
10/11/2016
Application #:
14548929
Filing Dt:
11/20/2014
Publication #:
Pub Dt:
05/26/2016
Title:
FORWARD ERROR CORRECTION SYNCHRONIZATION
99
Patent #:
Issue Dt:
03/22/2016
Application #:
14549117
Filing Dt:
11/20/2014
Publication #:
Pub Dt:
03/19/2015
Title:
INTEGRATED CIRCUITS WITH SRAM CELLS HAVING ADDITIONAL READ STACKS
100
Patent #:
Issue Dt:
12/22/2015
Application #:
14549663
Filing Dt:
11/21/2014
Publication #:
Pub Dt:
03/19/2015
Title:
SYSTEMS AND METHODS FOR MANAGING COMPUTING SYSTEMS UTILIZING AUGMENTED REALITY
Assignor
1
Exec Dt:
11/27/2018
Assignee
1
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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