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Reel/Frame:052879/0852   Pages: 27
Recorded: 06/09/2020
Attorney Dkt #:2515.5050
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 100
Page 1 of 2
Pages: 1 2
1
Patent #:
8067831
Issue Dt:
11/29/2011
Application #:
11162629
Filing Dt:
09/16/2005
Publication #:
US20070063331
Pub Dt:
03/22/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PLANAR INTERCONNECTS
2
Patent #:
8089143
Issue Dt:
01/03/2012
Application #:
11162635
Filing Dt:
09/16/2005
Publication #:
US20060175695
Pub Dt:
08/10/2006
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM USING INTERPOSER
3
Patent #:
8093694
Issue Dt:
01/10/2012
Application #:
11164088
Filing Dt:
11/10/2005
Publication #:
US20060180904
Pub Dt:
08/17/2006
Title:
METHOD OF MANUFACTURING NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING ETCHED DIFFERENTIAL HEIGHT LEAD STRUCTURES
4
Patent #:
8125076
Issue Dt:
02/28/2012
Application #:
11164132
Filing Dt:
11/10/2005
Publication #:
US20060103010
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH SUBSTRATE HEAT SINK
5
Patent #:
8138080
Issue Dt:
03/20/2012
Application #:
11276716
Filing Dt:
03/10/2006
Publication #:
US20070210436
Pub Dt:
09/13/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING INTERCONNECT STACK AND EXTERNAL INTERCONNECT
6
Patent #:
8124455
Issue Dt:
02/28/2012
Application #:
11306098
Filing Dt:
12/15/2005
Publication #:
US20060219351
Pub Dt:
10/05/2006
Title:
WAFER STRENGTH REINFORCEMENT SYSTEM FOR ULTRA THIN WAFER THINNING
7
Patent #:
8124459
Issue Dt:
02/28/2012
Application #:
11306806
Filing Dt:
01/11/2006
Publication #:
US20070108605
Pub Dt:
05/17/2007
Title:
BUMP CHIP CARRIER SEMICONDUCTOR PACKAGE SYSTEM
8
Patent #:
8120149
Issue Dt:
02/21/2012
Application #:
11307128
Filing Dt:
01/24/2006
Publication #:
US20070170559
Pub Dt:
07/26/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
9
Patent #:
8120156
Issue Dt:
02/21/2012
Application #:
11307723
Filing Dt:
02/17/2006
Publication #:
US20070194424
Pub Dt:
08/23/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DIE ON BASE PACKAGE
10
Patent #:
8138586
Issue Dt:
03/20/2012
Application #:
11381684
Filing Dt:
05/04/2006
Publication #:
US20070108566
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-PLANAR PADDLE
11
Patent #:
8124520
Issue Dt:
02/28/2012
Application #:
11456551
Filing Dt:
07/10/2006
Publication #:
US20080014738
Pub Dt:
01/17/2008
Title:
INTEGRATED CIRCUIT MOUNT SYSTEM WITH SOLDER MASK PAD
12
Patent #:
8039365
Issue Dt:
10/18/2011
Application #:
11456845
Filing Dt:
07/11/2006
Publication #:
US20080012095
Pub Dt:
01/17/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING WAFER LEVEL SPACER
13
Patent #:
8124460
Issue Dt:
02/28/2012
Application #:
11458078
Filing Dt:
07/17/2006
Publication #:
US20080012098
Pub Dt:
01/17/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING AN EXPOSED THERMALLY CONDUCTIVE COATING
14
Patent #:
8134196
Issue Dt:
03/13/2012
Application #:
11469576
Filing Dt:
09/01/2006
Publication #:
US20070108615
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT SYSTEM WITH METAL-INSULATOR-METAL CIRCUIT ELEMENT
15
Patent #:
8067271
Issue Dt:
11/29/2011
Application #:
11532509
Filing Dt:
09/15/2006
Publication #:
US20080067640
Pub Dt:
03/20/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATION LOCK
16
Patent #:
8093693
Issue Dt:
01/10/2012
Application #:
11532510
Filing Dt:
09/15/2006
Publication #:
US20080067698
Pub Dt:
03/20/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATION LOCK
17
Patent #:
8114771
Issue Dt:
02/14/2012
Application #:
11615923
Filing Dt:
12/22/2006
Publication #:
US20070164422
Pub Dt:
07/19/2007
Title:
SEMICONDUCTOR WAFER SCALE PACKAGE SYSTEM
18
Patent #:
8089166
Issue Dt:
01/03/2012
Application #:
11618805
Filing Dt:
12/30/2006
Publication #:
US20080157401
Pub Dt:
07/03/2008
Title:
INTEGRATED CIRCUIT PACKAGE WITH TOP PAD
19
Patent #:
8134227
Issue Dt:
03/13/2012
Application #:
11694927
Filing Dt:
03/30/2007
Publication #:
US20080237825
Pub Dt:
10/02/2008
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONDUCTIVE SPACER
20
Patent #:
8039947
Issue Dt:
10/18/2011
Application #:
11749693
Filing Dt:
05/16/2007
Publication #:
US20070267731
Pub Dt:
11/22/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DIFFERENT MOLD LOCKING FEATURES
21
Patent #:
8115305
Issue Dt:
02/14/2012
Application #:
11750218
Filing Dt:
05/17/2007
Publication #:
US20080284002
Pub Dt:
11/20/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THIN PROFILE
22
Patent #:
8062934
Issue Dt:
11/22/2011
Application #:
11766785
Filing Dt:
06/21/2007
Publication #:
US20080006929
Pub Dt:
01/10/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH GROUND BONDS
23
Patent #:
8129827
Issue Dt:
03/06/2012
Application #:
11855114
Filing Dt:
09/13/2007
Publication #:
US20090072412
Pub Dt:
03/19/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE ENCAPSULATION HAVING RECESS
24
Patent #:
8120150
Issue Dt:
02/21/2012
Application #:
11857402
Filing Dt:
09/18/2007
Publication #:
US20090072366
Pub Dt:
03/19/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL CONNECTIVITY
25
Patent #:
8124451
Issue Dt:
02/28/2012
Application #:
11859359
Filing Dt:
09/21/2007
Publication #:
US20090079091
Pub Dt:
03/26/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
26
Patent #:
8138591
Issue Dt:
03/20/2012
Application #:
11860460
Filing Dt:
09/24/2007
Publication #:
US20080073770
Pub Dt:
03/27/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKED DIE
27
Patent #:
8067825
Issue Dt:
11/29/2011
Application #:
11863700
Filing Dt:
09/28/2007
Publication #:
US20090085181
Pub Dt:
04/02/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DIE
28
Patent #:
8129832
Issue Dt:
03/06/2012
Application #:
11927646
Filing Dt:
10/29/2007
Publication #:
US20090108428
Pub Dt:
04/30/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE HAVING A CONDUCTOR-FREE RECESS
29
Patent #:
8084849
Issue Dt:
12/27/2011
Application #:
11954603
Filing Dt:
12/12/2007
Publication #:
US20090152692
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKING
30
Patent #:
8067275
Issue Dt:
11/29/2011
Application #:
11957845
Filing Dt:
12/17/2007
Publication #:
US20090155961
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
31
Patent #:
8124490
Issue Dt:
02/28/2012
Application #:
11958546
Filing Dt:
12/18/2007
Publication #:
US20080153245
Pub Dt:
06/26/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PASSIVE DEVICES
32
Patent #:
8067307
Issue Dt:
11/29/2011
Application #:
12037291
Filing Dt:
02/26/2008
Publication #:
US20090212408
Pub Dt:
08/27/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
33
Patent #:
8138024
Issue Dt:
03/20/2012
Application #:
12037774
Filing Dt:
02/26/2008
Publication #:
US20090212401
Pub Dt:
08/27/2009
Title:
PACKAGE SYSTEM FOR SHIELDING SEMICONDUCTOR DIES FROM ELECTROMAGNETIC INTERFERENCE
34
Patent #:
8138027
Issue Dt:
03/20/2012
Application #:
12044688
Filing Dt:
03/07/2008
Publication #:
US20090224386
Pub Dt:
09/10/2009
Title:
OPTICAL SEMICONDUCTOR DEVICE HAVING PRE-MOLDED LEADFRAME WITH WINDOW AND METHOD THEREFOR
35
Patent #:
8067828
Issue Dt:
11/29/2011
Application #:
12046369
Filing Dt:
03/11/2008
Publication #:
US20090230532
Pub Dt:
09/17/2009
Title:
SYSTEM FOR SOLDER BALL INNER STACKING MODULE CONNECTION
36
Patent #:
8072047
Issue Dt:
12/06/2011
Application #:
12124793
Filing Dt:
05/21/2008
Publication #:
US20090289335
Pub Dt:
11/26/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELD AND TIE BAR
37
Patent #:
8049314
Issue Dt:
11/01/2011
Application #:
12126684
Filing Dt:
05/23/2008
Publication #:
US20090127683
Pub Dt:
05/21/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INSULATOR OVER CIRCUITRY
38
Patent #:
8101460
Issue Dt:
01/24/2012
Application #:
12133216
Filing Dt:
06/04/2008
Publication #:
US20090302435
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF SHIELDING SEMICONDUCTOR DIE FROM INTER-DEVICE INTERFERENCE
39
Patent #:
8050047
Issue Dt:
11/01/2011
Application #:
12136002
Filing Dt:
06/09/2008
Publication #:
US20090016032
Pub Dt:
01/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEXIBLE SUBSTRATE AND RECESSED PACKAGE
40
Patent #:
8039942
Issue Dt:
10/18/2011
Application #:
12141059
Filing Dt:
06/17/2008
Publication #:
US20090309204
Pub Dt:
12/17/2009
Title:
BALL GRID ARRAY PACKAGE STACKING SYSTEM
41
Patent #:
8138590
Issue Dt:
03/20/2012
Application #:
12143047
Filing Dt:
06/20/2008
Publication #:
US20090315164
Pub Dt:
12/24/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULATION
42
Patent #:
8110913
Issue Dt:
02/07/2012
Application #:
12144931
Filing Dt:
06/24/2008
Publication #:
US20090001531
Pub Dt:
01/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE
43
Patent #:
8134242
Issue Dt:
03/13/2012
Application #:
12185616
Filing Dt:
08/04/2008
Publication #:
US20100029046
Pub Dt:
02/04/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONCAVE TERMINAL
44
Patent #:
8102666
Issue Dt:
01/24/2012
Application #:
12194506
Filing Dt:
08/19/2008
Publication #:
US20100046183
Pub Dt:
02/25/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
45
Patent #:
8143096
Issue Dt:
03/27/2012
Application #:
12194507
Filing Dt:
08/19/2008
Publication #:
US20100044882
Pub Dt:
02/25/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FLIP CHIP
46
Patent #:
8143102
Issue Dt:
03/27/2012
Application #:
12235111
Filing Dt:
09/22/2008
Publication #:
US20090091042
Pub Dt:
04/09/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE HAVING RELIEVED ACTIVE REGION
47
Patent #:
8110441
Issue Dt:
02/07/2012
Application #:
12238007
Filing Dt:
09/25/2008
Publication #:
US20100072582
Pub Dt:
03/25/2010
Title:
METHOD OF ELECTRICALLY CONNECTING A SHIELDING LAYER TO GROUND THROUGH A CONDUCTIVE VIA DISPOSED IN PERIPHERAL REGION AROUND SEMICONDUCTOR DIE
48
Patent #:
8063475
Issue Dt:
11/22/2011
Application #:
12239715
Filing Dt:
09/26/2008
Publication #:
US20100078789
Pub Dt:
04/01/2010
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH THROUGH SILICON VIA INTERPOSER
49
Patent #:
8106502
Issue Dt:
01/31/2012
Application #:
12272751
Filing Dt:
11/17/2008
Publication #:
US20100123229
Pub Dt:
05/20/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLATED PAD AND METHOD OF MANUFACTURE THEREOF
50
Patent #:
8130512
Issue Dt:
03/06/2012
Application #:
12273541
Filing Dt:
11/18/2008
Publication #:
US20100123233
Pub Dt:
05/20/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF PACKAGE STACKING
51
Patent #:
8080885
Issue Dt:
12/20/2011
Application #:
12273547
Filing Dt:
11/19/2008
Publication #:
US20100123251
Pub Dt:
05/20/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI LEVEL CONTACT AND METHOD OF MANUFACTURE THEREOF
52
Patent #:
8110905
Issue Dt:
02/07/2012
Application #:
12328717
Filing Dt:
12/04/2008
Publication #:
US20090152547
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME INTERPOSER AND METHOD OF MANUFACTURE THEREOF
53
Patent #:
8110908
Issue Dt:
02/07/2012
Application #:
12328722
Filing Dt:
12/04/2008
Publication #:
US20100140769
Pub Dt:
06/10/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM USING BOTTOM FLIP CHIP DIE BONDING AND METHOD OF MANUFACTURE THEREOF
54
Patent #:
8063477
Issue Dt:
11/22/2011
Application #:
12328762
Filing Dt:
12/04/2008
Publication #:
US20100140770
Pub Dt:
06/10/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING ASYMMETRIC ENCAPSULATION STRUCTURES AND METHOD OF MANUFACTURE THEREOF
55
Patent #:
8137995
Issue Dt:
03/20/2012
Application #:
12332799
Filing Dt:
12/11/2008
Publication #:
US20100148353
Pub Dt:
06/17/2010
Title:
DOUBLE-SIDED SEMICONDUCTOR DEVICE AND METHOD OF FORMING TOP-SIDE AND BOTTOM-SIDE INTERCONNECT STRUCTURES
56
Patent #:
8106498
Issue Dt:
01/31/2012
Application #:
12398466
Filing Dt:
03/05/2009
Publication #:
US20100224975
Pub Dt:
09/09/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A DUAL BOARD-ON-CHIP STRUCTURE AND METHOD OF MANUFACTURE THEREOF
57
Patent #:
8093151
Issue Dt:
01/10/2012
Application #:
12404069
Filing Dt:
03/13/2009
Publication #:
US20100230822
Pub Dt:
09/16/2010
Title:
SEMICONDUCTOR DIE AND METHOD OF FORMING NOISE ABSORBING REGIONS BETWEEN THVS IN PERIPHERAL REGION OF THE DIE
58
Patent #:
8133762
Issue Dt:
03/13/2012
Application #:
12406049
Filing Dt:
03/17/2009
Publication #:
US20100237495
Pub Dt:
09/23/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE
59
Patent #:
8097489
Issue Dt:
01/17/2012
Application #:
12409142
Filing Dt:
03/23/2009
Publication #:
US20100237477
Pub Dt:
09/23/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING PRE-FABRICATED SHIELDING FRAME OVER SEMICONDUCTOR DIE
60
Patent #:
8143098
Issue Dt:
03/27/2012
Application #:
12411040
Filing Dt:
03/25/2009
Publication #:
US20100244024
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER AND METHOD OF MANUFACTURE THEREOF
61
Patent #:
8129837
Issue Dt:
03/06/2012
Application #:
12432137
Filing Dt:
04/29/2009
Publication #:
US20090206493
Pub Dt:
08/20/2009
Title:
FLIP CHIP INTERCONNECTION PAD LAYOUT
62
Patent #:
8110440
Issue Dt:
02/07/2012
Application #:
12467865
Filing Dt:
05/18/2009
Publication #:
US20100289131
Pub Dt:
11/18/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE
63
Patent #:
8141247
Issue Dt:
03/27/2012
Application #:
12468810
Filing Dt:
05/19/2009
Publication #:
US20090223048
Pub Dt:
09/10/2009
Title:
A METHOD OF A PACKAGE ON PACKAGE PACKAGING
64
Patent #:
8119450
Issue Dt:
02/21/2012
Application #:
12472083
Filing Dt:
05/26/2009
Publication #:
US20090227072
Pub Dt:
09/10/2009
Title:
INTERCONNECTING A CHIP AND A SUBSTRATE BY BONDING PURE METAL BUMPS AND PURE METAL SPOTS
65
Patent #:
8080446
Issue Dt:
12/20/2011
Application #:
12473253
Filing Dt:
05/27/2009
Publication #:
US20100301469
Pub Dt:
12/02/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER INTERCONNECTIONS AND METHOD OF MANUFACTURE THEREOF
66
Patent #:
8072059
Issue Dt:
12/06/2011
Application #:
12476447
Filing Dt:
06/02/2009
Publication #:
US20090236686
Pub Dt:
09/24/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING UBM FIXED RELATIVE TO INTERCONNECT STRUCTURE FOR ALIGNMENT OF SEMICONDUCTOR DIE
67
Patent #:
8067308
Issue Dt:
11/29/2011
Application #:
12480317
Filing Dt:
06/08/2009
Publication #:
US20100308443
Pub Dt:
12/09/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN INTERCONNECT STRUCTURE WITH TSV USING ENCAPSULANT FOR STRUCTURAL SUPPORT
68
Patent #:
8105915
Issue Dt:
01/31/2012
Application #:
12484146
Filing Dt:
06/12/2009
Publication #:
US20100314780
Pub Dt:
12/16/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE BETWEEN NON-LINEAR PORTIONS OF CONDUCTIVE LAYERS
69
Patent #:
8119447
Issue Dt:
02/21/2012
Application #:
12486271
Filing Dt:
06/17/2009
Publication #:
US20100320601
Pub Dt:
12/23/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH VIA DIE HAVING PEDESTAL AND RECESS AND METHOD OF MANUFACTURE THEREOF
70
Patent #:
8106499
Issue Dt:
01/31/2012
Application #:
12488555
Filing Dt:
06/20/2009
Publication #:
US20100320583
Pub Dt:
12/23/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A DUAL SUBSTRATE PACKAGE AND METHOD OF MANUFACTURE THEREOF
71
Patent #:
8102040
Issue Dt:
01/24/2012
Application #:
12544555
Filing Dt:
08/20/2009
Publication #:
US20090309207
Pub Dt:
12/17/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DIE AND PACKAGE COMBINATION
72
Patent #:
8076232
Issue Dt:
12/13/2011
Application #:
12562414
Filing Dt:
09/18/2009
Publication #:
US20100007019
Pub Dt:
01/14/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPOSITE BUMP-ON-LEAD INTERCONNECTION
73
Patent #:
8067272
Issue Dt:
11/29/2011
Application #:
12578797
Filing Dt:
10/14/2009
Publication #:
US20100038768
Pub Dt:
02/18/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND MANUFACTURING METHOD THEREOF
74
Patent #:
8080867
Issue Dt:
12/20/2011
Application #:
12608587
Filing Dt:
10/29/2009
Publication #:
US20110101542
Pub Dt:
05/05/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT AND METHOD OF MANUFACTURE THEREOF
75
Patent #:
8129841
Issue Dt:
03/06/2012
Application #:
12624482
Filing Dt:
11/24/2009
Publication #:
US20100065966
Pub Dt:
03/18/2010
Title:
SOLDER JOINT FLIP CHIP INTERCONNECTION
76
Patent #:
8115293
Issue Dt:
02/14/2012
Application #:
12633789
Filing Dt:
12/08/2009
Publication #:
US20110133325
Pub Dt:
06/09/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
77
Patent #:
8115287
Issue Dt:
02/14/2012
Application #:
12635699
Filing Dt:
12/10/2009
Publication #:
US20110140252
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL ROW LEAD-FRAME HAVING TOP AND BOTTOM TERMINALS AND METHOD OF MANUFACTURE THEREOF
78
Patent #:
8097496
Issue Dt:
01/17/2012
Application #:
12703450
Filing Dt:
02/10/2010
Publication #:
US20100144100
Pub Dt:
06/10/2010
Title:
METHOD OF FORMING QUAD FLAT PACKAGE
79
Patent #:
8097935
Issue Dt:
01/17/2012
Application #:
12703461
Filing Dt:
02/10/2010
Publication #:
US20100140761
Pub Dt:
06/10/2010
Title:
QUAD FLAT PACKAGE
80
Patent #:
8067306
Issue Dt:
11/29/2011
Application #:
12714320
Filing Dt:
02/26/2010
Publication #:
US20110210437
Pub Dt:
09/01/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXPOSED CONDUCTOR AND METHOD OF MANUFACTURE THEREOF
81
Patent #:
8143107
Issue Dt:
03/27/2012
Application #:
12715910
Filing Dt:
03/02/2010
Publication #:
US20100155926
Pub Dt:
06/24/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM FOR FINE PITCH SUBSTRATES AND METHOD OF MANUFACTURE THEREOF
82
Patent #:
8039384
Issue Dt:
10/18/2011
Application #:
12720029
Filing Dt:
03/09/2010
Publication #:
US20110221058
Pub Dt:
09/15/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON DIFFERENT HEIGHT TRACES
83
Patent #:
8138595
Issue Dt:
03/20/2012
Application #:
12732423
Filing Dt:
03/26/2010
Publication #:
US20110233752
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERMEDIATE PAD AND METHOD OF MANUFACTURE THEREOF
84
Patent #:
8049322
Issue Dt:
11/01/2011
Application #:
12772128
Filing Dt:
04/30/2010
Publication #:
US20100230796
Pub Dt:
09/16/2010
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM AND METHOD FOR MAKING THEREOF
85
Patent #:
8049328
Issue Dt:
11/01/2011
Application #:
12775188
Filing Dt:
05/06/2010
Publication #:
US20100213610
Pub Dt:
08/26/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN INTERCONNECT STRUCTURE FOR 3-D DEVICES USING ENCAPSULANT FOR STRUCTURAL SUPPORT
86
Patent #:
8106500
Issue Dt:
01/31/2012
Application #:
12777023
Filing Dt:
05/10/2010
Publication #:
US20100219523
Pub Dt:
09/02/2010
Title:
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
87
Patent #:
8067268
Issue Dt:
11/29/2011
Application #:
12782992
Filing Dt:
05/19/2010
Publication #:
US20100224979
Pub Dt:
09/09/2010
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD FOR MANUFACTURING THEREOF
88
Patent #:
8110477
Issue Dt:
02/07/2012
Application #:
12826368
Filing Dt:
06/29/2010
Publication #:
US20100264512
Pub Dt:
10/21/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH-FREQUENCY CIRCUIT STRUCTURE AND METHOD THEREOF
89
Patent #:
8076757
Issue Dt:
12/13/2011
Application #:
12830390
Filing Dt:
07/05/2010
Publication #:
US20100270661
Pub Dt:
10/28/2010
Title:
SEMICONDUCTOR DEVICE HAVING ELECTRICAL DEVICES MOUNTED TO IPD STRUCTURE AND METHOD OF SHIELDING ELECTROMAGNETIC INTERFERENCE
90
Patent #:
8143711
Issue Dt:
03/27/2012
Application #:
12831822
Filing Dt:
07/07/2010
Publication #:
US20100270680
Pub Dt:
10/28/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKING AND ANTI-FLASH STRUCTURE
91
Patent #:
8076184
Issue Dt:
12/13/2011
Application #:
12857395
Filing Dt:
08/16/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING WAFER-LEVEL MULTI-ROW ETCHED LEADFRAME WITH BASE LEADS AND EMBEDDED SEMICONDUCTOR DIE
92
Patent #:
8093727
Issue Dt:
01/10/2012
Application #:
12871031
Filing Dt:
08/30/2010
Publication #:
US20100320621
Pub Dt:
12/23/2010
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH SIDE-BY-SIDE AND OFFSET STACKING AND METHOD FOR MANUFACTURING THEREOF
93
Patent #:
8120187
Issue Dt:
02/21/2012
Application #:
12892941
Filing Dt:
09/29/2010
Publication #:
US20110012270
Pub Dt:
01/20/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING AND METHOD OF MANUFACTURE THEREOF
94
Patent #:
8093100
Issue Dt:
01/10/2012
Application #:
12949835
Filing Dt:
11/19/2010
Publication #:
US20110062591
Pub Dt:
03/17/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING THROUGH SILICON VIA WITH DIRECT INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
95
Patent #:
8067832
Issue Dt:
11/29/2011
Application #:
12964638
Filing Dt:
12/09/2010
Publication #:
US20110079899
Pub Dt:
04/07/2011
Title:
EMBEDDED INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
96
Patent #:
8143108
Issue Dt:
03/27/2012
Application #:
12965584
Filing Dt:
12/10/2010
Publication #:
US20110074028
Pub Dt:
03/31/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF DISSIPATING HEAT FROM THIN PACKAGE-ON-PACKAGE MOUNTED TO SUBSTRATE
97
Patent #:
8138017
Issue Dt:
03/20/2012
Application #:
12974866
Filing Dt:
12/21/2010
Publication #:
US20110095439
Pub Dt:
04/28/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THROUGH SEMICONDUCTOR VIAS AND METHOD OF MANUFACTURE THEREOF
98
Patent #:
8102043
Issue Dt:
01/24/2012
Application #:
13006278
Filing Dt:
01/13/2011
Publication #:
US20110108976
Pub Dt:
05/12/2011
Title:
STACKED INTEGRATED CIRCUIT AND PACKAGE SYSTEM AND METHOD FOR MANUFACTURING THEREOF
99
Patent #:
8143103
Issue Dt:
03/27/2012
Application #:
13017388
Filing Dt:
01/31/2011
Publication #:
US20110121465
Pub Dt:
05/26/2011
Title:
PACKAGE STACKING SYSTEM WITH MOLD CONTAMINATION PREVENTION AND METHOD FOR MANUFACTURING THEREOF
100
Patent #:
8143104
Issue Dt:
03/27/2012
Application #:
13269258
Filing Dt:
10/07/2011
Publication #:
US20120028413
Pub Dt:
02/02/2012
Title:
METHOD FOR MANUFACTURING BALL GRID ARRAY PACKAGE STACKING SYSTEM
Assignor
1
CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Exec Dt:
05/03/2019
Assignees
1
STATS CHIPPAC, INC.
46429 LANDING PARKWAY
FREMONT, CALIFORNIA 94538
2
STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
5 YISHUN STREET 23
SINGAPORE, SINGAPORE 768442
Correspondence name and address
PATENT LAW GROUP: ATKINS AND ASSOCIATES
123 W. CHANDLER HEIGHTS ROAD, #12535
CHANDLER, AZ 85248

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