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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:052938/0305   Pages: 27
Recorded: 06/15/2020
Attorney Dkt #:2515.5050
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 100
Page 1 of 2
Pages: 1 2
1
Patent #:
Issue Dt:
01/02/2001
Application #:
09104031
Filing Dt:
06/24/1998
Title:
METHOD OF FORMING EXTENDED LEAD PACKAGE
2
Patent #:
Issue Dt:
08/15/2000
Application #:
09161408
Filing Dt:
09/28/1998
Title:
MOLDED TAPE SUPPORT FOR A MOLDED CIRCUIT PACKAGE PRIOR TO DICING
3
Patent #:
Issue Dt:
08/07/2001
Application #:
09174620
Filing Dt:
10/19/1998
Title:
UNIVERSAL DOCKING SYSTEM
4
Patent #:
Issue Dt:
10/09/2001
Application #:
09182762
Filing Dt:
10/30/1998
Title:
RELIABLE METHOD AND APPARATUS FOR INTERFACING BETWEEN A BALL GRID ARRAY HANDLER AND A BALL GRID ARRAY TESTING SYSTEM
5
Patent #:
Issue Dt:
03/12/2002
Application #:
09249251
Filing Dt:
02/12/1999
Title:
METHOD OF MOLDING FLEXIBLE CIRCUIT WITH MOLDED STIFFENER
6
Patent #:
Issue Dt:
01/23/2001
Application #:
09307838
Filing Dt:
05/10/1999
Title:
VELCRO STRAPPING FOR SEMICONDUCTOR CARRYING TRAYS
7
Patent #:
Issue Dt:
02/06/2001
Application #:
09320752
Filing Dt:
05/27/1999
Title:
CONTACTOR SLEEVE ASSEMBLY FOR A PICK AND PLACE SEMICONDUCTOR DEVICE HANDLER
8
Patent #:
Issue Dt:
07/03/2001
Application #:
09366752
Filing Dt:
08/04/1999
Title:
FLIP CHIP THERMALLY ENHANCED BALL GRID ARRAY
9
Patent #:
Issue Dt:
06/05/2001
Application #:
09412631
Filing Dt:
10/04/1999
Title:
DEVICE PROBE SOCKET FORMING PART OF A TEST HEAD, INTERFACING BETWEEN TEST HEAD AND A PROBE HANDLER, USED FOR DEVICE STRIP TESTING
10
Patent #:
Issue Dt:
11/20/2001
Application #:
09467119
Filing Dt:
12/20/1999
Title:
ZIG-ZAGGED PLATING BUS LINES
11
Patent #:
Issue Dt:
09/04/2001
Application #:
09638749
Filing Dt:
08/14/2000
Title:
Boat and assembly method for ball grid array packages
12
Patent #:
Issue Dt:
08/21/2001
Application #:
09670380
Filing Dt:
09/27/2000
Title:
Copper pads for heat spreader attach
13
Patent #:
Issue Dt:
09/06/2005
Application #:
10791095
Filing Dt:
03/01/2004
Publication #:
Pub Dt:
09/16/2004
Title:
TORCH BUMP
14
Patent #:
Issue Dt:
07/10/2007
Application #:
10906697
Filing Dt:
03/02/2005
Publication #:
Pub Dt:
09/07/2006
Title:
STACKED SEMICONDUCTOR PACKAGES AND METHOD THEREFOR
15
Patent #:
Issue Dt:
03/04/2008
Application #:
10907758
Filing Dt:
04/14/2005
Publication #:
Pub Dt:
10/19/2006
Title:
LEADFRAME WITH ENCAPSULANT GUIDE AND METHOD FOR THE FABRICATION THEREOF
16
Patent #:
Issue Dt:
07/03/2007
Application #:
10907991
Filing Dt:
04/22/2005
Publication #:
Pub Dt:
10/26/2006
Title:
SYSTEM FOR PEELING SEMICONDUCTOR CHIPS FROM TAPE
17
Patent #:
Issue Dt:
12/12/2006
Application #:
10908120
Filing Dt:
04/28/2005
Publication #:
Pub Dt:
11/02/2006
Title:
SEMICONDUCTOR PACKAGE WITH CONTROLLED SOLDER BUMP WETTING AND FABRICATION METHOD THEREFOR
18
Patent #:
Issue Dt:
05/22/2007
Application #:
10908433
Filing Dt:
05/11/2005
Publication #:
Pub Dt:
11/16/2006
Title:
SELF-ALIGNING DOCKING SYSTEM FOR ELECTRONIC DEVICE TESTING
19
Patent #:
Issue Dt:
09/13/2005
Application #:
10931654
Filing Dt:
08/31/2004
Title:
MULTICHIP MODULE PACKAGE AND FABRICATION METHOD
20
Patent #:
Issue Dt:
06/20/2006
Application #:
10931919
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
03/02/2006
Title:
STACKED DIE PACKAGING AND FABRICATION METHOD
21
Patent #:
Issue Dt:
11/29/2005
Application #:
10934129
Filing Dt:
09/02/2004
Title:
AIR POCKET RESISTANT SEMICONDUCTOR PACKAGE SYSTEM
22
Patent #:
Issue Dt:
01/30/2007
Application #:
11121847
Filing Dt:
05/03/2005
Publication #:
Pub Dt:
11/09/2006
Title:
SEMICONDUCTOR PACKAGE WITH SELECTIVE UNDERFILL AND FABRICATION METHOD THERFOR
23
Patent #:
Issue Dt:
11/20/2007
Application #:
11126052
Filing Dt:
05/09/2005
Publication #:
Pub Dt:
11/09/2006
Title:
LARGE DIE PACKAGE AND METHOD FOR THE FABRICATION THEREOF
24
Patent #:
Issue Dt:
05/01/2007
Application #:
11145246
Filing Dt:
06/03/2005
Publication #:
Pub Dt:
10/06/2005
Title:
SELF-COPLANARITY BUMPING SHAPE FOR FLIP CHIP
25
Patent #:
Issue Dt:
08/05/2008
Application #:
11145247
Filing Dt:
06/03/2005
Publication #:
Pub Dt:
10/06/2005
Title:
Self-coplanarity bumping shape for flip chip
26
Patent #:
Issue Dt:
11/04/2008
Application #:
11160837
Filing Dt:
07/12/2005
Publication #:
Pub Dt:
03/02/2006
Title:
MULTICHIP MODULE PACKAGE AND FABRICATION METHOD
27
Patent #:
Issue Dt:
09/18/2007
Application #:
11162637
Filing Dt:
09/16/2005
Publication #:
Pub Dt:
08/24/2006
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
28
Patent #:
Issue Dt:
09/25/2007
Application #:
11162682
Filing Dt:
09/19/2005
Publication #:
Pub Dt:
03/22/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ADHESIVE RESTRAINT
29
Patent #:
Issue Dt:
04/14/2009
Application #:
11163559
Filing Dt:
10/22/2005
Publication #:
Pub Dt:
05/18/2006
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SLUG
30
Patent #:
Issue Dt:
06/17/2008
Application #:
11163770
Filing Dt:
10/29/2005
Publication #:
Pub Dt:
08/24/2006
Title:
PACKAGE STACKING LEAD FRAME SYSTEM
31
Patent #:
Issue Dt:
10/28/2008
Application #:
11164087
Filing Dt:
11/09/2005
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING RIBBON BOND INTERCONNECT
32
Patent #:
Issue Dt:
10/09/2007
Application #:
11164160
Filing Dt:
11/12/2005
Publication #:
Pub Dt:
08/17/2006
Title:
STACKED DIE PACKAGE SYSTEM
33
Patent #:
Issue Dt:
09/02/2008
Application #:
11164321
Filing Dt:
11/17/2005
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRATED CIRCUIT SUPPORT
34
Patent #:
Issue Dt:
11/28/2006
Application #:
11215090
Filing Dt:
08/29/2005
Publication #:
Pub Dt:
03/02/2006
Title:
AIR POCKET RESISTANT SEMICONDUCTOR PACKAGE
35
Patent #:
Issue Dt:
05/27/2008
Application #:
11234528
Filing Dt:
09/22/2005
Publication #:
Pub Dt:
04/12/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
36
Patent #:
Issue Dt:
10/09/2007
Application #:
11257894
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
08/10/2006
Title:
NESTED INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
37
Patent #:
Issue Dt:
05/06/2008
Application #:
11276940
Filing Dt:
03/17/2006
Publication #:
Pub Dt:
09/20/2007
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
38
Patent #:
Issue Dt:
10/30/2007
Application #:
11276941
Filing Dt:
03/17/2006
Publication #:
Pub Dt:
09/20/2007
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
39
Patent #:
Issue Dt:
03/10/2009
Application #:
11276946
Filing Dt:
03/17/2006
Publication #:
Pub Dt:
09/20/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
40
Patent #:
Issue Dt:
04/21/2009
Application #:
11276948
Filing Dt:
03/17/2006
Publication #:
Pub Dt:
09/20/2007
Title:
MULTICHIP PACKAGE SYSTEM
41
Patent #:
Issue Dt:
04/21/2009
Application #:
11278343
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD CLAMP LINE CRITICAL AREA HAVING WIDENED CONDUCTIVE TRACES
42
Patent #:
Issue Dt:
10/28/2008
Application #:
11278421
Filing Dt:
04/01/2006
Publication #:
Pub Dt:
10/04/2007
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONNECTION PROTECTION
43
Patent #:
Issue Dt:
11/04/2008
Application #:
11306148
Filing Dt:
12/16/2005
Publication #:
Pub Dt:
09/07/2006
Title:
STACKED INTEGRATED CIRCUITS PACKAGE SYSTEM WITH DENSE ROUTABILITY AND HIGH THERMAL CONDUCTIVITY
44
Patent #:
Issue Dt:
11/25/2008
Application #:
11306627
Filing Dt:
01/04/2006
Publication #:
Pub Dt:
07/12/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING STACKED DIE
45
Patent #:
Issue Dt:
04/29/2008
Application #:
11306628
Filing Dt:
01/04/2006
Publication #:
Pub Dt:
10/05/2006
Title:
METHOD OF MOUNTING AN INTEGRATED CIRCUIT PACKAGE IN AN ENCAPSULANT CAVITY
46
Patent #:
Issue Dt:
04/29/2008
Application #:
11306693
Filing Dt:
01/06/2006
Publication #:
Pub Dt:
07/12/2007
Title:
OVERHANG INTEGRATED CIRCUIT PACKAGE SYSTEM
47
Patent #:
Issue Dt:
11/04/2008
Application #:
11306805
Filing Dt:
01/11/2006
Publication #:
Pub Dt:
05/17/2007
Title:
STACKED INTEGRATED CIRCUIT LEADFRAME PACKAGE SYSTEM
48
Patent #:
Issue Dt:
01/29/2008
Application #:
11306808
Filing Dt:
01/11/2006
Publication #:
Pub Dt:
07/12/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PEDESTAL STRUCTURE
49
Patent #:
Issue Dt:
11/20/2007
Application #:
11307314
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
05/17/2007
Title:
MICRO CHIP-SCALE-PACKAGE SYSTEM
50
Patent #:
Issue Dt:
02/03/2009
Application #:
11307315
Filing Dt:
01/31/2006
Publication #:
Pub Dt:
08/02/2007
Title:
INTEGRATED CIRCUIT UNDERFILL PACKAGE SYSTEM
51
Patent #:
Issue Dt:
12/18/2007
Application #:
11307350
Filing Dt:
02/01/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SINK
52
Patent #:
Issue Dt:
07/31/2007
Application #:
11307384
Filing Dt:
02/04/2006
Publication #:
Pub Dt:
05/17/2007
Title:
ETCHED LEADFRAME FLIPCHIP PACKAGE SYSTEM
53
Patent #:
Issue Dt:
06/02/2009
Application #:
11307386
Filing Dt:
02/04/2006
Publication #:
Pub Dt:
08/09/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER SUPPORT
54
Patent #:
Issue Dt:
10/14/2008
Application #:
11307615
Filing Dt:
02/14/2006
Publication #:
Pub Dt:
08/16/2007
Title:
METHOD OF FABRICATING A 3-D PACKAGE STACKING SYSTEM
55
Patent #:
Issue Dt:
07/15/2008
Application #:
11307683
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
08/16/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SINK
56
Patent #:
Issue Dt:
11/20/2007
Application #:
11307722
Filing Dt:
02/17/2006
Publication #:
Pub Dt:
08/23/2007
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH RECESSED SPACER
57
Patent #:
Issue Dt:
11/20/2007
Application #:
11307861
Filing Dt:
02/25/2006
Publication #:
Pub Dt:
08/30/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE STACKING
58
Patent #:
Issue Dt:
06/10/2008
Application #:
11307862
Filing Dt:
02/25/2006
Publication #:
Pub Dt:
08/30/2007
Title:
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONNECT INTERFACE
59
Patent #:
Issue Dt:
12/25/2007
Application #:
11331564
Filing Dt:
01/12/2006
Publication #:
Pub Dt:
07/12/2007
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
60
Patent #:
Issue Dt:
11/11/2008
Application #:
11338328
Filing Dt:
01/23/2006
Publication #:
Pub Dt:
07/26/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE MOLDING
61
Patent #:
Issue Dt:
04/21/2009
Application #:
11354694
Filing Dt:
02/14/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT DISSIPATION ENCLOSURE
62
Patent #:
Issue Dt:
05/13/2008
Application #:
11372755
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
08/03/2006
Title:
FLIP CHIP INTERCONNECTION PAD LAYOUT
63
Patent #:
Issue Dt:
10/20/2009
Application #:
11372989
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
07/27/2006
Title:
FLIP CHIP INTERCONNECTION PAD LAYOUT
64
Patent #:
Issue Dt:
09/02/2008
Application #:
11374377
Filing Dt:
03/13/2006
Publication #:
Pub Dt:
08/24/2006
Title:
DBG SYSTEM AND METHOD WITH ADHESIVE LAYER SEVERING
65
Patent #:
Issue Dt:
09/02/2008
Application #:
11379097
Filing Dt:
04/18/2006
Publication #:
Pub Dt:
10/18/2007
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
66
Patent #:
Issue Dt:
03/03/2009
Application #:
11379106
Filing Dt:
04/18/2006
Publication #:
Pub Dt:
10/18/2007
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
67
Patent #:
Issue Dt:
04/08/2008
Application #:
11380596
Filing Dt:
04/27/2006
Publication #:
Pub Dt:
11/02/2006
Title:
METHOD OF FABRICATING A STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
68
Patent #:
Issue Dt:
03/03/2009
Application #:
11381726
Filing Dt:
05/04/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT LEADLESS PACKAGE SYSTEM
69
Patent #:
Issue Dt:
10/28/2008
Application #:
11381734
Filing Dt:
05/04/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DOWNSET LEAD
70
Patent #:
Issue Dt:
02/24/2009
Application #:
11381827
Filing Dt:
05/05/2006
Publication #:
Pub Dt:
11/30/2006
Title:
OPTICAL DIE-DOWN QUAD FLAT NON-LEADED PACKAGE
71
Patent #:
Issue Dt:
01/27/2009
Application #:
11383038
Filing Dt:
05/12/2006
Publication #:
Pub Dt:
11/15/2007
Title:
INTEGRATED CIRCUIT ENCAPSULATION SYSTEM WITH VENT
72
Patent #:
Issue Dt:
04/14/2009
Application #:
11383403
Filing Dt:
05/15/2006
Publication #:
Pub Dt:
05/17/2007
Title:
OFFSET INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM
73
Patent #:
Issue Dt:
09/30/2008
Application #:
11394635
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
11/02/2006
Title:
SEMICONDUCTOR PACKAGE INCLUDING SECOND SUBSTRATE AND HAVING EXPOSED SUBSTRATE SURFACES ON UPPER AND LOWER SIDES
74
Patent #:
Issue Dt:
05/13/2008
Application #:
11395529
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
10/05/2006
Title:
SEMICONDUCTOR STACKED PACKAGE ASSEMBLY HAVING EXPOSED SUBSTRATE SURFACES ON UPPER AND LOWER SIDES
75
Patent #:
Issue Dt:
09/30/2008
Application #:
11397027
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
10/05/2006
Title:
SEMICONDUCTOR ASSEMBLY INCLUDING CHIP SCALE PACKAGE AND SECOND SUBSTRATE WITH EXPOSED SURFACES ON UPPER AND LOWER SIDES
76
Patent #:
Issue Dt:
05/05/2009
Application #:
11420873
Filing Dt:
05/30/2006
Publication #:
Pub Dt:
11/30/2006
Title:
STACKED SEMICONDUCTOR PACKAGE ASSEMBLY HAVING HOLLOWED SUBSTRATE
77
Patent #:
Issue Dt:
07/01/2008
Application #:
11424480
Filing Dt:
06/15/2006
Publication #:
Pub Dt:
12/21/2006
Title:
MODULE HAVING STACKED CHIP SCALE SEMICONDUCTOR PACKAGES
78
Patent #:
Issue Dt:
07/15/2008
Application #:
11459317
Filing Dt:
07/21/2006
Publication #:
Pub Dt:
05/17/2007
Title:
PRE-MOLDED LEADFRAME AND METHOD THEREFOR
79
Patent #:
Issue Dt:
02/24/2009
Application #:
11459557
Filing Dt:
07/24/2006
Publication #:
Pub Dt:
01/24/2008
Title:
LEADED STACKED PACKAGES HAVING ELEVATED DIE PADDLE
80
Patent #:
Issue Dt:
05/19/2009
Application #:
11462320
Filing Dt:
08/03/2006
Publication #:
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM
81
Patent #:
Issue Dt:
10/21/2008
Application #:
11462537
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
82
Patent #:
Issue Dt:
03/16/2010
Application #:
11464631
Filing Dt:
08/15/2006
Publication #:
Pub Dt:
12/28/2006
Title:
SPACER DIE STRUCTURE AND METHOD FOR ATTACHING
83
Patent #:
Issue Dt:
06/02/2009
Application #:
11530802
Filing Dt:
09/11/2006
Publication #:
Pub Dt:
03/22/2007
Title:
WIRE SWEEP RESISTANT SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR
84
Patent #:
Issue Dt:
01/20/2009
Application #:
11558413
Filing Dt:
11/09/2006
Publication #:
Pub Dt:
05/15/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SINK
85
Patent #:
Issue Dt:
04/01/2008
Application #:
11562957
Filing Dt:
11/22/2006
Publication #:
Pub Dt:
04/26/2007
Title:
SEMICONDUCTOR PACKAGE WITH CONTROLLED SOLDER BUMP WETTING
86
Patent #:
Issue Dt:
01/20/2009
Application #:
11610304
Filing Dt:
12/13/2006
Publication #:
Pub Dt:
06/19/2008
Title:
INTEGRATED CIRCUIT PACKAGE WITH ELEVATED EDGE LEADFRAME
87
Patent #:
Issue Dt:
05/26/2009
Application #:
11615922
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD OF FABRICATING A SHIELDED STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
88
Patent #:
Issue Dt:
04/14/2009
Application #:
11671684
Filing Dt:
02/06/2007
Publication #:
Pub Dt:
08/07/2008
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
89
Patent #:
Issue Dt:
04/14/2009
Application #:
11689645
Filing Dt:
03/22/2007
Publication #:
Pub Dt:
09/25/2008
Title:
LEADFRAME DESIGN FOR QFN PACKAGE WITH TOP TERMINAL LEADS
90
Patent #:
Issue Dt:
09/30/2008
Application #:
11690703
Filing Dt:
03/23/2007
Publication #:
Pub Dt:
07/12/2007
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
91
Patent #:
Issue Dt:
08/19/2008
Application #:
11766095
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
10/18/2007
Title:
ETCHED LEADFRAME FLIPCHIP PACKAGE SYSTEM
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12005499
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Title:
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93
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Title:
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94
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03/14/2012
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Pub Dt:
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Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
95
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13566287
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96
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09/09/2013
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97
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10/25/2013
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98
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100
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Publication #:
Pub Dt:
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Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
Assignor
1
Exec Dt:
05/03/2019
Assignees
1
46429 LANDING PARKWAY
FREMONT, CALIFORNIA 94538
2
5 YISHUN STREET 23
SINGAPORE, SINGAPORE 768442
Correspondence name and address
PATENT LAW GROUP: ATKINS AND ASSOCIATES
123 W. CHANDLER HEIGHTS ROAD, #12535
CHANDLER, AZ 85248

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