Total properties:
84
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09092732
|
Filing Dt:
|
06/05/1998
|
Title:
|
METHOD AND SYSTEM FOR STATE-DEPENDENT ADMISSION CONTROL AND ROUTING OF MULTI-RATE CIRCUIT-SWITCHED TRAFFIC
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2000
|
Application #:
|
09106308
|
Filing Dt:
|
06/29/1998
|
Title:
|
SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY IN A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2000
|
Application #:
|
09143096
|
Filing Dt:
|
08/28/1998
|
Title:
|
METHOD FOR MANUFACTURING A CAPACITOR OF A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09210456
|
Filing Dt:
|
12/14/1998
|
Title:
|
METHOD AND APPARATUS FOR CONNECTING NETWORK SEGMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2001
|
Application #:
|
09290399
|
Filing Dt:
|
04/13/1999
|
Title:
|
PLURAL MEMORY BANKS MEMORY DEVICE THAT CAN SIMULTANEOUSLY READ
FROM OR WRITE TO ALL OF THE MEMORY BANKS DURING TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2004
|
Application #:
|
09312486
|
Filing Dt:
|
05/17/1999
|
Title:
|
SYSTEM FOR TRANSMITTING MESSAGES TO IMPROVED STATIONS, AND CORRESPONDING PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2000
|
Application #:
|
09317113
|
Filing Dt:
|
05/24/1999
|
Title:
|
SENSE AMPLIFIER DRIVING DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2001
|
Application #:
|
09324919
|
Filing Dt:
|
06/03/1999
|
Title:
|
TRENCH ISOLATION METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
09357126
|
Filing Dt:
|
07/20/1999
|
Title:
|
TUNGSTEN LAYER FORMATION METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09359243
|
Filing Dt:
|
07/22/1999
|
Title:
|
WIRING STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2001
|
Application #:
|
09397136
|
Filing Dt:
|
09/16/1999
|
Title:
|
METHOD FOR FABRICATING CONTACT PAD FOR SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2002
|
Application #:
|
09427272
|
Filing Dt:
|
10/26/1999
|
Title:
|
ANALOG MIXED DIGITAL DLL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2001
|
Application #:
|
09451852
|
Filing Dt:
|
12/01/1999
|
Title:
|
A SEMICONDUCTOR MEMORY ARRAY LAYOUT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2001
|
Application #:
|
09461718
|
Filing Dt:
|
12/16/1999
|
Title:
|
APPARATUS AND METHOD FOR PERFORMING DATA READ OPERATION IN DDR SDRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2002
|
Application #:
|
09609927
|
Filing Dt:
|
07/05/2000
|
Title:
|
Tungsten layer formation method for semiconductor device and semiconductor device using the same
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2002
|
Application #:
|
09653913
|
Filing Dt:
|
09/01/2000
|
Title:
|
ADAPTIVE LAYERED CODING FOR VOICE OVER WIRELESS IP APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2002
|
Application #:
|
09710958
|
Filing Dt:
|
11/14/2000
|
Title:
|
Method for fabricating a semiconductor memory device
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
09726998
|
Filing Dt:
|
11/30/2000
|
Publication #:
|
|
Pub Dt:
|
01/24/2002
| | | | |
Title:
|
INTERFACE CIRCUIT FOR USING IN HIGH-SPEED SEMICONDUCTOR DEVICE AND INTERFACING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09742816
|
Filing Dt:
|
12/19/2000
|
Publication #:
|
|
Pub Dt:
|
09/13/2001
| | | | |
Title:
|
DELAY LOCKED LOOP FOR USE IN SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2002
|
Application #:
|
09747886
|
Filing Dt:
|
12/22/2000
|
Publication #:
|
|
Pub Dt:
|
08/16/2001
| | | | |
Title:
|
DELAY LOCKED LOOP WITH DELAY CONTROL UNIT FOR NOISE ELIMINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2003
|
Application #:
|
09750017
|
Filing Dt:
|
12/29/2000
|
Publication #:
|
|
Pub Dt:
|
09/20/2001
| | | | |
Title:
|
COLUMN TRANSISTOR FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2002
|
Application #:
|
09750228
|
Filing Dt:
|
12/29/2000
|
Publication #:
|
|
Pub Dt:
|
08/23/2001
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING A PLURALITY OF BANKS SHARING A COLUMN CONTROL UNIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2005
|
Application #:
|
09773073
|
Filing Dt:
|
01/31/2001
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
Title:
|
METHOD AND SYSTEMS FOR BANDWIDTH MANAGEMENT IN PACKET DATA NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2002
|
Application #:
|
09814414
|
Filing Dt:
|
03/21/2001
|
Publication #:
|
|
Pub Dt:
|
09/27/2001
| | | | |
Title:
|
SENSE AMPLIFIER CIRCUIT FOR USE IN A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2003
|
Application #:
|
09883188
|
Filing Dt:
|
06/19/2001
|
Publication #:
|
|
Pub Dt:
|
01/24/2002
| | | | |
Title:
|
METHOD FOR MAKING HIGH K DIELECTRIC GATE FOR SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
09948201
|
Filing Dt:
|
09/06/2001
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
Title:
|
TRANSFER CIRCUIT OF SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
09982841
|
Filing Dt:
|
10/18/2001
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
| | | | |
Title:
|
METHOD OF FORMING DUAL-METAL GATES IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2003
|
Application #:
|
09996240
|
Filing Dt:
|
11/28/2001
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING CHANGEABLE SPARE MEMORY ADDRESS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10006303
|
Filing Dt:
|
12/06/2001
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
Title:
|
WIRING STRUCTURE OF SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
10028704
|
Filing Dt:
|
12/28/2001
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
Title:
|
CIRCUIT FOR GENERATING INTERNAL ADDRESS IN SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
10036156
|
Filing Dt:
|
12/26/2001
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
Title:
|
METHOD OF FORMING A METAL GATE IN A SEMICONDUCTOR DEVICE USING ATOMIC LAYER DEPOSITION PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2003
|
Application #:
|
10141881
|
Filing Dt:
|
05/10/2002
|
Publication #:
|
|
Pub Dt:
|
11/14/2002
| | | | |
Title:
|
CAPACITOR OF AN INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2003
|
Application #:
|
10151877
|
Filing Dt:
|
05/22/2002
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
MEMORY SYSTEM CAPABLE OF INCREASING UTILIZATION EFFICIENCY OF SEMICONDUCTOR MEMORY DEVICE AND METHOD OF REFRESHING THE SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2005
|
Application #:
|
10160646
|
Filing Dt:
|
05/31/2002
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
Title:
|
METHODS OF FORMING IINTEGRATED CIRCUIT DEVICES HAVING A METAL-INSULATOR-METAL (MIM) CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
10177950
|
Filing Dt:
|
06/21/2002
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
METHOD OF FORMING CONTACT HOLES IN SEMICONDUCTOR DEVICES AND METHOD OF FORMING CAPACITORS USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2004
|
Application #:
|
10222573
|
Filing Dt:
|
08/15/2002
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING SHARED ROW SELECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2004
|
Application #:
|
10260624
|
Filing Dt:
|
10/01/2002
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
Title:
|
DAMASCENE CAPACITOR FORMED IN METAL INTERCONNECTION LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2006
|
Application #:
|
10268914
|
Filing Dt:
|
10/11/2002
|
Title:
|
METHOD AND APPARATUS FOR OPTIMIZING PERFORMANCE AND BATTERY LIFE OF ELECTRONIC DEVICES BASED ON SYSTEM AND APPLICATION PARAMETERS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
10298564
|
Filing Dt:
|
11/19/2002
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
Title:
|
GATE STRUCTURE WITH HIGH K DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10426988
|
Filing Dt:
|
04/30/2003
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
ETCHING METHOD IN A SEMICONDUCTOR PROCESSING AND ETCHING SYSTEM FOR PERFORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
10749892
|
Filing Dt:
|
12/31/2003
|
Publication #:
|
|
Pub Dt:
|
12/02/2004
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH MODIFIED GLOBAL INPUT/OUTPUT SCHEME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
10768911
|
Filing Dt:
|
01/30/2004
|
Publication #:
|
|
Pub Dt:
|
08/04/2005
| | | | |
Title:
|
METHOD AND SYSTEM FOR DESIGN AND ROUTING IN TRANSPARENT OPTICAL NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
10798484
|
Filing Dt:
|
03/12/2004
|
Publication #:
|
|
Pub Dt:
|
09/16/2004
| | | | |
Title:
|
DUTY CYCLE CORRECTION CIRCUIT OF DELAY LOCKED LOOP AND DELAY LOCKED LOOP HAVING THE DUTY CYCLE CORRECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2008
|
Application #:
|
10799877
|
Filing Dt:
|
03/15/2004
|
Publication #:
|
|
Pub Dt:
|
09/09/2004
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10819385
|
Filing Dt:
|
04/05/2004
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
FLASH MEMORY DEVICE CAPABLE OF PREVENTING PROGRAM DISTURBANCE ACCORDING TO PARTIAL PROGRAMMING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
10848913
|
Filing Dt:
|
05/18/2004
|
Publication #:
|
|
Pub Dt:
|
03/03/2005
| | | | |
Title:
|
DATA DRIVING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10860947
|
Filing Dt:
|
06/04/2004
|
Publication #:
|
|
Pub Dt:
|
12/09/2004
| | | | |
Title:
|
DELAY STAGE INSENSITIVE TO OPERATING VOLTAGE AND DELAY CIRCUIT INCLUDING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10877037
|
Filing Dt:
|
06/24/2004
|
Publication #:
|
|
Pub Dt:
|
05/05/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE HAVING ROW PATH CONTROL CIRCUIT AND OPERATING METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
10879650
|
Filing Dt:
|
06/28/2004
|
Publication #:
|
|
Pub Dt:
|
08/18/2005
| | | | |
Title:
|
ON DIE TERMINATION MODE TRANSFER CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE AND ITS METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10889194
|
Filing Dt:
|
07/12/2004
|
Publication #:
|
|
Pub Dt:
|
01/13/2005
| | | | |
Title:
|
REDUNDANCY CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE HAVING A MULTIBLOCK STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
10919370
|
Filing Dt:
|
08/17/2004
|
Publication #:
|
|
Pub Dt:
|
06/16/2005
| | | | |
Title:
|
INPUT SIGNAL RECEIVING DEVICE OF SEMICONDUCTOR MEMORY UNIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2007
|
Application #:
|
10937519
|
Filing Dt:
|
09/09/2004
|
Publication #:
|
|
Pub Dt:
|
06/09/2005
| | | | |
Title:
|
PACKET ADDRESSING PROGRAMMABLE DUAL PORT MEMORY DEVICES AND RELATED METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10940808
|
Filing Dt:
|
08/24/2004
|
Publication #:
|
|
Pub Dt:
|
06/16/2005
| | | | |
Title:
|
MULTI-LEVEL HIGH VOLTAGE GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
10942367
|
Filing Dt:
|
09/15/2004
|
Publication #:
|
|
Pub Dt:
|
03/17/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICES HAVING A POCKET LINE AND METHODS OF FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
10976626
|
Filing Dt:
|
10/29/2004
|
Publication #:
|
|
Pub Dt:
|
07/07/2005
| | | | |
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WITH SCALABLE TWO TRANSISTOR MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2006
|
Application #:
|
10991042
|
Filing Dt:
|
11/16/2004
|
Publication #:
|
|
Pub Dt:
|
05/26/2005
| | | | |
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING SENSE AMPLIFIER WITH INCREASED SPEED
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
10992963
|
Filing Dt:
|
11/18/2004
|
Publication #:
|
|
Pub Dt:
|
08/04/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH CYLINDRICAL STORAGE ELECTRODE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
11004806
|
Filing Dt:
|
12/07/2004
|
Publication #:
|
|
Pub Dt:
|
03/09/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2008
|
Application #:
|
11020277
|
Filing Dt:
|
12/27/2004
|
Publication #:
|
|
Pub Dt:
|
06/30/2005
| | | | |
Title:
|
METHOD OF FORMING AN INTERCONNECTION LINE IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2007
|
Application #:
|
11025765
|
Filing Dt:
|
12/28/2004
|
Publication #:
|
|
Pub Dt:
|
03/23/2006
| | | | |
Title:
|
HIGH VOLTAGE GENERATOR CIRCUIT WITH RIPPLE STABILIZATION FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
11026970
|
Filing Dt:
|
12/30/2004
|
Title:
|
DELAY LOCKED LOOP AND LOCKING METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
11118229
|
Filing Dt:
|
04/28/2005
|
Publication #:
|
|
Pub Dt:
|
02/09/2006
| | | | |
Title:
|
FIXED OFFSET DIGITAL-TO-ANALOG CONVERSION DEVICE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
11147629
|
Filing Dt:
|
06/08/2005
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
DUTY CYCLE CORRECTION CIRCUIT FOR USE IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
11166620
|
Filing Dt:
|
06/24/2005
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
CIRCUIT AND METHOD FOR GENERATING WORDLINE VOLTAGE IN NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11204660
|
Filing Dt:
|
08/15/2005
|
Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
METHOD FOR FORMING STORAGE NODE OF CAPACITOR IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11414353
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
07/26/2007
| | | | |
Title:
|
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2009
|
Application #:
|
11450096
|
Filing Dt:
|
06/09/2006
|
Publication #:
|
|
Pub Dt:
|
03/15/2007
| | | | |
Title:
|
TRANSISTOR OF SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
11476261
|
Filing Dt:
|
06/27/2006
|
Publication #:
|
|
Pub Dt:
|
06/28/2007
| | | | |
Title:
|
FIVE CHANNEL FIN TRANSISTOR AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2008
|
Application #:
|
11478527
|
Filing Dt:
|
06/30/2006
|
Publication #:
|
|
Pub Dt:
|
03/29/2007
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE SHARING A DATA LINE SENSE AMPLIFIER AND A WRITE DRIVER IN ORDER TO REDUCE A CHIP SIZE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11582638
|
Filing Dt:
|
10/17/2006
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2010
|
Application #:
|
12168823
|
Filing Dt:
|
07/07/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
METHOD FOR FORMING STORAGE NODE OF CAPACITOR IN SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2010
|
Application #:
|
12270286
|
Filing Dt:
|
11/13/2008
|
Publication #:
|
|
Pub Dt:
|
03/19/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICES HAVING A CONTACT PLUG AND FABRICATION METHODS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12323391
|
Filing Dt:
|
11/25/2008
|
Publication #:
|
|
Pub Dt:
|
07/09/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH RECESS AND FIN STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2010
|
Application #:
|
12331830
|
Filing Dt:
|
12/10/2008
|
Publication #:
|
|
Pub Dt:
|
04/09/2009
| | | | |
Title:
|
METHOD FOR MANUFACTURING A TRANSISTOR OF A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2010
|
Application #:
|
12354158
|
Filing Dt:
|
01/15/2009
|
Publication #:
|
|
Pub Dt:
|
05/14/2009
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2013
|
Application #:
|
13335207
|
Filing Dt:
|
12/22/2011
|
Title:
|
DATA BUS LINE CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2013
|
Application #:
|
13360194
|
Filing Dt:
|
01/27/2012
|
Publication #:
|
|
Pub Dt:
|
05/17/2012
| | | | |
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH RECESS AND FIN STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13369988
|
Filing Dt:
|
02/09/2012
|
Title:
|
CLOCK CONTROL DEVICE FOR TOGGLING AN INTERNAL CLOCK OF A SYNCHRONOUS DRAM FOR REDUCED POWER CONSUMPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2014
|
Application #:
|
13405703
|
Filing Dt:
|
02/27/2012
|
Title:
|
DUTY CYCLE CORRECTION CIRCUIT OF DELAY LOCKED LOOP AND DELAY LOCKED LOOP HAVING THE DUTY CYCLE CORRECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13448520
|
Filing Dt:
|
04/17/2012
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
DYNAMIC TRAFFIC REARRANGEMENT AND RESTORATION FOR MPLS NETWORKS WITH DIFFERENTIATED SERVICES CAPABILITIES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2013
|
Application #:
|
13538130
|
Filing Dt:
|
06/29/2012
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2014
|
Application #:
|
13568920
|
Filing Dt:
|
08/07/2012
|
Title:
|
METHOD OF FORMING A CONTACT PLUG FOR A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2013
|
Application #:
|
13586272
|
Filing Dt:
|
08/15/2012
|
Title:
|
METHOD FOR MANUFACTURING A TRANSISTOR OF A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2020
|
Application #:
|
14045419
|
Filing Dt:
|
12/07/2017
|
Publication #:
|
|
Pub Dt:
|
02/06/2014
| | | | |
Title:
|
METHOD FOR MANUFACTURING A TRANSISTOR OF A SEMICONDUCTOR MEMORY DEVICE
|
|