USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Assignments on the Web > Patent Query

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	054633/0001			Pages:	1245
		Recorded:	11/02/2020
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 8468
Page 16 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85

Patent #:	7334320	Issue Dt:	02/26/2008	Application #:	11004846	Filing Dt:	12/07/2004
Publication #:	US20050121741	Pub Dt:	06/09/2005
Title:	METHOD OF MAKING AN ELECTRONIC FUSE WITH IMPROVED ESD TOLERANCE

Patent #:	7105399	Issue Dt:	09/12/2006	Application #:	11004951	Filing Dt:	12/07/2004
Title:	SELECTIVE EPITAXIAL GROWTH FOR TUNABLE CHANNEL THICKNESS

Patent #:	7340658	Issue Dt:	03/04/2008	Application #:	11008877	Filing Dt:	12/10/2004
Publication #:	US20050204232	Pub Dt:	09/15/2005
Title:	TECHNIQUE FOR COMBINING SCAN TEST AND MEMORY BUILT-IN SELF TEST

Patent #:	7322017	Issue Dt:	01/22/2008	Application #:	11011245	Filing Dt:	12/14/2004
Publication #:	US20060129958	Pub Dt:	06/15/2006
Title:	METHOD FOR VERIFICATION USING REACHABILITY OVERAPPROXIMATION

Patent #:	7102156	Issue Dt:	09/05/2006	Application #:	11021681	Filing Dt:	12/23/2004
Title:	MEMORY ELEMENTS USING ORGANIC ACTIVE LAYER

Patent #:	7562267	Issue Dt:	07/14/2009	Application #:	11023677	Filing Dt:	12/28/2004
Publication #:	US20060156091	Pub Dt:	07/13/2006
Title:	METHODS AND APPARATUS FOR TESTING A MEMORY

Patent #:	7609493	Issue Dt:	10/27/2009	Application #:	11027980	Filing Dt:	01/03/2005
Title:	ESD PROTECTION CIRCUIT AND METHOD FOR LOWERING CAPACITANCE OF THE ESD PROTECTION CIRCUIT

Patent #:	7404113	Issue Dt:	07/22/2008	Application #:	11031138	Filing Dt:	01/07/2005
Publication #:	US20050122801	Pub Dt:	06/09/2005
Title:	FLEXIBLE ROW REDUNDANCY SYSTEM

Patent #:	7598516	Issue Dt:	10/06/2009	Application #:	11031168	Filing Dt:	01/07/2005
Publication #:	US20060151844	Pub Dt:	07/13/2006
Title:	SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETS

Patent #:	7229934	Issue Dt:	06/12/2007	Application #:	11031418	Filing Dt:	01/07/2005
Publication #:	US20060084282	Pub Dt:	04/20/2006
Title:	POROUS ORGANOSILICATES WITH IMPROVED MECHANICAL PROPERTIES

Patent #:	7613266	Issue Dt:	11/03/2009	Application #:	11033641	Filing Dt:	01/13/2005
Title:	BINARY CONTROLLED PHASE SELECTOR WITH OUTPUT DUTY CYCLE CORRECTION

Patent #:	7154309	Issue Dt:	12/26/2006	Application #:	11033754	Filing Dt:	01/13/2005
Title:	DUAL-MODE OUTPUT DRIVER CONFIGURED FOR OUTPUTTING A SIGNAL ACCORDING TO EITHER A SELECTED HIGH VOLTAGE/LOW SPEED MODE OR A LOW VOLTAGE/HIGH SPEED MODE

Patent #:	7256627	Issue Dt:	08/14/2007	Application #:	11033755	Filing Dt:	01/13/2005
Title:	ALIGNMENT OF LOCAL TRANSMIT CLOCK TO SYNCHRONOUS DATA TRANSFER CLOCK HAVING PROGRAMMABLE TRANSFER RATE

Patent #:	7135884	Issue Dt:	11/14/2006	Application #:	11033757	Filing Dt:	01/13/2005
Title:	VOLTAGE MODE TRANSCEIVER HAVING PROGRAMMABLE VOLTAGE SWING AND EXTERNAL REFERENCE-BASED CALIBRATION

Patent #:	7388277	Issue Dt:	06/17/2008	Application #:	11033926	Filing Dt:	01/12/2005
Publication #:	US20050121711	Pub Dt:	06/09/2005
Title:	CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS

Patent #:	7371461	Issue Dt:	05/13/2008	Application #:	11034480	Filing Dt:	01/13/2005
Publication #:	US20060154086	Pub Dt:	07/13/2006
Title:	MULTILAYER HARDMASK SCHEME FOR DAMAGE-FREE DUAL DAMASCENE PROCESSING OF SICOH DIELECTRICS

Patent #:	7219713	Issue Dt:	05/22/2007	Application #:	11037913	Filing Dt:	01/18/2005
Publication #:	US20060157223	Pub Dt:	07/20/2006
Title:	HETEROGENEOUS THERMAL INTERFACE FOR COOLING

Patent #:	7247946	Issue Dt:	07/24/2007	Application #:	11037970	Filing Dt:	01/18/2005
Publication #:	US20060160350	Pub Dt:	07/20/2006
Title:	ON-CHIP CU INTERCONNECTION USING 1 TO 5 NM THICK METAL CAP

Patent #:	7015581	Issue Dt:	03/21/2006	Application #:	11037995	Filing Dt:	01/18/2005
Publication #:	US20050200025	Pub Dt:	09/15/2005
Title:	LOW-K DIELECTRIC MATERIAL SYSTEM FOR IC APPLICATION

Patent #:	7792385	Issue Dt:	09/07/2010	Application #:	11042218	Filing Dt:	01/25/2005
Publication #:	US20060165164	Pub Dt:	07/27/2006
Title:	SCRATCH PAD FOR STORING INTERMEDIATE LOOP FILTER DATA

Patent #:	7033919	Issue Dt:	04/25/2006	Application #:	11042426	Filing Dt:	01/25/2005
Title:	FABRICATION OF DUAL WORK-FUNCTION METAL GATE STRUCTURE FOR COMPLEMENTARY FIELD EFFECT TRANSISTORS

Patent #:	7244976	Issue Dt:	07/17/2007	Application #:	11042866	Filing Dt:	01/25/2005
Publication #:	US20050128812	Pub Dt:	06/16/2005
Title:	EEPROM DEVICE WITH SUBSTRATE HOT-ELECTRON INJECTOR FOR LOW-POWER PROGRAMMING

Patent #:	8698312	Issue Dt:	04/15/2014	Application #:	11046986	Filing Dt:	01/31/2005
Publication #:	US20050242435	Pub Dt:	11/03/2005
Title:	Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging

Patent #:	7314793	Issue Dt:	01/01/2008	Application #:	11047129	Filing Dt:	01/31/2005
Publication #:	US20050266639	Pub Dt:	12/01/2005
Title:	TECHIQUE FOR CONTROLLING MECHANICAL STRESS IN A CHANNEL REGION BY SPACER REMOVAL

Patent #:	7332424	Issue Dt:	02/19/2008	Application #:	11048578	Filing Dt:	02/01/2005
Publication #:	US20060035454	Pub Dt:	02/16/2006
Title:	FLUXLESS SOLDER TRANSFER AND REFLOW PROCESS

Patent #:	7964865	Issue Dt:	06/21/2011	Application #:	11048739	Filing Dt:	02/03/2005
Publication #:	US20050164477	Pub Dt:	07/28/2005
Title:	STRAINED SILICON ON RELAXED SIGE FILM WITH UNIFORM MISFIT DISLOCATION DENSITY

Patent #:	7259458	Issue Dt:	08/21/2007	Application #:	11050572	Filing Dt:	02/03/2005
Publication #:	US20060038283	Pub Dt:	02/23/2006
Title:	INTEGRATED CIRCUIT WITH INCREASED HEAT TRANSFER

Patent #:	7368045	Issue Dt:	05/06/2008	Application #:	11050790	Filing Dt:	01/27/2005
Publication #:	US20060166474	Pub Dt:	07/27/2006
Title:	GATE STACK ENGINEERING BY ELECTROCHEMICAL PROCESSING UTILIZING THROUGH-GATE-DIELECTRIC CURRENT FLOW

Patent #:	7297583	Issue Dt:	11/20/2007	Application #:	11052675	Filing Dt:	02/07/2005
Publication #:	US20050148133	Pub Dt:	07/07/2005
Title:	METHOD OF MAKING STRAINED CHANNEL CMOS TRANSISTORS HAVING LATTICE-MISMATCHED EPITAXIAL EXTENSION AND SOURCE AND DRAIN REGIONS

Patent #:	7091095	Issue Dt:	08/15/2006	Application #:	11053707	Filing Dt:	02/08/2005
Publication #:	US20050156268	Pub Dt:	07/21/2005
Title:	DUAL STRAIN-STATE SIGE LAYERS FOR MICROELECTRONICS

Patent #:	6955931	Issue Dt:	10/18/2005	Application #:	11053863	Filing Dt:	02/10/2005
Title:	METHOD FOR DETECTING SILICIDE ENCROACHMENT OF A GATE ELECTRODE IN A SEMICONDUCTOR ARRANGEMENT

Patent #:	7502986	Issue Dt:	03/10/2009	Application #:	11054575	Filing Dt:	02/09/2005
Publication #:	US20060179394	Pub Dt:	08/10/2006
Title:	METHOD AND APPARATUS FOR COLLECTING FAILURE INFORMATION ON ERROR CORRECTION CODE (ECC) PROTECTED DATA

Patent #:	7341917	Issue Dt:	03/11/2008	Application #:	11055976	Filing Dt:	02/14/2005
Publication #:	US20050158909	Pub Dt:	07/21/2005
Title:	SOLUTION DEPOSITION OF CHALCOGENIDE FILMS CONTAINING TRANSITION METALS

Patent #:	7253431	Issue Dt:	08/07/2007	Application #:	11056456	Filing Dt:	02/11/2005
Publication #:	US20060038179	Pub Dt:	02/23/2006
Title:	METHOD AND APPARATUS FOR SOLUTION PROCESSED DOPING OF CARBON NANOTUBE

Patent #:	7468538	Issue Dt:	12/23/2008	Application #:	11061444	Filing Dt:	02/22/2005
Publication #:	US20050142700	Pub Dt:	06/30/2005
Title:	STRAINED SILICON ON A SIGE ON SOI SUBSTRATE

Patent #:	7209994	Issue Dt:	04/24/2007	Application #:	11066019	Filing Dt:	02/25/2005
Title:	PROCESSOR THAT MAINTAINS VIRTUAL INTERRUPT STATE AND INJECTS VIRTUAL INTERRUPTS INTO VIRTUAL MACHINE GUESTS

Patent #:	7418584	Issue Dt:	08/26/2008	Application #:	11066752	Filing Dt:	02/25/2005
Title:	EXECUTING SYSTEM MANAGEMENT MODE CODE AS VIRTUAL MACHINE GUEST

Patent #:	7169674	Issue Dt:	01/30/2007	Application #:	11066762	Filing Dt:	02/28/2005
Publication #:	US20050156257	Pub Dt:	07/21/2005
Title:	COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) GATE STACK WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRIC AND INTEGRATED DIFFUSION BARRIER

Patent #:	8127098	Issue Dt:	02/28/2012	Application #:	11066873	Filing Dt:	02/25/2005
Title:	VIRTUALIZATION OF REAL MODE EXECUTION

Patent #:	7136296	Issue Dt:	11/14/2006	Application #:	11067797	Filing Dt:	02/28/2005
Publication #:	US20060198181	Pub Dt:	09/07/2006
Title:	STATIC RANDOM ACCESS MEMORY UTILIZING GATED DIODE TECHNOLOGY

Patent #:	7271613	Issue Dt:	09/18/2007	Application #:	11070347	Filing Dt:	03/02/2005
Title:	METHOD AND APPARATUS FOR SHARING AN INPUT/OUTPUT TERMINAL BY MULTIPLE COMPENSATION CIRCUITS

Patent #:	7783455	Issue Dt:	08/24/2010	Application #:	11072140	Filing Dt:	03/04/2005
Title:	METHODS AND SYSTEMS FOR ANALYZING PROCESS EQUIPMENT PROCESSING VARIATIONS USING SENSOR DATA

Patent #:	7544999	Issue Dt:	06/09/2009	Application #:	11072661	Filing Dt:	03/04/2005
Publication #:	US20050151133	Pub Dt:	07/14/2005
Title:	SOI SEMICONDUCTOR DEVICE HAVING ENHANCED, SELF-ALIGNED DIELECTRIC REGIONS IN THE BULK SILICON SUBSTRATE

Patent #:	7694075	Issue Dt:	04/06/2010	Application #:	11076323	Filing Dt:	03/09/2005
Title:	SYSTEM FOR ENABLING AND DISABLING CACHE AND A METHOD THEREOF

Patent #:	7325210	Issue Dt:	01/29/2008	Application #:	11077043	Filing Dt:	03/10/2005
Publication #:	US20060206845	Pub Dt:	09/14/2006
Title:	HYBRID LINEAR WIRE MODEL APPROACH TO TUNING TRANSISTOR WIDTHS OF CIRCUITS WITH RC INTERCONNECT

Patent #:	7529997	Issue Dt:	05/05/2009	Application #:	11079816	Filing Dt:	03/14/2005
Publication #:	US20060203578	Pub Dt:	09/14/2006
Title:	METHOD FOR SELF-CORRECTING CACHE USING LINE DELETE, DATA LOGGING, AND FUSE REPAIR CORRECTION

Patent #:	7233177	Issue Dt:	06/19/2007	Application #:	11098078	Filing Dt:	04/04/2005
Publication #:	US20060220688	Pub Dt:	10/05/2006
Title:	PRECISION TUNING OF A PHASE-CHANGE RESISTIVE ELEMENT

Patent #:	8001363	Issue Dt:	08/16/2011	Application #:	11098153	Filing Dt:	04/04/2005
Publication #:	US20060224872	Pub Dt:	10/05/2006
Title:	SYSTEM FOR SPECULATIVE BRANCH PREDICTION OPTIMIZATION AND METHOD THEREOF

Patent #:	8578134	Issue Dt:	11/05/2013	Application #:	11098273	Filing Dt:	04/04/2005
Title:	System and method for aligning change-of-flow instructions in an instruction buffer

Patent #:	7187598	Issue Dt:	03/06/2007	Application #:	11098873	Filing Dt:	04/05/2005
Title:	DEVICE HAVING AN INTERFACE AND METHOD THEREOF

Patent #:	7332384	Issue Dt:	02/19/2008	Application #:	11099761	Filing Dt:	04/06/2005
Publication #:	US20060006389	Pub Dt:	01/12/2006
Title:	TECHNIQUE FOR FORMING A SUBSTRATE HAVING CRYSTALLINE SEMICONDUCTOR REGIONS OF DIFFERENT CHARACTERISTICS

Patent #:	7427801	Issue Dt:	09/23/2008	Application #:	11102292	Filing Dt:	04/08/2005
Publication #:	US20060226510	Pub Dt:	10/12/2006
Title:	INTEGRATED CIRCUIT TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS

Patent #:	7418605	Issue Dt:	08/26/2008	Application #:	11105814	Filing Dt:	04/13/2005
Title:	A SYSTEM FOR CONTROLLING POWER TO SEQUENTIAL AND COMBINATORIAL LOGIC CIRCUITRY IN AN INTEGRATED CIRCUIT

Patent #:	7897411	Issue Dt:	03/01/2011	Application #:	11105849	Filing Dt:	04/14/2005
Publication #:	US20050260839	Pub Dt:	11/24/2005
Title:	NON-VOLATILE RESISTANCE SWITCHING MEMORY

Patent #:	7636555	Issue Dt:	12/22/2009	Application #:	11106774	Filing Dt:	04/15/2005
Publication #:	US20060116163	Pub Dt:	06/01/2006
Title:	EVENT LIST SPECIFICATION BASED RADIO INTERFACE CONTROL

Patent #:	7956669	Issue Dt:	06/07/2011	Application #:	11106913	Filing Dt:	04/15/2005
Publication #:	US20060232321	Pub Dt:	10/19/2006
Title:	HIGH-DENSITY LOW-POWER DATA RETENTION POWER GATING WITH DOUBLE-GATE DEVICES

Patent #:	7605429	Issue Dt:	10/20/2009	Application #:	11107611	Filing Dt:	04/15/2005
Publication #:	US20060231893	Pub Dt:	10/19/2006
Title:	HYBRID CRYSTAL ORIENTATION CMOS STRUCTURE FOR ADAPTIVE WELL BIASING AND FOR POWER AND PERFORMANCE ENHANCEMENT

Patent #:	7274072	Issue Dt:	09/25/2007	Application #:	11108012	Filing Dt:	04/15/2005
Publication #:	US20060231899	Pub Dt:	10/19/2006
Title:	HYBRID BULK-SOI 6T-SRAM CELL FOR IMPROVED CELL STABILITY AND PERFORMANCE

Patent #:	7180136	Issue Dt:	02/20/2007	Application #:	11111409	Filing Dt:	04/21/2005
Publication #:	US20050184341	Pub Dt:	08/25/2005
Title:	BIASED, TRIPLE-WELL FULLY DEPLETED SOI STRUCTURE

Patent #:	7292115	Issue Dt:	11/06/2007	Application #:	11112527	Filing Dt:	04/22/2005
Publication #:	US20060238265	Pub Dt:	10/26/2006
Title:	METHOD TO DIFFERENTIALLY CONTROL LC VOLTAGE-CONTROLLED OSCILLATORS

Patent #:	7465992	Issue Dt:	12/16/2008	Application #:	11116053	Filing Dt:	04/27/2005
Publication #:	US20060244068	Pub Dt:	11/02/2006
Title:	FIELD EFFECT TRANSISTOR WITH MIXED-CRYSTAL-ORIENTATION CHANNEL AND SOURCE/DRAIN REGIONS

Patent #:	7385234	Issue Dt:	06/10/2008	Application #:	11116700	Filing Dt:	04/27/2005
Publication #:	US20060244047	Pub Dt:	11/02/2006
Title:	MEMORY AND LOGIC DEVICES USING ELECTRONICALLY SCANNABLE MULTIPLEXING DEVICES

Patent #:	8606060	Issue Dt:	12/10/2013	Application #:	11122152	Filing Dt:	05/04/2005
Publication #:	US20050196101	Pub Dt:	09/08/2005
Title:	Method and apparatus for dynamic manipulation and dispersion in photonic crystal devices

Patent #:	7439128	Issue Dt:	10/21/2008	Application #:	11124324	Filing Dt:	05/06/2005
Publication #:	US20050196932	Pub Dt:	09/08/2005
Title:	METHOD OF CREATING DEEP TRENCH CAPACITOR USING A P+ METAL ELECTRODE

Patent #:	7346758	Issue Dt:	03/18/2008	Application #:	11125456	Filing Dt:	05/10/2005
Title:	SYSTEM AND METHOD FOR TRACE MESSAGING

Patent #:	7320918	Issue Dt:	01/22/2008	Application #:	11126675	Filing Dt:	05/11/2005
Publication #:	US20050214988	Pub Dt:	09/29/2005
Title:	METHOD AND STRUCTURE FOR BURIED CIRCUITS AND DEVICES

Patent #:	7679129	Issue Dt:	03/16/2010	Application #:	11128389	Filing Dt:	05/13/2005
Title:	SYSTEM AND METHOD FOR IMPROVING OXIDE-NITRIDE-OXIDE (ONO) COUPLING IN A SEMICONDUCTOR DEVICE

Patent #:	7199658	Issue Dt:	04/03/2007	Application #:	11131534	Filing Dt:	05/18/2005
Publication #:	US20060261890	Pub Dt:	11/23/2006
Title:	CIRCUITS AND METHODS FOR IMPLEMENTING POWER AMPLIFIERS FOR MILLIMETER WAVE APPLICATIONS

Patent #:	7230286	Issue Dt:	06/12/2007	Application #:	11135227	Filing Dt:	05/23/2005
Publication #:	US20060273389	Pub Dt:	12/07/2006
Title:	VERTICAL FET WITH NANOWIRE CHANNELS AND A SILICIDED BOTTOM CONTACT

Patent #:	7271495	Issue Dt:	09/18/2007	Application #:	11135720	Filing Dt:	05/24/2005
Publication #:	US20060076691	Pub Dt:	04/13/2006
Title:	CHIP BOND LAYOUT FOR CHIP CARRIER FOR FLIP CHIP APPLICATIONS

Patent #:	7335976	Issue Dt:	02/26/2008	Application #:	11137245	Filing Dt:	05/25/2005
Publication #:	US20060267048	Pub Dt:	11/30/2006
Title:	CROSSTALK REDUCTION IN ELECTRICAL INTERCONNECTS USING DIFFERENTIAL SIGNALING

Patent #:	7256415	Issue Dt:	08/14/2007	Application #:	11140780	Filing Dt:	05/31/2005
Publication #:	US20060267086	Pub Dt:	11/30/2006
Title:	MEMORY DEVICE AND METHOD OF MANUFACTURING THE DEVICE BY SIMULTANEOUSLY CONDITIONING TRANSITION METAL OXIDE LAYERS IN A PLURALITY OF MEMORY CELLS

Patent #:	7231474	Issue Dt:	06/12/2007	Application #:	11140803	Filing Dt:	05/31/2005
Title:	SERIAL INTERFACE HAVING A READ TEMPERATURE COMMAND

Patent #:	7532501	Issue Dt:	05/12/2009	Application #:	11142248	Filing Dt:	06/02/2005
Publication #:	US20060274569	Pub Dt:	12/07/2006
Title:	SEMICONDUCTOR DEVICE INCLUDING BACK-GATED TRANSISTORS AND METHOD OF FABRICATING THE DEVICE

Patent #:	7430800	Issue Dt:	10/07/2008	Application #:	11146441	Filing Dt:	06/06/2005
Publication #:	US20060272851	Pub Dt:	12/07/2006
Title:	APPARATUS AND METHOD FOR FAR END NOISE REDUCTION USING CAPACITIVE CANCELLATION BY OFFSET WIRING

Patent #:	7282790	Issue Dt:	10/16/2007	Application #:	11146495	Filing Dt:	06/06/2005
Publication #:	US20060274562	Pub Dt:	12/07/2006
Title:	PLANAR ARRAY CONTACT MEMORY CARDS

Patent #:	7389402	Issue Dt:	06/17/2008	Application #:	11146863	Filing Dt:	06/07/2005
Publication #:	US20060277390	Pub Dt:	12/07/2006
Title:	MICROPROCESSOR INCLUDING A CONFIGURABLE TRANSLATION LOOKASIDE BUFFER

Patent #:	7205812	Issue Dt:	04/17/2007	Application #:	11147003	Filing Dt:	06/07/2005
Title:	HYSTERISIS MANAGEMENT FOR DELAY LINE

Patent #:	7745296	Issue Dt:	06/29/2010	Application #:	11147383	Filing Dt:	06/08/2005
Publication #:	US20060281270	Pub Dt:	12/14/2006
Title:	RAISED SOURCE AND DRAIN PROCESS WITH DISPOSABLE SPACERS

Patent #:	7271034	Issue Dt:	09/18/2007	Application #:	11148737	Filing Dt:	06/09/2005
Publication #:	US20050277280	Pub Dt:	12/15/2005
Title:	SEMICONDUCTOR DEVICE WITH A HIGH THERMAL DISSIPATION EFFICIENCY

Patent #:	7221579	Issue Dt:	05/22/2007	Application #:	11150188	Filing Dt:	06/13/2005
Publication #:	US20060279978	Pub Dt:	12/14/2006
Title:	METHOD AND STRUCTURE FOR HIGH PERFORMANCE PHASE CHANGE MEMORY

Patent #:	7151029	Issue Dt:	12/19/2006	Application #:	11151007	Filing Dt:	06/14/2005
Publication #:	US20050237834	Pub Dt:	10/27/2005
Title:	MEMORY DEVICE AND METHOD OF MAKING THE SAME

Patent #:	7657690	Issue Dt:	02/02/2010	Application #:	11151318	Filing Dt:	06/14/2005
Title:	CONTROL OF PCI MEMORY READ BEHAVIOR USING MEMORY READ ALIAS AND MEMORY COMMAND REISSUE BITS

Patent #:	7276384	Issue Dt:	10/02/2007	Application #:	11151470	Filing Dt:	06/13/2005
Publication #:	US20050226043	Pub Dt:	10/13/2005
Title:	MAGNETIC TUNNEL JUNCTIONS WITH IMPROVED TUNNELING MAGNETO-RESISTANCE

Patent #:	7355855	Issue Dt:	04/08/2008	Application #:	11151830	Filing Dt:	06/14/2005
Publication #:	US20060279935	Pub Dt:	12/14/2006
Title:	COMPLIANT THERMAL INTERFACE STRUCTURE UTILIZING SPRING ELEMENTS

Patent #:	7408780	Issue Dt:	08/05/2008	Application #:	11151843	Filing Dt:	06/14/2005
Publication #:	US20060279932	Pub Dt:	12/14/2006
Title:	COMPLIANT THERMAL INTERFACE STRUCTURE UTILIZING SPRING ELEMENTS WITH FINS

Patent #:	7362582	Issue Dt:	04/22/2008	Application #:	11151905	Filing Dt:	06/14/2005
Publication #:	US20060279936	Pub Dt:	12/14/2006
Title:	COOLING STRUCTURE USING RIGID MOVABLE ELEMENTS

Patent #:	7330662	Issue Dt:	02/12/2008	Application #:	11153570	Filing Dt:	06/13/2005
Publication #:	US20050232639	Pub Dt:	10/20/2005
Title:	SYSTEM AND METHOD FOR REMOTE OPTICAL DIGITAL NETWORKING OF COMPUTING DEVICES

Patent #:	7439108	Issue Dt:	10/21/2008	Application #:	11155030	Filing Dt:	06/16/2005
Publication #:	US20060284251	Pub Dt:	12/21/2006
Title:	COPLANAR SILICON-ON-INSULATOR (SOI) REGIONS OF DIFFERENT CRYSTAL ORIENTATIONS AND METHODS OF MAKING THE SAME

Patent #:	7569442	Issue Dt:	08/04/2009	Application #:	11158726	Filing Dt:	06/22/2005
Publication #:	US20050239241	Pub Dt:	10/27/2005
Title:	HIGH SPEED LATERAL HETEROJUNCTION MISFETS REALIZED BY 2-DIMENSIONAL BANDGAP ENGINEERING AND METHODS THEREOF

Patent #:	7123529	Issue Dt:	10/17/2006	Application #:	11160054	Filing Dt:	06/07/2005
Title:	SENSE AMPLIFIER INCLUDING MULTIPLE CONDUCTION STATE FIELD EFFECT TRANSISTOR

Patent #:	7391097	Issue Dt:	06/24/2008	Application #:	11160151	Filing Dt:	06/10/2005
Publication #:	US20060278932	Pub Dt:	12/14/2006
Title:	SECURE ELECTRICALLY PROGRAMMABLE FUSE

Patent #:	7145829	Issue Dt:	12/05/2006	Application #:	11160273	Filing Dt:	06/16/2005
Publication #:	US20060285411	Pub Dt:	12/21/2006
Title:	SINGLE CYCLE REFRESH OF MULTI-PORT DYNAMIC RANDOM ACCESS MEMORY (DRAM)

Patent #:	7411252	Issue Dt:	08/12/2008	Application #:	11160361	Filing Dt:	06/21/2005
Publication #:	US20060286724	Pub Dt:	12/21/2006
Title:	SUBSTRATE BACKGATE FOR TRIGATE FET

Patent #:	7960791	Issue Dt:	06/14/2011	Application #:	11160457	Filing Dt:	06/24/2005
Publication #:	US20060292772	Pub Dt:	12/28/2006
Title:	DENSE PITCH BULK FINFET PROCESS BY SELECTIVE EPI AND ETCH

Patent #:	7414275	Issue Dt:	08/19/2008	Application #:	11160463	Filing Dt:	06/24/2005
Publication #:	US20060289994	Pub Dt:	12/28/2006
Title:	MULTI-LEVEL INTERCONNECTIONS FOR AN INTEGRATED CIRCUIT CHIP

Patent #:	7358551	Issue Dt:	04/15/2008	Application #:	11161066	Filing Dt:	07/21/2005
Publication #:	US20070018205	Pub Dt:	01/25/2007
Title:	STRUCTURE AND METHOD FOR IMPROVED STRESS AND YIELD IN PFETS WITH EMBEDDED SIGE SOURCE/DRAIN REGIONS

Patent #:	7838943	Issue Dt:	11/23/2010	Application #:	11161146	Filing Dt:	07/25/2005
Publication #:	US20070021293	Pub Dt:	01/25/2007
Title:	SHARED GATE FOR CONVENTIONAL PLANAR DEVICE AND HORIZONTAL CNT

Patent #:	7535105	Issue Dt:	05/19/2009	Application #:	11161414	Filing Dt:	08/02/2005
Publication #:	US20070029646	Pub Dt:	02/08/2007
Title:	INTER-CHIP ESD PROTECTION STRUCTURE FOR HIGH SPEED AND HIGH FREQUENCY DEVICES

100

Patent #:	7585764	Issue Dt:	09/08/2009	Application #:	11161599	Filing Dt:	08/09/2005
Publication #:	US20070037403	Pub Dt:	02/15/2007
Title:	VIA BOTTOM CONTACT AND METHOD OF MANUFACTURING SAME

Assignor

GLOBALFOUNDRIES INC.

Exec Dt:

10/22/2020

Assignee

GLOBALFOUNDRIES U.S. INC.

2600 GREAT AMERICA WAY

SANTA CLARA, CALIFORNIA 95054

Correspondence name and address
	GLOBALFOUNDRIES SINGAPORE PTE. LTD.
	60 WOODLANDS INDUSTRIAL PARK D STREET 2,
	SINGAPORE, 738406 SINGAPORE

Search Results as of: 05/17/2024 02:38 AM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6