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10/15/2013
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13475485
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03/04/2014
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11/21/2013
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11/12/2013
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11/21/2013
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11/12/2013
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05/21/2012
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11/21/2013
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06/23/2015
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05/22/2012
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11/28/2013
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02/25/2014
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05/23/2012
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11/28/2013
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02/18/2014
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05/23/2012
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11/28/2013
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05/27/2014
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11/28/2013
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05/24/2012
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11/28/2013
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06/30/2015
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12/06/2012
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05/28/2013
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05/24/2012
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11/08/2012
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08/27/2013
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05/25/2012
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03/18/2014
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11/28/2013
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07/16/2013
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05/25/2012
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04/29/2014
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05/25/2012
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11/28/2013
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08/26/2014
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05/29/2012
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09/20/2012
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03/24/2015
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05/29/2012
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12/05/2013
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04/29/2014
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05/29/2012
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12/05/2013
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Categorization of Design Rule Errors
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11/28/2017
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05/29/2012
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12/05/2013
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INTEGRATED CIRCUIT INCLUDING WIRE STRUCTURE, RELATED METHOD AND DESIGN STRUCTURE
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05/06/2014
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05/29/2012
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12/05/2013
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05/05/2015
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05/30/2012
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12/05/2013
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03/18/2014
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05/30/2012
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12/06/2012
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TRANSISTORS WITH EMBEDDED STRAIN-INDUCING MATERIAL FORMED IN CAVITIES PROVIDED BY AN OXIDIZING ETCH PROCESS
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03/04/2014
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05/30/2012
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12/05/2013
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SOURCE AND DRAIN ARCHITECTURE IN AN ACTIVE REGION OF A P-CHANNEL TRANSISTOR BY TILTED IMPLANTATION
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08/19/2014
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05/31/2012
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12/05/2013
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NON-VOLATILE MEMORY CROSSPOINT REPAIR
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12/20/2016
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13485828
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05/31/2012
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12/05/2013
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ELEMENT PLACEMENT IN CIRCUIT DESIGN BASED ON PREFERRED LOCATION
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06/17/2014
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06/01/2012
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10/31/2013
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Assembly of Electronic and Optical Devices
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12/23/2014
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13486644
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06/01/2012
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12/05/2013
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RECEIVER WITH FOUR-SLICE DECISION FEEDBACK EQUALIZER
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12/03/2013
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06/04/2012
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12/05/2013
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METHODS OF PERFORMING HIGHLY TILTED HALO IMPLANTATION PROCESSES ON SEMICONDUCTOR DEVICES
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08/26/2014
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06/04/2012
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09/27/2012
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CROSSPOINT ARRAY AND METHOD OF USE WITH A CROSSPOINT ARRAY HAVING CROSSBAR ELEMENTS HAVING A SOLID ELECTROLYTE MATERIAL USED AS A RECTIFIER WITH A SYMMETRIC OR SUBSTANTIALLY SYMMETRIC RESISTIVE MEMORY
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12/10/2013
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06/04/2012
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10/04/2012
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SELF-ALIGNED III-V FIELD EFFECT TRANSISTOR (FET) AND INTEGRATED CIRCUIT (IC) CHIP
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02/26/2013
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06/04/2012
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09/27/2012
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Increasing reliability of copper-based metallization structures in a microstructure device by using aluminum nitride
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02/04/2014
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13488940
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06/05/2012
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09/27/2012
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SURFACE MODIFIED NANOPARTICLES, METHODS OF THEIR PREPARATION, AND USES THEREOF FOR GENE AND DRUG DELIVERY
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05/06/2014
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06/06/2012
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12/20/2012
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HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY REDUCING A GATE FILL ASPECT RATIO IN REPLACEMENT GATE TECHNOLOGY
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01/28/2014
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06/06/2012
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12/12/2013
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SPACER ISOLATION IN DEEP TRENCH
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07/01/2014
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06/06/2012
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12/12/2013
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EDGE PROTECTION OF BONDED WAFERS DURING WAFER THINNING
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02/18/2014
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13490618
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06/07/2012
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11/14/2013
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FABRICATE SELF-FORMED NANOMETER PORE ARRAY AT WAFER SCALE FOR DNA SEQUENCING
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05/31/2016
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06/07/2012
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12/12/2013
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UNIVERSAL JITTER METER AND PHASE NOISE MEASUREMENT
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09/19/2017
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06/08/2012
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09/27/2012
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09/24/2013
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06/11/2012
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09/27/2012
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COMPUTER IMPLEMENTED DESIGN OF DEVICE FOR ELECTRO-OPTICAL
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04/01/2014
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06/11/2012
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12/12/2013
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03/11/2014
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06/11/2012
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12/12/2013
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12/17/2013
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06/12/2012
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10/04/2012
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LAYERED STRUCTURE WITH FUSE
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01/07/2014
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06/12/2012
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12/12/2013
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SIDE-GATE DEFINED TUNABLE NANOCONSTRICTION IN DOUBLE-GATED GRAPHENE MULTILAYERS
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12/16/2014
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06/12/2012
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12/12/2013
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THREE DIMENSIONAL FLIP CHIP SYSTEM AND METHOD
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09/09/2014
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06/12/2012
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12/12/2013
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04/22/2014
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06/13/2012
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12/19/2013
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METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TERMINATION
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03/26/2013
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06/13/2012
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10/04/2012
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING SEMICONDUCTOR DEVICE
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08/09/2016
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06/14/2012
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12/19/2013
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GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
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01/21/2014
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06/14/2012
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01/03/2013
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ANALOG-DIGITAL CONVERTER
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11/26/2013
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13523624
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06/14/2012
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12/19/2013
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BITLINE DELETION
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12/16/2014
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13523971
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06/15/2012
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12/19/2013
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BAD WORDLINE/ARRAY DETECTION IN MEMORY
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12/31/2013
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06/18/2012
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12/19/2013
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STRAINED SILICON AND STRAINED SILICON GERMANIUM ON INSULATOR METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS (MOSFETS)
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12/17/2013
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06/18/2012
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11/21/2013
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SEMICONDUCTOR ACTIVE MATRIX ON BURIED INSULATOR
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05/20/2014
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13526152
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06/18/2012
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12/19/2013
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09/02/2014
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13526153
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06/18/2012
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03/20/2014
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Token-Based Current Control to Mitigate Current Delivery Limitations in Integrated Circuits
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07/01/2014
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13526585
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06/19/2012
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11/28/2013
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DRIFT-INSENSITIVE OR INVARIANT MATERIAL FOR PHASE CHANGE MEMORY
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07/29/2014
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13529327
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06/21/2012
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12/26/2013
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METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH FLUORINE PASSIVATION
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09/17/2013
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13529334
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Filing Dt:
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06/21/2012
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Title:
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NANOWIRE FET AND FINFET
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Patent #:
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Issue Dt:
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11/18/2014
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Application #:
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13529360
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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DOUBLE LAYER INTERLEAVED P-N DIODE MODULATOR
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Patent #:
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Issue Dt:
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01/15/2013
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Application #:
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13529558
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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EMBEDDED STRESSOR FOR SEMICONDUCTOR STRUCTURES
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Patent #:
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Issue Dt:
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04/08/2014
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Application #:
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13529625
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Filing Dt:
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06/21/2012
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Publication #:
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Pub Dt:
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10/18/2012
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Title:
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HETEROJUNCTION BIPOLAR TRANSISTORS AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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04/08/2014
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Application #:
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13530519
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
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10/18/2012
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Title:
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LATERAL EPITAXIAL GROWN SOI IN DEEP TRENCH STRUCTURES AND METHODS OF MANUFACTURE
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Patent #:
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Issue Dt:
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09/10/2013
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Application #:
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13530605
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Filing Dt:
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06/22/2012
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Title:
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METHOD OF LARGE-AREA CIRCUIT LAYOUT RECOGNITION
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13530725
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Filing Dt:
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06/22/2012
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Publication #:
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Pub Dt:
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12/19/2013
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Title:
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GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
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Patent #:
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Issue Dt:
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12/02/2014
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Application #:
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13531518
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Filing Dt:
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06/23/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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INTERCONNECT STRUCTURES WITH ENGINEERED DIELECTRICS WITH NANOCOLUMNAR POROSITY
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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13531654
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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SHALLOW TRENCH ISOLATION STRUCTURES
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Patent #:
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Issue Dt:
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03/18/2014
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Application #:
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13531780
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
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12/26/2013
| | | | |
Title:
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SHALLOW TRENCH ISOLATION STRUCTURES
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Patent #:
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Issue Dt:
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03/24/2015
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Application #:
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13532157
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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SYSTEMS AND METHODS FOR MANAGING COMPUTING SYSTEMS UTILIZING AUGMENTED REALITY
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Patent #:
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Issue Dt:
|
08/06/2013
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Application #:
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13532323
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Filing Dt:
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06/25/2012
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Title:
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BIPOLAR JUNCTION TRANSISTOR WITH EPITAXIAL CONTACTS
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|
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Patent #:
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Issue Dt:
|
01/05/2016
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Application #:
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13532716
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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METHODS FOR FABRICATING MAGNETIC TRANSDUCERS USING POST-DEPOSITION TILTING
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|
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Patent #:
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Issue Dt:
|
03/26/2013
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Application #:
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13532991
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
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10/25/2012
| | | | |
Title:
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COUPLING PIEZOELECTRIC MATERIAL GENERATED STRESSES TO DEVICES FORMED IN INTEGRATED CIRCUITS
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|
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Patent #:
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|
Issue Dt:
|
05/06/2014
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Application #:
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13533099
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
Title:
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METHOD OF FABRICATING ISOLATED CAPACITORS AND STRUCTURE THEREOF
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|
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Patent #:
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|
Issue Dt:
|
04/16/2013
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Application #:
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13533499
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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MONOLAYER DOPANT EMBEDDED STRESSOR FOR ADVANCED CMOS
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|
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Patent #:
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Issue Dt:
|
02/18/2014
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Application #:
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13533807
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Filing Dt:
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06/26/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
Title:
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HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY SEPARATE REMOVAL OF PLACEHOLDER MATERIALS USING A MASKING REGIME PRIOR TO GATE PATTERNING
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|
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Patent #:
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|
Issue Dt:
|
11/19/2013
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Application #:
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13533816
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Filing Dt:
|
06/26/2012
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Title:
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METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH RUTHENIUM-LINED COPPER
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|
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Patent #:
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|
Issue Dt:
|
01/27/2015
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Application #:
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13534012
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
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SEMICONDUCTOR DEVICES HAVING DIFFERENT GATE OXIDE THICKNESSES
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|
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Patent #:
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Issue Dt:
|
10/22/2013
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Application #:
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13534067
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Filing Dt:
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06/27/2012
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Title:
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THREE DIMENSIONAL INTEGRATED CIRCUIT INTEGRATION USING ALIGNMENT VIA/DIELECTRIC BONDING FIRST AND THROUGH VIA FORMATION LAST
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|
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Patent #:
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|
Issue Dt:
|
11/18/2014
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Application #:
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13534082
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
11/01/2012
| | | | |
Title:
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DAMASCENE METHOD OF FORMING A SEMICONDUCTOR STRUCTURE AND A SEMICONDUCTOR STRUCTURE WITH MULTIPLE FIN-SHAPED CHANNEL REGIONS HAVING DIFFERENT WIDTHS
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|
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Patent #:
|
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Issue Dt:
|
08/27/2013
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Application #:
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13534350
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
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INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2013
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Application #:
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13534855
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Filing Dt:
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06/27/2012
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Publication #:
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Pub Dt:
|
11/01/2012
| | | | |
Title:
|
SURFACE CHARGE ENABLED NANOPOROUS SEMI-PERMEABLE MEMBRANE FOR DESALINATION
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|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
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Application #:
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13535393
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
10/18/2012
| | | | |
Title:
|
ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD
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|
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Patent #:
|
|
Issue Dt:
|
02/04/2014
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Application #:
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13535412
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
Title:
|
STRUCTURE AND DESIGN STRUCTURE FOR HIGH-Q VALUE INDUCTOR AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
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Application #:
|
13535676
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
|
3-D STACKED MULTIPROCESSOR STRUCTURES AND METHODS TO ENABLE RELIABLE OPERATION OF PROCESSORS AT SPEEDS ABOVE SPECIFIED LIMITS
|
|
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Patent #:
|
|
Issue Dt:
|
05/27/2014
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Application #:
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13535812
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Filing Dt:
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06/28/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
|
HIGH EFFICIENCY SOLAR CELLS FABRICATED BY INEXPENSIVE PECVD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2013
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Application #:
|
13535888
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Filing Dt:
|
06/28/2012
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Title:
|
DOUBLE LAYER INTERLEAVED P-N DIODE MODULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
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Application #:
|
13536163
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Filing Dt:
|
06/28/2012
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Publication #:
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|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
INTEGRATED DESIGN ENVIRONMENT FOR NANOPHOTONICS
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|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
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Application #:
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13538276
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Filing Dt:
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06/29/2012
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Publication #:
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|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
HIGH-RESOLUTION PHASE INTERPOLATORS
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|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
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Application #:
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13538621
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Filing Dt:
|
06/29/2012
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Publication #:
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|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
HIGH-RESOLUTION PHASE INTERPOLATORS
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|
|
Patent #:
|
|
Issue Dt:
|
07/01/2014
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Application #:
|
13539440
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Filing Dt:
|
06/30/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
|
SEPARATE REFINEMENT OF LOCAL WIRELENGTH AND LOCAL MODULE DENSITY IN INTERMEDIATE PLACEMENT OF AN INTEGRATED CIRCUIT DESIGN
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|
|
Patent #:
|
|
Issue Dt:
|
08/04/2015
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Application #:
|
13539480
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Filing Dt:
|
07/01/2012
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Publication #:
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Pub Dt:
|
10/25/2012
| | | | |
Title:
|
CONSTRUCTION OF RELIABLE STACKED VIA IN ELECTRONIC SUBSTRATES - VERTICAL STIFFNESS CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
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Application #:
|
13539544
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Filing Dt:
|
07/02/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
|
PINNING MAGNETIC DOMAIN WALLS IN A MAGNETIC DOMAIN SHIFT REGISTER MEMORY DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
09/16/2014
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Application #:
|
13539727
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Filing Dt:
|
07/02/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
|
FINFET STRUCTURE WITH MULTIPLE WORKFUNCTIONS AND METHOD FOR FABRICATING THE SAME
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|
|
Patent #:
|
|
Issue Dt:
|
12/31/2013
|
Application #:
|
13539830
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Filing Dt:
|
07/02/2012
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICES FORMED ON A CONTINUOUS ACTIVE REGION WITH AN ISOLATING CONDUCTIVE STRUCTURE POSITIONED BETWEEN SUCH SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME
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|
|
Patent #:
|
|
Issue Dt:
|
06/03/2014
|
Application #:
|
13539837
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Filing Dt:
|
07/02/2012
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING IMPROVED METAL GATE STRUCTURES
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|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13541022
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Filing Dt:
|
07/03/2012
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Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
Title:
|
Nanowire Tunnel Field Effect Transistors
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13542003
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Filing Dt:
|
07/05/2012
|
Publication #:
|
|
Pub Dt:
|
01/09/2014
| | | | |
Title:
|
FIELD-EFFECT-TRANSISTOR WITH SELF-ALIGNED DIFFUSION CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13542561
|
Filing Dt:
|
07/05/2012
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
Title:
|
INTEGRATED CIRCUITS HAVING PLACE-EFFICIENT CAPACITORS AND METHODS FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
13543061
|
Filing Dt:
|
07/06/2012
|
Publication #:
|
|
Pub Dt:
|
01/09/2014
| | | | |
Title:
|
DOMAIN WALL MOTION IN PERPENDICULARLY MAGNETIZED WIRES HAVING MAGNETIC MULTILAYERS WITH ENGINEERED INTERFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13543090
|
Filing Dt:
|
07/06/2012
|
Publication #:
|
|
Pub Dt:
|
01/09/2014
| | | | |
Title:
|
DOMAIN WALL MOTION IN PERPENDICULARLY MAGNETIZED WIRES HAVING ARTIFICIAL ANTIFERROMAGNETICALLY COUPLED MULTILAYERS WITH ENGINEERED INTERFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2014
|
Application #:
|
13544134
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Filing Dt:
|
07/09/2012
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
Title:
|
INTEGRATED DESIGN ENVIRONMENT FOR NANOPHOTONICS
|
|