skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 42 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
Issue Dt:
10/15/2013
Application #:
13475485
Filing Dt:
05/18/2012
Title:
RETROGRADE SUBSTRATE FOR DEEP TRENCH CAPACITORS
2
Patent #:
Issue Dt:
03/04/2014
Application #:
13476552
Filing Dt:
05/21/2012
Publication #:
Pub Dt:
11/21/2013
Title:
METHODS OF FORMING A SILICON SEED LAYER AND LAYERS OF SILICON AND SILICON-CONTAINING MATERIAL THEREFROM
3
Patent #:
Issue Dt:
11/12/2013
Application #:
13476567
Filing Dt:
05/21/2012
Publication #:
Pub Dt:
11/21/2013
Title:
MOS CAPACITORS WITH A FINFET PROCESS
4
Patent #:
Issue Dt:
11/12/2013
Application #:
13476645
Filing Dt:
05/21/2012
Publication #:
Pub Dt:
11/21/2013
Title:
METHODS OF FORMING FINFET DEVICES WITH ALTERNATIVE CHANNEL MATERIALS
5
Patent #:
Issue Dt:
06/23/2015
Application #:
13477978
Filing Dt:
05/22/2012
Publication #:
Pub Dt:
11/28/2013
Title:
INDUCTOR WITH STACKED CONDUCTORS
6
Patent #:
Issue Dt:
02/25/2014
Application #:
13478411
Filing Dt:
05/23/2012
Publication #:
Pub Dt:
11/28/2013
Title:
FORMING FACET-LESS EPITAXY WITH A CUT MASK
7
Patent #:
Issue Dt:
02/18/2014
Application #:
13478519
Filing Dt:
05/23/2012
Publication #:
Pub Dt:
11/28/2013
Title:
SUPERIOR STABILITY OF CHARACTERISTICS OF TRANSISTORS HAVING AN EARLY FORMED HIGH-K METAL GATE
8
Patent #:
Issue Dt:
05/27/2014
Application #:
13478932
Filing Dt:
05/23/2012
Publication #:
Pub Dt:
11/28/2013
Title:
DRIFT-INSENSITIVE OR INVARIANT MATERIAL FOR PHASE CHANGE MEMORY
9
Patent #:
Issue Dt:
02/11/2014
Application #:
13479448
Filing Dt:
05/24/2012
Publication #:
Pub Dt:
11/28/2013
Title:
MULTI-BANK RANDOM ACCESS MEMORY STRUCTURE WITH GLOBAL AND LOCAL SIGNAL BUFFERING FOR IMPROVED PERFORMANCE
10
Patent #:
Issue Dt:
06/30/2015
Application #:
13479946
Filing Dt:
05/24/2012
Publication #:
Pub Dt:
12/06/2012
Title:
WIRING SWITCH DESIGNS BASED ON A FIELD EFFECT DEVICE FOR RECONFIGURABLE INTERCONNECT PATHS
11
Patent #:
Issue Dt:
05/28/2013
Application #:
13480329
Filing Dt:
05/24/2012
Publication #:
Pub Dt:
11/08/2012
Title:
THIN SUBSTRATE FABRICATION USING STRESS-INDUCED SPALLING
12
Patent #:
Issue Dt:
08/27/2013
Application #:
13480573
Filing Dt:
05/25/2012
Title:
CLOSED-LOOP SLEW-RATE CONTROL FOR PHASE INTERPOLATOR OPTIMIZATION
13
Patent #:
Issue Dt:
03/18/2014
Application #:
13480831
Filing Dt:
05/25/2012
Publication #:
Pub Dt:
11/28/2013
Title:
METHOD AND APPARATUS FOR SUBSTRATE-MASK ALIGNMENT
14
Patent #:
Issue Dt:
07/16/2013
Application #:
13481048
Filing Dt:
05/25/2012
Title:
BIPOLAR JUNCTION TRANSISTOR WITH EPITAXIAL CONTACTS
15
Patent #:
Issue Dt:
04/29/2014
Application #:
13481062
Filing Dt:
05/25/2012
Publication #:
Pub Dt:
11/28/2013
Title:
SPALLING UTILIZING STRESSOR LAYER PORTIONS
16
Patent #:
Issue Dt:
08/26/2014
Application #:
13482262
Filing Dt:
05/29/2012
Publication #:
Pub Dt:
09/20/2012
Title:
METHOD TO IMPROVE NUCLEATION OF MATERIALS ON GRAPHENE AND CARBON NANOTUBES
17
Patent #:
Issue Dt:
03/24/2015
Application #:
13482414
Filing Dt:
05/29/2012
Publication #:
Pub Dt:
12/05/2013
Title:
REACTIVE BONDING OF A FLIP CHIP PACKAGE
18
Patent #:
Issue Dt:
04/29/2014
Application #:
13482624
Filing Dt:
05/29/2012
Publication #:
Pub Dt:
12/05/2013
Title:
Categorization of Design Rule Errors
19
Patent #:
Issue Dt:
11/28/2017
Application #:
13482864
Filing Dt:
05/29/2012
Publication #:
Pub Dt:
12/05/2013
Title:
INTEGRATED CIRCUIT INCLUDING WIRE STRUCTURE, RELATED METHOD AND DESIGN STRUCTURE
20
Patent #:
Issue Dt:
05/06/2014
Application #:
13482871
Filing Dt:
05/29/2012
Publication #:
Pub Dt:
12/05/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING IMPROVED SPACERS
21
Patent #:
Issue Dt:
05/05/2015
Application #:
13483200
Filing Dt:
05/30/2012
Publication #:
Pub Dt:
12/05/2013
Title:
EMBEDDED PLANAR SOURCE/DRAIN STRESSORS FOR A FINFET INCLUDING A PLURALITY OF FINS
22
Patent #:
Issue Dt:
03/18/2014
Application #:
13483630
Filing Dt:
05/30/2012
Publication #:
Pub Dt:
12/06/2012
Title:
TRANSISTORS WITH EMBEDDED STRAIN-INDUCING MATERIAL FORMED IN CAVITIES PROVIDED BY AN OXIDIZING ETCH PROCESS
23
Patent #:
Issue Dt:
03/04/2014
Application #:
13483759
Filing Dt:
05/30/2012
Publication #:
Pub Dt:
12/05/2013
Title:
SOURCE AND DRAIN ARCHITECTURE IN AN ACTIVE REGION OF A P-CHANNEL TRANSISTOR BY TILTED IMPLANTATION
24
Patent #:
Issue Dt:
08/19/2014
Application #:
13485748
Filing Dt:
05/31/2012
Publication #:
Pub Dt:
12/05/2013
Title:
NON-VOLATILE MEMORY CROSSPOINT REPAIR
25
Patent #:
Issue Dt:
12/20/2016
Application #:
13485828
Filing Dt:
05/31/2012
Publication #:
Pub Dt:
12/05/2013
Title:
ELEMENT PLACEMENT IN CIRCUIT DESIGN BASED ON PREFERRED LOCATION
26
Patent #:
Issue Dt:
06/17/2014
Application #:
13486573
Filing Dt:
06/01/2012
Publication #:
Pub Dt:
10/31/2013
Title:
Assembly of Electronic and Optical Devices
27
Patent #:
Issue Dt:
12/23/2014
Application #:
13486644
Filing Dt:
06/01/2012
Publication #:
Pub Dt:
12/05/2013
Title:
RECEIVER WITH FOUR-SLICE DECISION FEEDBACK EQUALIZER
28
Patent #:
Issue Dt:
12/03/2013
Application #:
13487351
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
12/05/2013
Title:
METHODS OF PERFORMING HIGHLY TILTED HALO IMPLANTATION PROCESSES ON SEMICONDUCTOR DEVICES
29
Patent #:
Issue Dt:
08/26/2014
Application #:
13487427
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
09/27/2012
Title:
CROSSPOINT ARRAY AND METHOD OF USE WITH A CROSSPOINT ARRAY HAVING CROSSBAR ELEMENTS HAVING A SOLID ELECTROLYTE MATERIAL USED AS A RECTIFIER WITH A SYMMETRIC OR SUBSTANTIALLY SYMMETRIC RESISTIVE MEMORY
30
Patent #:
Issue Dt:
12/10/2013
Application #:
13487473
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
10/04/2012
Title:
SELF-ALIGNED III-V FIELD EFFECT TRANSISTOR (FET) AND INTEGRATED CIRCUIT (IC) CHIP
31
Patent #:
Issue Dt:
02/26/2013
Application #:
13487647
Filing Dt:
06/04/2012
Publication #:
Pub Dt:
09/27/2012
Title:
Increasing reliability of copper-based metallization structures in a microstructure device by using aluminum nitride
32
Patent #:
Issue Dt:
02/04/2014
Application #:
13488940
Filing Dt:
06/05/2012
Publication #:
Pub Dt:
09/27/2012
Title:
SURFACE MODIFIED NANOPARTICLES, METHODS OF THEIR PREPARATION, AND USES THEREOF FOR GENE AND DRUG DELIVERY
33
Patent #:
Issue Dt:
05/06/2014
Application #:
13489539
Filing Dt:
06/06/2012
Publication #:
Pub Dt:
12/20/2012
Title:
HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY REDUCING A GATE FILL ASPECT RATIO IN REPLACEMENT GATE TECHNOLOGY
34
Patent #:
Issue Dt:
01/28/2014
Application #:
13489572
Filing Dt:
06/06/2012
Publication #:
Pub Dt:
12/12/2013
Title:
SPACER ISOLATION IN DEEP TRENCH
35
Patent #:
Issue Dt:
07/01/2014
Application #:
13489861
Filing Dt:
06/06/2012
Publication #:
Pub Dt:
12/12/2013
Title:
EDGE PROTECTION OF BONDED WAFERS DURING WAFER THINNING
36
Patent #:
Issue Dt:
02/18/2014
Application #:
13490618
Filing Dt:
06/07/2012
Publication #:
Pub Dt:
11/14/2013
Title:
FABRICATE SELF-FORMED NANOMETER PORE ARRAY AT WAFER SCALE FOR DNA SEQUENCING
37
Patent #:
Issue Dt:
05/31/2016
Application #:
13491210
Filing Dt:
06/07/2012
Publication #:
Pub Dt:
12/12/2013
Title:
UNIVERSAL JITTER METER AND PHASE NOISE MEASUREMENT
38
Patent #:
Issue Dt:
09/19/2017
Application #:
13492108
Filing Dt:
06/08/2012
Publication #:
Pub Dt:
09/27/2012
Title:
METHOD OF FABRICATING A FINFET HAVING A GATE STRUCTURE DISPOSED AT LEAST PARTIALLY AT A BEND REGION OF THE SEMICONDUCTOR FIN.
39
Patent #:
Issue Dt:
09/24/2013
Application #:
13492964
Filing Dt:
06/11/2012
Publication #:
Pub Dt:
09/27/2012
Title:
COMPUTER IMPLEMENTED DESIGN OF DEVICE FOR ELECTRO-OPTICAL MODULATION OF LIGHT INCIDENT UPON DEVICE
40
Patent #:
Issue Dt:
04/01/2014
Application #:
13493003
Filing Dt:
06/11/2012
Publication #:
Pub Dt:
12/12/2013
Title:
METHODS OF FORMING SEMICONDUCTOR DEVICES BY FORMING SEMICONDUCTOR CHANNEL REGION MATERIALS PRIOR TO FORMING ISOLATION STRUCTURES
41
Patent #:
Issue Dt:
03/11/2014
Application #:
13493021
Filing Dt:
06/11/2012
Publication #:
Pub Dt:
12/12/2013
Title:
METHODS OF FORMING HIGH MOBILITY FIN CHANNELS ON THREE DIMENSIONAL SEMICONDUCTOR DEVICES
42
Patent #:
Issue Dt:
12/17/2013
Application #:
13494327
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
10/04/2012
Title:
LAYERED STRUCTURE WITH FUSE
43
Patent #:
Issue Dt:
01/07/2014
Application #:
13494635
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
12/12/2013
Title:
SIDE-GATE DEFINED TUNABLE NANOCONSTRICTION IN DOUBLE-GATED GRAPHENE MULTILAYERS
44
Patent #:
Issue Dt:
12/16/2014
Application #:
13494667
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
12/12/2013
Title:
THREE DIMENSIONAL FLIP CHIP SYSTEM AND METHOD
45
Patent #:
Issue Dt:
09/09/2014
Application #:
13494686
Filing Dt:
06/12/2012
Publication #:
Pub Dt:
12/12/2013
Title:
METHODS OF TAILORING WORK FUNCTION OF SEMICONDUCTOR DEVICES WITH HIGH-K/METAL LAYER GATE STRUCTURES BY PERFORMING A FLUORINE IMPLANT PROCESS
46
Patent #:
Issue Dt:
04/22/2014
Application #:
13495081
Filing Dt:
06/13/2012
Publication #:
Pub Dt:
12/19/2013
Title:
METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TERMINATION
47
Patent #:
Issue Dt:
03/26/2013
Application #:
13495195
Filing Dt:
06/13/2012
Publication #:
Pub Dt:
10/04/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MAKING SEMICONDUCTOR DEVICE
48
Patent #:
Issue Dt:
08/09/2016
Application #:
13523182
Filing Dt:
06/14/2012
Publication #:
Pub Dt:
12/19/2013
Title:
GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
49
Patent #:
Issue Dt:
01/21/2014
Application #:
13523331
Filing Dt:
06/14/2012
Publication #:
Pub Dt:
01/03/2013
Title:
ANALOG-DIGITAL CONVERTER
50
Patent #:
Issue Dt:
11/26/2013
Application #:
13523624
Filing Dt:
06/14/2012
Publication #:
Pub Dt:
12/19/2013
Title:
BITLINE DELETION
51
Patent #:
Issue Dt:
12/16/2014
Application #:
13523971
Filing Dt:
06/15/2012
Publication #:
Pub Dt:
12/19/2013
Title:
BAD WORDLINE/ARRAY DETECTION IN MEMORY
52
Patent #:
Issue Dt:
12/31/2013
Application #:
13525479
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
12/19/2013
Title:
STRAINED SILICON AND STRAINED SILICON GERMANIUM ON INSULATOR METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS (MOSFETS)
53
Patent #:
Issue Dt:
12/17/2013
Application #:
13526139
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
11/21/2013
Title:
SEMICONDUCTOR ACTIVE MATRIX ON BURIED INSULATOR
54
Patent #:
Issue Dt:
05/20/2014
Application #:
13526152
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
12/19/2013
Title:
METHOD AND APPARATUS FOR HIERARCHICAL WAFER QUALITY PREDICTIVE MODELING
55
Patent #:
Issue Dt:
09/02/2014
Application #:
13526153
Filing Dt:
06/18/2012
Publication #:
Pub Dt:
03/20/2014
Title:
Token-Based Current Control to Mitigate Current Delivery Limitations in Integrated Circuits
56
Patent #:
Issue Dt:
07/01/2014
Application #:
13526585
Filing Dt:
06/19/2012
Publication #:
Pub Dt:
11/28/2013
Title:
DRIFT-INSENSITIVE OR INVARIANT MATERIAL FOR PHASE CHANGE MEMORY
57
Patent #:
Issue Dt:
07/29/2014
Application #:
13529327
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
12/26/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH FLUORINE PASSIVATION
58
Patent #:
Issue Dt:
09/17/2013
Application #:
13529334
Filing Dt:
06/21/2012
Title:
NANOWIRE FET AND FINFET
59
Patent #:
Issue Dt:
11/18/2014
Application #:
13529360
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
12/26/2013
Title:
DOUBLE LAYER INTERLEAVED P-N DIODE MODULATOR
60
Patent #:
Issue Dt:
01/15/2013
Application #:
13529558
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
10/18/2012
Title:
EMBEDDED STRESSOR FOR SEMICONDUCTOR STRUCTURES
61
Patent #:
Issue Dt:
04/08/2014
Application #:
13529625
Filing Dt:
06/21/2012
Publication #:
Pub Dt:
10/18/2012
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS AND METHODS OF MANUFACTURE
62
Patent #:
Issue Dt:
04/08/2014
Application #:
13530519
Filing Dt:
06/22/2012
Publication #:
Pub Dt:
10/18/2012
Title:
LATERAL EPITAXIAL GROWN SOI IN DEEP TRENCH STRUCTURES AND METHODS OF MANUFACTURE
63
Patent #:
Issue Dt:
09/10/2013
Application #:
13530605
Filing Dt:
06/22/2012
Title:
METHOD OF LARGE-AREA CIRCUIT LAYOUT RECOGNITION
64
Patent #:
Issue Dt:
12/17/2013
Application #:
13530725
Filing Dt:
06/22/2012
Publication #:
Pub Dt:
12/19/2013
Title:
GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
65
Patent #:
Issue Dt:
12/02/2014
Application #:
13531518
Filing Dt:
06/23/2012
Publication #:
Pub Dt:
10/18/2012
Title:
INTERCONNECT STRUCTURES WITH ENGINEERED DIELECTRICS WITH NANOCOLUMNAR POROSITY
66
Patent #:
Issue Dt:
06/16/2015
Application #:
13531654
Filing Dt:
06/25/2012
Publication #:
Pub Dt:
12/26/2013
Title:
SHALLOW TRENCH ISOLATION STRUCTURES
67
Patent #:
Issue Dt:
03/18/2014
Application #:
13531780
Filing Dt:
06/25/2012
Publication #:
Pub Dt:
12/26/2013
Title:
SHALLOW TRENCH ISOLATION STRUCTURES
68
Patent #:
Issue Dt:
03/24/2015
Application #:
13532157
Filing Dt:
06/25/2012
Publication #:
Pub Dt:
10/18/2012
Title:
SYSTEMS AND METHODS FOR MANAGING COMPUTING SYSTEMS UTILIZING AUGMENTED REALITY
69
Patent #:
Issue Dt:
08/06/2013
Application #:
13532323
Filing Dt:
06/25/2012
Title:
BIPOLAR JUNCTION TRANSISTOR WITH EPITAXIAL CONTACTS
70
Patent #:
Issue Dt:
01/05/2016
Application #:
13532716
Filing Dt:
06/25/2012
Publication #:
Pub Dt:
10/18/2012
Title:
METHODS FOR FABRICATING MAGNETIC TRANSDUCERS USING POST-DEPOSITION TILTING
71
Patent #:
Issue Dt:
03/26/2013
Application #:
13532991
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/25/2012
Title:
COUPLING PIEZOELECTRIC MATERIAL GENERATED STRESSES TO DEVICES FORMED IN INTEGRATED CIRCUITS
72
Patent #:
Issue Dt:
05/06/2014
Application #:
13533099
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/25/2012
Title:
METHOD OF FABRICATING ISOLATED CAPACITORS AND STRUCTURE THEREOF
73
Patent #:
Issue Dt:
04/16/2013
Application #:
13533499
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/18/2012
Title:
MONOLAYER DOPANT EMBEDDED STRESSOR FOR ADVANCED CMOS
74
Patent #:
Issue Dt:
02/18/2014
Application #:
13533807
Filing Dt:
06/26/2012
Publication #:
Pub Dt:
10/18/2012
Title:
HIGH-K METAL GATE ELECTRODE STRUCTURES FORMED BY SEPARATE REMOVAL OF PLACEHOLDER MATERIALS USING A MASKING REGIME PRIOR TO GATE PATTERNING
75
Patent #:
Issue Dt:
11/19/2013
Application #:
13533816
Filing Dt:
06/26/2012
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH RUTHENIUM-LINED COPPER
76
Patent #:
Issue Dt:
01/27/2015
Application #:
13534012
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
01/02/2014
Title:
SEMICONDUCTOR DEVICES HAVING DIFFERENT GATE OXIDE THICKNESSES
77
Patent #:
Issue Dt:
10/22/2013
Application #:
13534067
Filing Dt:
06/27/2012
Title:
THREE DIMENSIONAL INTEGRATED CIRCUIT INTEGRATION USING ALIGNMENT VIA/DIELECTRIC BONDING FIRST AND THROUGH VIA FORMATION LAST
78
Patent #:
Issue Dt:
11/18/2014
Application #:
13534082
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
11/01/2012
Title:
DAMASCENE METHOD OF FORMING A SEMICONDUCTOR STRUCTURE AND A SEMICONDUCTOR STRUCTURE WITH MULTIPLE FIN-SHAPED CHANNEL REGIONS HAVING DIFFERENT WIDTHS
79
Patent #:
Issue Dt:
08/27/2013
Application #:
13534350
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
10/18/2012
Title:
INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
80
Patent #:
Issue Dt:
05/28/2013
Application #:
13534855
Filing Dt:
06/27/2012
Publication #:
Pub Dt:
11/01/2012
Title:
SURFACE CHARGE ENABLED NANOPOROUS SEMI-PERMEABLE MEMBRANE FOR DESALINATION
81
Patent #:
Issue Dt:
03/18/2014
Application #:
13535393
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
10/18/2012
Title:
ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD
82
Patent #:
Issue Dt:
02/04/2014
Application #:
13535412
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
10/25/2012
Title:
STRUCTURE AND DESIGN STRUCTURE FOR HIGH-Q VALUE INDUCTOR AND METHOD OF MANUFACTURING THE SAME
83
Patent #:
Issue Dt:
08/05/2014
Application #:
13535676
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
01/02/2014
Title:
3-D STACKED MULTIPROCESSOR STRUCTURES AND METHODS TO ENABLE RELIABLE OPERATION OF PROCESSORS AT SPEEDS ABOVE SPECIFIED LIMITS
84
Patent #:
Issue Dt:
05/27/2014
Application #:
13535812
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
01/02/2014
Title:
HIGH EFFICIENCY SOLAR CELLS FABRICATED BY INEXPENSIVE PECVD
85
Patent #:
Issue Dt:
09/03/2013
Application #:
13535888
Filing Dt:
06/28/2012
Title:
DOUBLE LAYER INTERLEAVED P-N DIODE MODULATOR
86
Patent #:
Issue Dt:
01/07/2014
Application #:
13536163
Filing Dt:
06/28/2012
Publication #:
Pub Dt:
01/02/2014
Title:
INTEGRATED DESIGN ENVIRONMENT FOR NANOPHOTONICS
87
Patent #:
Issue Dt:
10/22/2013
Application #:
13538276
Filing Dt:
06/29/2012
Publication #:
Pub Dt:
08/15/2013
Title:
HIGH-RESOLUTION PHASE INTERPOLATORS
88
Patent #:
Issue Dt:
10/15/2013
Application #:
13538621
Filing Dt:
06/29/2012
Publication #:
Pub Dt:
08/15/2013
Title:
HIGH-RESOLUTION PHASE INTERPOLATORS
89
Patent #:
Issue Dt:
07/01/2014
Application #:
13539440
Filing Dt:
06/30/2012
Publication #:
Pub Dt:
01/02/2014
Title:
SEPARATE REFINEMENT OF LOCAL WIRELENGTH AND LOCAL MODULE DENSITY IN INTERMEDIATE PLACEMENT OF AN INTEGRATED CIRCUIT DESIGN
90
Patent #:
Issue Dt:
08/04/2015
Application #:
13539480
Filing Dt:
07/01/2012
Publication #:
Pub Dt:
10/25/2012
Title:
CONSTRUCTION OF RELIABLE STACKED VIA IN ELECTRONIC SUBSTRATES - VERTICAL STIFFNESS CONTROL METHOD
91
Patent #:
Issue Dt:
07/22/2014
Application #:
13539544
Filing Dt:
07/02/2012
Publication #:
Pub Dt:
01/02/2014
Title:
PINNING MAGNETIC DOMAIN WALLS IN A MAGNETIC DOMAIN SHIFT REGISTER MEMORY DEVICE
92
Patent #:
Issue Dt:
09/16/2014
Application #:
13539727
Filing Dt:
07/02/2012
Publication #:
Pub Dt:
01/02/2014
Title:
FINFET STRUCTURE WITH MULTIPLE WORKFUNCTIONS AND METHOD FOR FABRICATING THE SAME
93
Patent #:
Issue Dt:
12/31/2013
Application #:
13539830
Filing Dt:
07/02/2012
Publication #:
Pub Dt:
01/02/2014
Title:
SEMICONDUCTOR DEVICES FORMED ON A CONTINUOUS ACTIVE REGION WITH AN ISOLATING CONDUCTIVE STRUCTURE POSITIONED BETWEEN SUCH SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME
94
Patent #:
Issue Dt:
06/03/2014
Application #:
13539837
Filing Dt:
07/02/2012
Publication #:
Pub Dt:
01/02/2014
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING IMPROVED METAL GATE STRUCTURES
95
Patent #:
Issue Dt:
05/13/2014
Application #:
13541022
Filing Dt:
07/03/2012
Publication #:
Pub Dt:
11/01/2012
Title:
Nanowire Tunnel Field Effect Transistors
96
Patent #:
Issue Dt:
01/28/2014
Application #:
13542003
Filing Dt:
07/05/2012
Publication #:
Pub Dt:
01/09/2014
Title:
FIELD-EFFECT-TRANSISTOR WITH SELF-ALIGNED DIFFUSION CONTACT
97
Patent #:
Issue Dt:
10/01/2013
Application #:
13542561
Filing Dt:
07/05/2012
Publication #:
Pub Dt:
10/25/2012
Title:
INTEGRATED CIRCUITS HAVING PLACE-EFFICIENT CAPACITORS AND METHODS FOR FABRICATING THE SAME
98
Patent #:
Issue Dt:
01/28/2014
Application #:
13543061
Filing Dt:
07/06/2012
Publication #:
Pub Dt:
01/09/2014
Title:
DOMAIN WALL MOTION IN PERPENDICULARLY MAGNETIZED WIRES HAVING MAGNETIC MULTILAYERS WITH ENGINEERED INTERFACES
99
Patent #:
Issue Dt:
04/01/2014
Application #:
13543090
Filing Dt:
07/06/2012
Publication #:
Pub Dt:
01/09/2014
Title:
DOMAIN WALL MOTION IN PERPENDICULARLY MAGNETIZED WIRES HAVING ARTIFICIAL ANTIFERROMAGNETICALLY COUPLED MULTILAYERS WITH ENGINEERED INTERFACES
100
Patent #:
Issue Dt:
03/25/2014
Application #:
13544134
Filing Dt:
07/09/2012
Publication #:
Pub Dt:
01/02/2014
Title:
INTEGRATED DESIGN ENVIRONMENT FOR NANOPHOTONICS
Assignor
1
Exec Dt:
10/22/2020
Assignee
1
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

Search Results as of: 05/17/2024 05:49 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT