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Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 14520
Page 10 of 146
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1
Patent #:
6643772
Issue Dt:
11/04/2003
Application #:
09615767
Filing Dt:
07/13/2000
Title:
UNIVERSAL BOOT CODE FOR A COMPUTER NETWORK
2
Patent #:
6609946
Issue Dt:
08/26/2003
Application #:
09616473
Filing Dt:
07/14/2000
Title:
METHOD AND SYSTEM FOR POLISHING A SEMICONDUCTOR WAFER
3
Patent #:
6724947
Issue Dt:
04/20/2004
Application #:
09616862
Filing Dt:
07/14/2000
Title:
METHOD AND SYSTEM FOR MEASURING CHARACTERISTICS OF CURVED FEATURES
4
Patent #:
6344964
Issue Dt:
02/05/2002
Application #:
09616951
Filing Dt:
07/14/2000
Title:
Capacitor having sidewall spacer protecting the dielectric layer
5
Patent #:
6445072
Issue Dt:
09/03/2002
Application #:
09617158
Filing Dt:
07/17/2000
Title:
DELIBERATE VOID IN INNERLAYER DIELECTRIC GAPFILL TO REDUCE DIELECTRIC CONSTANT
6
Patent #:
6525615
Issue Dt:
02/25/2003
Application #:
09617259
Filing Dt:
07/14/2000
Title:
OSCILLATOR WITH DIGITALLY VARIABLE PHASE FOR A PHASE-LOCKED LOOP
7
Patent #:
6760856
Issue Dt:
07/06/2004
Application #:
09617558
Filing Dt:
07/17/2000
Title:
PROGRAMMABLE COMPENSATED DELAY FOR DDR SDRAM INTERFACE USING PROGRAMMABLE DELAY LOOP FOR REFERENCE CALIBRATION
8
Patent #:
6536024
Issue Dt:
03/18/2003
Application #:
09617908
Filing Dt:
07/14/2000
Title:
METHOD AND APPARATUS FOR MAKING INTEGRATED CIRCUITS HAVING GATED CLOCK TREES
9
Patent #:
6714556
Issue Dt:
03/30/2004
Application #:
09618057
Filing Dt:
07/17/2000
Title:
IN-BAND MANAGEMENT OF A STACKED GROUP OF SWITCHES BY A SINGLE CPU
10
Patent #:
6661622
Issue Dt:
12/09/2003
Application #:
09618167
Filing Dt:
07/17/2000
Title:
METHOD TO ACHIEVE LOW AND STABLE FERROMAGNETIC COUPLING FIELD
11
Patent #:
6981054
Issue Dt:
12/27/2005
Application #:
09618291
Filing Dt:
07/18/2000
Title:
FLOW CONTROL ARRANGEMENT IN A NETWORK SWITCH BASED ON PRIORITY TRAFFIC
12
Patent #:
6270929
Issue Dt:
08/07/2001
Application #:
09619789
Filing Dt:
07/20/2000
Title:
Damascene T-gate using a relacs flow
13
Patent #:
6255202
Issue Dt:
07/03/2001
Application #:
09619836
Filing Dt:
07/20/2000
Title:
Damascene T-gate using a spacer flow
14
Patent #:
6359298
Issue Dt:
03/19/2002
Application #:
09619838
Filing Dt:
07/20/2000
Title:
Capacitively coupled DTMOS on SOI for multiple devices
15
Patent #:
6319802
Issue Dt:
11/20/2001
Application #:
09620145
Filing Dt:
07/20/2000
Title:
T-gate formation using modified damascene processing with two masks
16
Patent #:
6417084
Issue Dt:
07/09/2002
Application #:
09620300
Filing Dt:
07/20/2000
Title:
T-GATE FORMATION USING A MODIFIED CONVENTIONAL POLY PROCESS
17
Patent #:
6453278
Issue Dt:
09/17/2002
Application #:
09620981
Filing Dt:
07/21/2000
Title:
FLEXIBLE IMPLEMENTATION OF A SYSTEM MANAGEMENT MODE (SMM) IN A PROCESSOR
18
Patent #:
6387818
Issue Dt:
05/14/2002
Application #:
09621156
Filing Dt:
07/21/2000
Title:
METHOD OF POROUS DIELECTRIC FORMATION WITH ANODIC TEMPLATE
19
Patent #:
6495887
Issue Dt:
12/17/2002
Application #:
09621290
Filing Dt:
07/20/2000
Title:
ARGON IMPLANTATION AFTER SILICIDATION FOR IMPROVED FLOATING-BODY EFFECTS
20
Patent #:
6748545
Issue Dt:
06/08/2004
Application #:
09621931
Filing Dt:
07/24/2000
Title:
A SYSTEM AND METHOD FOR SELECTING BETWEEN A VOLTAGE SPECIFIED BY A PROCESSOR AND AN ALTERNATE VOLTAGE TO BE SUPPLIED TO HE PROCESSOR
21
Patent #:
6560764
Issue Dt:
05/06/2003
Application #:
09624494
Filing Dt:
07/24/2000
Title:
DYNAMIC PULSE WIDTH PROGRAMMING OF PROGRAMMABLE LOGIC DEVICES
22
Patent #:
6706631
Issue Dt:
03/16/2004
Application #:
09624656
Filing Dt:
07/25/2000
Title:
METHOD OF CONTROLLING SHEET RESISTANCE OF METAL SILICIDE REGIONS BY CONTROLLING THE SALICIDE STRIP TIME
23
Patent #:
6308259
Issue Dt:
10/23/2001
Application #:
09624841
Filing Dt:
07/25/2000
Title:
INSTRUCTION QUEUE EVALUATING DEPENDENCY VECTOR IN PORTIONS DURING DIFFERENT CLOCK PHASES
24
Patent #:
6625512
Issue Dt:
09/23/2003
Application #:
09625140
Filing Dt:
07/25/2000
Title:
METHOD AND APPARATUS FOR PERFORMING FINAL CRITICAL DIMENSION CONTROL
25
Patent #:
6362524
Issue Dt:
03/26/2002
Application #:
09625367
Filing Dt:
07/26/2000
Title:
EDGE SEAL RING FOR COPPER DAMASCENE PROCESS AND METHOD FOR FABRICATION THEREOF
26
Patent #:
6379980
Issue Dt:
04/30/2002
Application #:
09625587
Filing Dt:
07/26/2000
Title:
Method and apparatus for monitoring material removal tool performance using endpoint time removal rate determination
27
Patent #:
6463570
Issue Dt:
10/08/2002
Application #:
09625620
Filing Dt:
07/26/2000
Title:
APPARATUS AND METHOD FOR VERIFYING PROCESS INTEGRITY
28
Patent #:
6562554
Issue Dt:
05/13/2003
Application #:
09625649
Filing Dt:
07/26/2000
Title:
PHOTORESIST COMPOSITIONS WITH CYCLIC OLEFIN POLYMERS AND HYDROPHOBIC NON-STEROIDAL MULTI-ALICYCLIC ADDITIVES
29
Patent #:
6368948
Issue Dt:
04/09/2002
Application #:
09626454
Filing Dt:
07/26/2000
Title:
Method of forming capped copper interconnects with reduced hillocks
30
Patent #:
6596631
Issue Dt:
07/22/2003
Application #:
09626455
Filing Dt:
07/26/2000
Title:
METHOD OF FORMING COPPER INTERCONNECT CAPPING LAYERS WITH IMPROVED INTERFACE AND ADHESION
31
Patent #:
6516395
Issue Dt:
02/04/2003
Application #:
09626615
Filing Dt:
07/27/2000
Title:
SYSTEM AND METHOD FOR CONTROLLING ACCESS TO A PRIVILEGE-PARTITIONED ADDRESS SPACE WITH A FIXED SET OF ATTRIBUTES
32
Patent #:
6391751
Issue Dt:
05/21/2002
Application #:
09626668
Filing Dt:
07/27/2000
Title:
METHOD FOR FORMING VERTICAL PROFILE OF POLYSILICON GATE ELECTRODES
33
Patent #:
6627998
Issue Dt:
09/30/2003
Application #:
09626904
Filing Dt:
07/27/2000
Title:
WAFER SCALE THIN FILM PACKAGE
34
Patent #:
6597444
Issue Dt:
07/22/2003
Application #:
09627436
Filing Dt:
07/28/2000
Title:
DETERMINATION OF FLUX COVERAGE
35
Patent #:
6337595
Issue Dt:
01/08/2002
Application #:
09627599
Filing Dt:
07/28/2000
Title:
Low-power DC voltage generator system
36
Patent #:
6567718
Issue Dt:
05/20/2003
Application #:
09627874
Filing Dt:
07/28/2000
Title:
METHOD AND APPARATUS FOR MONITORING CONSUMABLE PERFORMANCE
37
Patent #:
6372584
Issue Dt:
04/16/2002
Application #:
09628382
Filing Dt:
08/01/2000
Title:
METHOD FOR MAKING RAISED SOURCE/DRAIN REGIONS USING LASER
38
Patent #:
6426301
Issue Dt:
07/30/2002
Application #:
09628822
Filing Dt:
07/31/2000
Title:
REDUCTION OF VIA ETCH CHARGING DAMAGE THROUGH THE USE OF A CONDUCTING HARD MASK
39
Patent #:
6380040
Issue Dt:
04/30/2002
Application #:
09629883
Filing Dt:
08/01/2000
Title:
PREVENTION OF DOPANT OUT-DIFFUSION DURING SILICIDATION AND JUNCTION FORMATION
40
Patent #:
6382395
Issue Dt:
05/07/2002
Application #:
09632499
Filing Dt:
08/03/2000
Title:
Method and system for package orientation checking for laser mark operations
41
Patent #:
6429484
Issue Dt:
08/06/2002
Application #:
09633208
Filing Dt:
08/07/2000
Title:
MULTIPLE ACTIVE LAYER STRUCTURE AND A METHOD OF MAKING SUCH A STRUCTURE
42
Patent #:
6348142
Issue Dt:
02/19/2002
Application #:
09633620
Filing Dt:
08/07/2000
Title:
Electroplating multi-trace circuit board substrates using single tie bar
43
Patent #:
6465852
Issue Dt:
10/15/2002
Application #:
09633960
Filing Dt:
08/08/2000
Title:
SILICON WAFER INCLUDING BOTH BULK AND SOI REGIONS AND METHOD FOR FORMING SAME ON A BULK SILICON WAFER
44
Patent #:
6380047
Issue Dt:
04/30/2002
Application #:
09634990
Filing Dt:
08/08/2000
Title:
Shallow trench isolation formation with two source/drain masks and simplified planarization mask
45
Patent #:
6437404
Issue Dt:
08/20/2002
Application #:
09636239
Filing Dt:
08/10/2000
Title:
SEMICONDUCTOR-ON-INSULATOR TRANSISTOR WITH RECESSED SOURCE AND DRAIN
46
Patent #:
6332989
Issue Dt:
12/25/2001
Application #:
09636516
Filing Dt:
08/10/2000
Title:
Slurry for chemical mechanical polishing of copper
47
Patent #:
6963565
Issue Dt:
11/08/2005
Application #:
09637015
Filing Dt:
08/14/2000
Title:
APPARATUS AND METHOD FOR IDENTIFYING DATA PACKET AT WIRE RATE ON A NETWORK SWITCH PORT
48
Patent #:
6708073
Issue Dt:
03/16/2004
Application #:
09637100
Filing Dt:
08/10/2000
Title:
LOT SPECIFIC PROCESS DESIGN METHODOLOGY
49
Patent #:
6639304
Issue Dt:
10/28/2003
Application #:
09638729
Filing Dt:
08/14/2000
Title:
BALL GRID ARRAY MODULE
50
Patent #:
6391521
Issue Dt:
05/21/2002
Application #:
09639784
Filing Dt:
08/16/2000
Title:
RESIST COMPOSITIONS CONTAINING BULKY ANHYDRIDE ADDITIVES
51
Patent #:
6627391
Issue Dt:
09/30/2003
Application #:
09639785
Filing Dt:
08/16/2000
Title:
RESIST COMPOSITIONS CONTAINING LACTONE ADDITIVES
52
Patent #:
6391750
Issue Dt:
05/21/2002
Application #:
09639799
Filing Dt:
08/17/2000
Title:
METHOD OF SELECTIVELY CONTROLLING CONTACT RESISTANCE BY CONTROLLING IMPURITY CONCENTRATION AND SILICIDE THICKNESS
53
Patent #:
6319834
Issue Dt:
11/20/2001
Application #:
09639812
Filing Dt:
08/17/2000
Title:
Method and apparatus for improved planarity metallization by electroplating and CMP
54
Patent #:
6518173
Issue Dt:
02/11/2003
Application #:
09640081
Filing Dt:
08/17/2000
Title:
AVOIDING FLUORINE CONTAMINATION OF COPPER INTERCONNECTS
55
Patent #:
6444550
Issue Dt:
09/03/2002
Application #:
09640177
Filing Dt:
08/17/2000
Title:
LASER TAILORING RETROGRADE CHANNEL PROFILE IN SURFACES
56
Patent #:
6335239
Issue Dt:
01/01/2002
Application #:
09641205
Filing Dt:
08/18/2000
Title:
MANUFACTURIMG A DRAM CELL HAVING AN ANNULAR SIGNAL TRANSFER REGION
57
Patent #:
6383906
Issue Dt:
05/07/2002
Application #:
09641436
Filing Dt:
08/18/2000
Title:
Method of forming junction-leakage free metal salicide in a semiconductor wafer with ultra-low silicon consumption
58
Patent #:
6369429
Issue Dt:
04/09/2002
Application #:
09641727
Filing Dt:
08/21/2000
Title:
LOW RESISTANCE COMPOSITE CONTACT STRUCTURE UTILIZING A REACTION BARRIER LAYER UNDER A METAL LAYER
59
Patent #:
6358832
Issue Dt:
03/19/2002
Application #:
09641834
Filing Dt:
08/18/2000
Title:
METHOD OF FORMING BARRIER LAYERS FOR DAMASCENE INTERCONNECTS
60
Patent #:
6367679
Issue Dt:
04/09/2002
Application #:
09642831
Filing Dt:
08/22/2000
Title:
DETECTION OF FLUX RESIDUE
61
Patent #:
6258612
Issue Dt:
07/10/2001
Application #:
09642832
Filing Dt:
08/22/2000
Title:
Determination of flux prior to package assembly
62
Patent #:
6614121
Issue Dt:
09/02/2003
Application #:
09643072
Filing Dt:
08/21/2000
Title:
VERTICAL CACHE CONFIGURATION
63
Patent #:
6313019
Issue Dt:
11/06/2001
Application #:
09643343
Filing Dt:
08/22/2000
Title:
Y-gate formation using damascene processing
64
Patent #:
6403456
Issue Dt:
06/11/2002
Application #:
09643611
Filing Dt:
08/22/2000
Title:
T OR T/Y GATE FORMATION USING TRIM ETCH PROCESSING
65
Patent #:
6538295
Issue Dt:
03/25/2003
Application #:
09645499
Filing Dt:
08/25/2000
Title:
SALICIDE DEVICE WITH BORDERLESS CONTACT BACKGROUND OF THE INVENTION
66
Patent #:
6521486
Issue Dt:
02/18/2003
Application #:
09645923
Filing Dt:
08/24/2000
Title:
METHOD AND SYSTEM TO REDUCE SWITCHING SIGNAL NOISE ON A DEVICE AND A DEVICE AS RESULT THEREOF
67
Patent #:
6312791
Issue Dt:
11/06/2001
Application #:
09648862
Filing Dt:
08/25/2000
Title:
Multilayer ceramic substrate with anchored pad
68
Patent #:
6518903
Issue Dt:
02/11/2003
Application #:
09649733
Filing Dt:
08/28/2000
Title:
ANALOG-TO-DIGITAL CONVERTER
69
Patent #:
6545935
Issue Dt:
04/08/2003
Application #:
09650011
Filing Dt:
08/29/2000
Title:
DUAL-PORT DRAM ARCHITECTURE SYSTEM
70
Patent #:
6654925
Issue Dt:
11/25/2003
Application #:
09650153
Filing Dt:
08/29/2000
Title:
METHOD TO DETERMINE RETRIES FOR PARALLEL ECC CORRECTION IN A PIPELINE
71
Patent #:
6557151
Issue Dt:
04/29/2003
Application #:
09650399
Filing Dt:
08/29/2000
Title:
DISTRIBUTED STATIC TIMING ANALYSIS
72
Patent #:
6605855
Issue Dt:
08/12/2003
Application #:
09650538
Filing Dt:
08/30/2000
Title:
CVD PLASMA PROCESS TO FILL CONTACT HOLE IN DAMASCENE PROCESS
73
Patent #:
6487706
Issue Dt:
11/26/2002
Application #:
09651464
Filing Dt:
08/30/2000
Title:
CONTRACT METHODOLOGY FOR CONCURRENT HIERARCHICAL DESIGN
74
Patent #:
6449170
Issue Dt:
09/10/2002
Application #:
09651893
Filing Dt:
08/30/2000
Title:
INTEGRATED CIRCUIT PACKAGE INCORPORATING CAMOUFLAGED PROGRAMMABLE ELEMENTS
75
Patent #:
6370012
Issue Dt:
04/09/2002
Application #:
09652596
Filing Dt:
08/30/2000
Title:
CAPACITOR LAMINATE FOR USE IN PRINTED CIRCUIT BOARD AND AS AN INTERCONNECTOR
76
Patent #:
6760852
Issue Dt:
07/06/2004
Application #:
09652647
Filing Dt:
08/31/2000
Title:
SYSTEM AND METHOD FOR MONITOING AND CONTROLLING A POWER-MANAGEABLE RESOURCE BASED UPON ACTIVITIES OF A PLURALITY OF DEVICES
77
Patent #:
6413852
Issue Dt:
07/02/2002
Application #:
09652754
Filing Dt:
08/31/2000
Title:
METHOD OF FORMING MULTILEVEL INTERCONNECT STRUCTURE CONTAINING AIR GAPS INCLUDING UTILIZING BOTH SACRIFICIAL AND PLACEHOLDER MATERIAL
78
Patent #:
6473174
Issue Dt:
10/29/2002
Application #:
09653435
Filing Dt:
09/01/2000
Title:
RESIST REMOVAL MONITORING BY RAMAN SPECTROSCOPY
79
Patent #:
6521328
Issue Dt:
02/18/2003
Application #:
09654963
Filing Dt:
09/05/2000
Title:
COPPER ETCHING COMPOSITIONS AND PRODUCTS DERIVED THEREFROM
80
Patent #:
6387806
Issue Dt:
05/14/2002
Application #:
09655700
Filing Dt:
09/06/2000
Title:
FILLING AN INTERCONNECT OPENING WITH DIFFERENT TYPES OF ALLOYS TO ENHANCE INTERCONNECT RELIABILITY
81
Patent #:
6472751
Issue Dt:
10/29/2002
Application #:
09656437
Filing Dt:
09/06/2000
Title:
H2 DIFFUSION BARRIER FORMATION BY NITROGEN INCORPORATION IN OXIDE LAYER
82
Patent #:
6534848
Issue Dt:
03/18/2003
Application #:
09657194
Filing Dt:
09/07/2000
Title:
ELECTRICAL COUPLING OF A STIFFENER TO A CHIP CARRIER
83
Patent #:
6512269
Issue Dt:
01/28/2003
Application #:
09657315
Filing Dt:
09/07/2000
Title:
HIGH-VOLTAGE HIGH-SPEED SOI MOSFET
84
Patent #:
6368963
Issue Dt:
04/09/2002
Application #:
09660396
Filing Dt:
09/12/2000
Title:
PASSIVATION OF SEMICONDUCTOR DEVICE SURFACES USING AN IODINE/ETHANOL SOLUTION
85
Patent #:
6555397
Issue Dt:
04/29/2003
Application #:
09660723
Filing Dt:
09/13/2000
Title:
DRY ISOTROPIC REMOVAL OF INORGANIC ANTI-REFLECTIVE COATING AFTER POLY GATE ETCHING
86
Patent #:
6365481
Issue Dt:
04/02/2002
Application #:
09660724
Filing Dt:
09/13/2000
Title:
Isotropic resistor protect etch to aid in residue removal
87
Patent #:
6492715
Issue Dt:
12/10/2002
Application #:
09660866
Filing Dt:
09/13/2000
Title:
INTEGRATED SEMICONDUCTOR PACKAGE
88
Patent #:
6372659
Issue Dt:
04/16/2002
Application #:
09661041
Filing Dt:
09/14/2000
Title:
FABRICATION OF METAL OXIDE STRUCTURE FOR A GATE DIELECTRIC OF A FIELD EFFECT TRANSISTOR
89
Patent #:
6564171
Issue Dt:
05/13/2003
Application #:
09661694
Filing Dt:
09/14/2000
Title:
METHOD AND APPARATUS FOR PARSING EVENT LOGS TO DETERMINE TOOL OPERABILITY
90
Patent #:
6459480
Issue Dt:
10/01/2002
Application #:
09662016
Filing Dt:
09/14/2000
Title:
MEASUREMENT METHOD OF ZERNIKE COMA ABERRATION COEFFICIENT
91
Patent #:
6579788
Issue Dt:
06/17/2003
Application #:
09664238
Filing Dt:
09/18/2000
Title:
METHOD OF FORMING CONDUCTIVE INTERCONNECTIONS ON AN INTEGRATED CIRCUIT DEVICE
92
Patent #:
6387804
Issue Dt:
05/14/2002
Application #:
09664714
Filing Dt:
09/19/2000
Title:
PASSIVATION OF SIDEWALL SPACERS USING OZONATED WATER
93
Patent #:
6344691
Issue Dt:
02/05/2002
Application #:
09664863
Filing Dt:
09/19/2000
Title:
Barrier materials for metal interconnect in a semiconductor device
94
Patent #:
6329256
Issue Dt:
12/11/2001
Application #:
09666088
Filing Dt:
09/21/2000
Title:
Self-aligned damascene gate formation with low gate resistance
95
Patent #:
6368762
Issue Dt:
04/09/2002
Application #:
09667573
Filing Dt:
09/22/2000
Title:
ACTIVE MASK EXPOSURE COMPENSATION OF UNDERLYING NITRIDE THICKNESS VARIATION TO REDUCE CRITICAL DIMENSION (CD) VARIATION
96
Patent #:
6514833
Issue Dt:
02/04/2003
Application #:
09667600
Filing Dt:
09/22/2000
Title:
METHOD OF INHIBITING LATERAL DIFFUSION BETWEEN ADJACENT WELLS BY INTRODUCING CARBON OR FLUORINE IONS INTO BOTTOM OF STI GROOVE
97
Patent #:
6344396
Issue Dt:
02/05/2002
Application #:
09667601
Filing Dt:
09/22/2000
Title:
Removable spacer technology using ion implantation for forming asymmetric MOS transistors
98
Patent #:
6337260
Issue Dt:
01/08/2002
Application #:
09667602
Filing Dt:
09/22/2000
Title:
Use of knocked-on oxygen atoms for reduction of transient enhanced diffusion
99
Patent #:
6423601
Issue Dt:
07/23/2002
Application #:
09667685
Filing Dt:
09/22/2000
Title:
RETROGRADE WELL STRUCTURE FORMATION BY NITROGEN IMPLANTATION
100
Patent #:
6656019
Issue Dt:
12/02/2003
Application #:
09668142
Filing Dt:
09/25/2000
Title:
GROOVED POLISHING PADS AND METHODS OF USE
Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES INC.
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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