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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
Page 108 of 146
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Patent #:	9087716	Issue Dt:	07/21/2015	Application #:	13942034	Filing Dt:	07/15/2013
Publication #:	US20150014777	Pub Dt:	01/15/2015
Title:	CHANNEL SEMICONDUCTOR ALLOY LAYER GROWTH ADJUSTED BY IMPURITY ION IMPLANTATION

Patent #:	9244830	Issue Dt:	01/26/2016	Application #:	13942048	Filing Dt:	07/15/2013
Publication #:	US20150019833	Pub Dt:	01/15/2015
Title:	HIERARCHICAL CONTENT DEFINED SEGMENTATION OF DATA

Patent #:	8921908	Issue Dt:	12/30/2014	Application #:	13942227	Filing Dt:	07/15/2013
Publication #:	US20130299889	Pub Dt:	11/14/2013
Title:	ON-CHIP CAPACITORS IN COMBINATION WITH CMOS DEVICES ON EXTREMELY THIN SEMICONDUCTOR ON INSULATOR (ETSOI) SUBSTRATES

Patent #:	8785300	Issue Dt:	07/22/2014	Application #:	13942800	Filing Dt:	07/16/2013
Publication #:	US20130299940	Pub Dt:	11/14/2013
Title:	BEOL ANTI-FUSE STRUCTURES FOR GATE LAST SEMICONDUCTOR DEVICES

Patent #:	9064891	Issue Dt:	06/23/2015	Application #:	13942829	Filing Dt:	07/16/2013
Publication #:	US20150024560	Pub Dt:	01/22/2015
Title:	GATE ENCAPSULATION ACHIEVED BY SINGLE-STEP DEPOSITION

Patent #:	9136266	Issue Dt:	09/15/2015	Application #:	13943229	Filing Dt:	07/16/2013
Publication #:	US20150021703	Pub Dt:	01/22/2015
Title:	GATE OXIDE QUALITY FOR COMPLEX MOSFET DEVICES

Patent #:	9275449	Issue Dt:	03/01/2016	Application #:	13943253	Filing Dt:	07/16/2013
Publication #:	US20150023583	Pub Dt:	01/22/2015
Title:	METHODS AND SYSTEMS FOR DETERMINING A DOSE-TO-CLEAR OF A PHOTORESIST

Patent #:	9370125	Issue Dt:	06/14/2016	Application #:	13943295	Filing Dt:	07/16/2013
Publication #:	US20150025690	Pub Dt:	01/22/2015
Title:	HIVE OF SMART DATA CENTER TILES

Patent #:	9401423	Issue Dt:	07/26/2016	Application #:	13943521	Filing Dt:	07/16/2013
Publication #:	US20150021693	Pub Dt:	01/22/2015
Title:	ENHANCING TRANSISTOR PERFORMANCE AND RELIABILITY BY INCORPORATING DEUTERIUM INTO A STRAINED CAPPING LAYER

Patent #:	10170315	Issue Dt:	01/01/2019	Application #:	13943849	Filing Dt:	07/17/2013
Publication #:	US20150024557	Pub Dt:	01/22/2015
Title:	SEMICONDUCTOR DEVICE HAVING LOCAL BURIED OXIDE

Patent #:	9086811	Issue Dt:	07/21/2015	Application #:	13943875	Filing Dt:	07/17/2013
Publication #:	US20150026422	Pub Dt:	01/22/2015
Title:	MANAGING DATA SETS OF A STORAGE SYSTEM

Patent #:	9147680	Issue Dt:	09/29/2015	Application #:	13943944	Filing Dt:	07/17/2013
Publication #:	US20150021694	Pub Dt:	01/22/2015
Title:	INTEGRATED CIRCUITS HAVING REPLACEMENT METAL GATES WITH IMPROVED THRESHOLD VOLTAGE PERFORMANCE AND METHODS FOR FABRICATING THE SAME

Patent #:	9293586	Issue Dt:	03/22/2016	Application #:	13944048	Filing Dt:	07/17/2013
Publication #:	US20150021695	Pub Dt:	01/22/2015
Title:	EPITAXIAL BLOCK LAYER FOR A FIN FIELD EFFECT TRANSISTOR DEVICE

Patent #:	9240342	Issue Dt:	01/19/2016	Application #:	13944200	Filing Dt:	07/17/2013
Publication #:	US20150024573	Pub Dt:	01/22/2015
Title:	METHODS OF FORMING REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE BY PERFORMING A REPLACEMENT GROWTH PROCESS

Patent #:	9293333	Issue Dt:	03/22/2016	Application #:	13944403	Filing Dt:	07/17/2013
Publication #:	US20150021704	Pub Dt:	01/22/2015
Title:	FINFET WORK FUNCTION METAL FORMATION

Patent #:	8742511	Issue Dt:	06/03/2014	Application #:	13944480	Filing Dt:	07/17/2013
Publication #:	US20130306935	Pub Dt:	11/21/2013
Title:	DOUBLE GATE PLANAR FIELD EFFECT TRANSISTORS

Patent #:	9088574	Issue Dt:	07/21/2015	Application #:	13945010	Filing Dt:	07/18/2013
Publication #:	US20150026826	Pub Dt:	01/22/2015
Title:	SUBSCRIBER IDENTITY MODULE-BASED AUTHENTICATION OF A WIRELESS DEVICE AND APPLICATIONS STORED THEREON

Patent #:	9054041	Issue Dt:	06/09/2015	Application #:	13945144	Filing Dt:	07/18/2013
Publication #:	US20150024578	Pub Dt:	01/22/2015
Title:	METHODS FOR ETCHING DIELECTRIC MATERIALS IN THE FABRICATION OF INTEGRATED CIRCUITS

Patent #:	9338528	Issue Dt:	05/10/2016	Application #:	13945268	Filing Dt:	07/18/2013
Publication #:	US20150023661	Pub Dt:	01/22/2015
Title:	OPTIMAL POSITIONING OF REFLECTING OPTICAL DEVICES

Patent #:	9666684	Issue Dt:	05/30/2017	Application #:	13945281	Filing Dt:	07/18/2013
Publication #:	US20150021662	Pub Dt:	01/22/2015
Title:	III-V SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED CONTACTS

Patent #:	9128078	Issue Dt:	09/08/2015	Application #:	13945295	Filing Dt:	07/18/2013
Publication #:	US20140377900	Pub Dt:	12/25/2014
Title:	MANUFACTURABLE SUB-3 NANOMETER PALLADIUM GAP DEVICES FOR FIXED ELECTRODE TUNNELING RECOGNITION

Patent #:	9203740	Issue Dt:	12/01/2015	Application #:	13945348	Filing Dt:	07/18/2013
Publication #:	US20150023151	Pub Dt:	01/22/2015
Title:	AUTOMATED NETWORK FAULT LOCATION

Patent #:	9349730	Issue Dt:	05/24/2016	Application #:	13945415	Filing Dt:	07/18/2013
Publication #:	US20150021690	Pub Dt:	01/22/2015
Title:	FIN TRANSFORMATION PROCESS AND ISOLATION STRUCTURES FACILITATING DIFFERENT FIN ISOLATION SCHEMES

Patent #:	9093496	Issue Dt:	07/28/2015	Application #:	13945445	Filing Dt:	07/18/2013
Publication #:	US20150024572	Pub Dt:	01/22/2015
Title:	PROCESS FOR FACILTIATING FIN ISOLATION SCHEMES

Patent #:	9716174	Issue Dt:	07/25/2017	Application #:	13945455	Filing Dt:	07/18/2013
Publication #:	US20150021691	Pub Dt:	01/22/2015
Title:	ELECTRICAL ISOLATION OF FINFET ACTIVE REGION BY SELECTIVE OXIDATION OF SACRIFICIAL LAYER

Patent #:	9176869	Issue Dt:	11/03/2015	Application #:	13945494	Filing Dt:	07/18/2013
Publication #:	US20150026428	Pub Dt:	01/22/2015
Title:	MEMORY USE FOR GARBAGE COLLECTED COMPUTER ENVIRONMENTS

Patent #:	9224865	Issue Dt:	12/29/2015	Application #:	13945627	Filing Dt:	07/18/2013
Publication #:	US20150021663	Pub Dt:	01/22/2015
Title:	FINFET WITH INSULATOR UNDER CHANNEL

Patent #:	9275951	Issue Dt:	03/01/2016	Application #:	13945678	Filing Dt:	07/18/2013
Publication #:	US20130307158	Pub Dt:	11/21/2013
Title:	CURVILINEAR WIRING STRUCTURE TO REDUCE AREAS OF HIGH FIELD DENSITY IN AN INTEGRATED CIRCUIT

Patent #:	9172550	Issue Dt:	10/27/2015	Application #:	13946034	Filing Dt:	07/19/2013
Publication #:	US20150023347	Pub Dt:	01/22/2015
Title:	MANAGEMENT OF A MULTICAST SYSTEM IN A SOFTWARE-DEFINED NETWORK

Patent #:	9209274	Issue Dt:	12/08/2015	Application #:	13946103	Filing Dt:	07/19/2013
Publication #:	US20150021712	Pub Dt:	01/22/2015
Title:	HIGHLY CONFORMAL EXTENSION DOPING IN ADVANCED MULTI-GATE DEVICES

Patent #:	8963158	Issue Dt:	02/24/2015	Application #:	13946259	Filing Dt:	07/19/2013
Publication #:	US20130299915	Pub Dt:	11/14/2013
Title:	DESIGN STRUCTURE, STRUCTURE AND METHOD OF LATCH-UP IMMUNITY FOR HIGH AND LOW VOLTAGE INTEGRATED CIRCUITS

Patent #:	9241304	Issue Dt:	01/19/2016	Application #:	13946293	Filing Dt:	07/19/2013
Publication #:	US20130301462	Pub Dt:	11/14/2013
Title:	OPTIMIZATION PROCESS AND SYSTEM FOR A HETEROGENEOUS AD HOC NETWORK

Patent #:	8912597	Issue Dt:	12/16/2014	Application #:	13946362	Filing Dt:	07/19/2013
Publication #:	US20130299903	Pub Dt:	11/14/2013
Title:	SEMICONDUCTOR DEVICE INCLUDING ASYMMETRIC LIGHTLY DOPED DRAIN (LDD) REGION, RELATED METHOD AND DESIGN STRUCTURE

Patent #:	9231074	Issue Dt:	01/05/2016	Application #:	13946379	Filing Dt:	07/19/2013
Publication #:	US20150021738	Pub Dt:	01/22/2015
Title:	BIPOLAR JUNCTION TRANSISTORS WITH AN AIR GAP IN THE SHALLOW TRENCH ISOLATION

Patent #:	9275868	Issue Dt:	03/01/2016	Application #:	13946456	Filing Dt:	07/19/2013
Publication #:	US20150021743	Pub Dt:	01/22/2015
Title:	UNIFORM ROUGHNESS ON BACKSIDE OF A WAFER

Patent #:	9202697	Issue Dt:	12/01/2015	Application #:	13946485	Filing Dt:	07/19/2013
Publication #:	US20150024585	Pub Dt:	01/22/2015
Title:	FORMING A GATE BY DEPOSITING A THIN BARRIER LAYER ON A TITANIUM NITRIDE CAP

Patent #:	9059007	Issue Dt:	06/16/2015	Application #:	13946527	Filing Dt:	07/19/2013
Publication #:	US20140361350	Pub Dt:	12/11/2014
Title:	THIN-FILM HYBRID COMPLEMENTARY CIRCUITS

Patent #:	9088297	Issue Dt:	07/21/2015	Application #:	13946719	Filing Dt:	07/19/2013
Publication #:	US20140375483	Pub Dt:	12/25/2014
Title:	HIGH THROUGHPUT DECODING OF VARIABLE LENGTH DATA SYMBOLS

Patent #:	NONE	Issue Dt:		Application #:	13947155	Filing Dt:	07/22/2013
Publication #:	US20150025857	Pub Dt:	01/22/2015
Title:	STATISTICAL POWER ESTIMATION

Patent #:	9337296	Issue Dt:	05/10/2016	Application #:	13947161	Filing Dt:	07/22/2013
Publication #:	US20150021714	Pub Dt:	01/22/2015
Title:	INTEGRATED CIRCUITS HAVING A METAL GATE STRUCTURE AND METHODS FOR FABRICATING THE SAME

Patent #:	8686764	Issue Dt:	04/01/2014	Application #:	13947224	Filing Dt:	07/22/2013
Publication #:	US20130300481	Pub Dt:	11/14/2013
Title:	EDGE SELECTION TECHNIQUES FOR CORRECTING CLOCK DUTY CYCLE

Patent #:	9195470	Issue Dt:	11/24/2015	Application #:	13947250	Filing Dt:	07/22/2013
Publication #:	US20150026450	Pub Dt:	01/22/2015
Title:	Dynamic Data Dimensioning by Partial Reconfiguration of Single or Multiple Field-Programmable Gate Arrays Using Bootstraps

Patent #:	9209086	Issue Dt:	12/08/2015	Application #:	13947316	Filing Dt:	07/22/2013
Publication #:	US20150021715	Pub Dt:	01/22/2015
Title:	Low Temperature Salicide for Replacement Gate Nanowires

Patent #:	9136330	Issue Dt:	09/15/2015	Application #:	13947439	Filing Dt:	07/22/2013
Publication #:	US20150021702	Pub Dt:	01/22/2015
Title:	SHALLOW TRENCH ISOLATION

Patent #:	9171742	Issue Dt:	10/27/2015	Application #:	13947543	Filing Dt:	07/22/2013
Publication #:	US20150024549	Pub Dt:	01/22/2015
Title:	ALIGNMENT OF INTEGRATED CIRCUIT CHIP STACK

Patent #:	8629701	Issue Dt:	01/14/2014	Application #:	13947664	Filing Dt:	07/22/2013
Publication #:	US20130307588	Pub Dt:	11/21/2013
Title:	PLL BANDWIDTH CORRECTION WITH OFFSET COMPENSATION

Patent #:	9153498	Issue Dt:	10/06/2015	Application #:	13947670	Filing Dt:	07/22/2013
Publication #:	US20150021683	Pub Dt:	01/22/2015
Title:	METHODS OF FORMING SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT ELEMENTS AND THE RESULTING DEVICES

Patent #:	9013001	Issue Dt:	04/21/2015	Application #:	13947677	Filing Dt:	07/22/2013
Publication #:	US20130307077	Pub Dt:	11/21/2013
Title:	STRESS-GENERATING SHALLOW TRENCH ISOLATION STRUCTURE HAVING DUAL COMPOSITION

Patent #:	9507599	Issue Dt:	11/29/2016	Application #:	13947734	Filing Dt:	07/22/2013
Publication #:	US20150026435	Pub Dt:	01/22/2015
Title:	INSTRUCTION SET ARCHITECTURE WITH EXTENSIBLE REGISTER ADDRESSING

Patent #:	9274591	Issue Dt:	03/01/2016	Application #:	13947875	Filing Dt:	07/22/2013
Publication #:	US20150026500	Pub Dt:	01/22/2015
Title:	GENERAL PURPOSE PROCESSING UNIT WITH LOW POWER DIGITAL SIGNAL PROCESSING (DSP) MODE

Patent #:	8692276	Issue Dt:	04/08/2014	Application #:	13947906	Filing Dt:	07/22/2013
Publication #:	US20130308900	Pub Dt:	11/21/2013
Title:	PARALLEL OPTICAL TRANSCEIVER MODULE

Patent #:	9128740	Issue Dt:	09/08/2015	Application #:	13948146	Filing Dt:	07/22/2013
Publication #:	US20150026419	Pub Dt:	01/22/2015
Title:	OPERATING SYSTEM VIRTUALIZATION FOR HOST CHANNEL ADAPTERS

Patent #:	8772906	Issue Dt:	07/08/2014	Application #:	13948166	Filing Dt:	07/22/2013
Publication #:	US20130299768	Pub Dt:	11/14/2013
Title:	THERMALLY INSULATED PHASE CHANGE MATERIAL CELLS

Patent #:	8856715	Issue Dt:	10/07/2014	Application #:	13948249	Filing Dt:	07/23/2013
Title:	CAPACITOR DESIGNS FOR INTEGRATED CIRCUITS UTILIZING SELF-ALIGNED DOUBLE PATTERNING (SADP)

Patent #:	9089043	Issue Dt:	07/21/2015	Application #:	13948308	Filing Dt:	07/23/2013
Publication #:	US20150029687	Pub Dt:	01/29/2015
Title:	DEVICE FOR ATTENUATING PROPAGATION AND RECEPTION OF ELECTROMAGNETIC INTERFERENCE FOR A PCB-CHASSIS STRUCTURE

Patent #:	9293587	Issue Dt:	03/22/2016	Application #:	13948374	Filing Dt:	07/23/2013
Publication #:	US20150028348	Pub Dt:	01/29/2015
Title:	FORMING EMBEDDED SOURCE AND DRAIN REGIONS TO PREVENT BOTTOM LEAKAGE IN A DIELECTRICALLY ISOLATED FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE

Patent #:	9678885	Issue Dt:	06/13/2017	Application #:	13948487	Filing Dt:	07/23/2013
Publication #:	US20150032988	Pub Dt:	01/29/2015
Title:	REGULAR EXPRESSION MEMORY REGION WITH INTEGRATED REGULAR EXPRESSION ENGINE

Patent #:	9172371	Issue Dt:	10/27/2015	Application #:	13948567	Filing Dt:	07/23/2013
Publication #:	US20130307580	Pub Dt:	11/21/2013
Title:	MAJORITY DOMINANT POWER SCHEME FOR REPEATED STRUCTURES AND STRUCTURES THEREOF

Patent #:	9716207	Issue Dt:	07/25/2017	Application #:	13948645	Filing Dt:	07/23/2013
Publication #:	US20150027521	Pub Dt:	01/29/2015
Title:	LOW REFLECTION ELECTRODE FOR PHOTOVOLTAIC DEVICES

Patent #:	9203022	Issue Dt:	12/01/2015	Application #:	13948723	Filing Dt:	07/23/2013
Publication #:	US20150028279	Pub Dt:	01/29/2015
Title:	RESISTIVE RANDOM ACCESS MEMORY DEVICES WITH EXTREMELY REACTIVE CONTACTS

Patent #:	9524166	Issue Dt:	12/20/2016	Application #:	13948800	Filing Dt:	07/23/2013
Publication #:	US20150032997	Pub Dt:	01/29/2015
Title:	TRACKING LONG GHV IN HIGH PERFORMANCE OUT-OF-ORDER SUPERSCALAR PROCESSORS

Patent #:	9058250	Issue Dt:	06/16/2015	Application #:	13948811	Filing Dt:	07/23/2013
Publication #:	US20150033081	Pub Dt:	01/29/2015
Title:	IN-SITU COMPUTING SYSTEM FAILURE AVOIDANCE

Patent #:	8963620	Issue Dt:	02/24/2015	Application #:	13948912	Filing Dt:	07/23/2013
Publication #:	US20150028937	Pub Dt:	01/29/2015
Title:	CONTROLLING CIRCUIT VOLTAGE AND FREQUENCY BASED UPON LOCATION-DEPENDENT TEMPERATURE

Patent #:	8847348	Issue Dt:	09/30/2014	Application #:	13949219	Filing Dt:	07/23/2013
Publication #:	US20140008758	Pub Dt:	01/09/2014
Title:	COMPLEMENTARY BIPOLAR INVERTER

Patent #:	9059123	Issue Dt:	06/16/2015	Application #:	13949498	Filing Dt:	07/24/2013
Publication #:	US20150028289	Pub Dt:	01/29/2015
Title:	ACTIVE MATRIX USING HYBRID INTEGRATED CIRCUIT AND BIPOLAR TRANSISTOR

Patent #:	9105707	Issue Dt:	08/11/2015	Application #:	13949609	Filing Dt:	07/24/2013
Publication #:	US20150028397	Pub Dt:	01/29/2015
Title:	ZRAM HETEROCHANNEL MEMORY

Patent #:	9377431	Issue Dt:	06/28/2016	Application #:	13949824	Filing Dt:	07/24/2013
Publication #:	US20150028845	Pub Dt:	01/29/2015
Title:	HETEROJUNCTION NANOPORE FOR SEQUENCING

Patent #:	9407066	Issue Dt:	08/02/2016	Application #:	13949973	Filing Dt:	07/24/2013
Publication #:	US20150030047	Pub Dt:	01/29/2015
Title:	III-V LASERS WITH INTEGRATED SILICON PHOTONIC CIRCUITS

Patent #:	9831026	Issue Dt:	11/28/2017	Application #:	13950027	Filing Dt:	07/24/2013
Publication #:	US20150028979	Pub Dt:	01/29/2015
Title:	HIGH EFFICIENCY ON-CHIP 3D TRANSFORMER STRUCTURE

Patent #:	9093533	Issue Dt:	07/28/2015	Application #:	13950173	Filing Dt:	07/24/2013
Publication #:	US20150028454	Pub Dt:	01/29/2015
Title:	FINFET STRUCTURES HAVING SILICON GERMANIUM AND SILICON CHANNELS

Patent #:	9336144	Issue Dt:	05/10/2016	Application #:	13950538	Filing Dt:	07/25/2013
Publication #:	US20150032962	Pub Dt:	01/29/2015
Title:	THREE-DIMENSIONAL PROCESSING SYSTEM HAVING MULTIPLE CACHES THAT CAN BE PARTITIONED, CONJOINED, AND MANAGED ACCORDING TO MORE THAN ONE SET OF RULES AND/OR CONFIGURATIONS

Patent #:	9041060	Issue Dt:	05/26/2015	Application #:	13950758	Filing Dt:	07/25/2013
Publication #:	US20150028387	Pub Dt:	01/29/2015
Title:	III-V FET DEVICE WITH OVERLAPPED EXTENSION REGIONS USING GATE LAST

Patent #:	9059271	Issue Dt:	06/16/2015	Application #:	13950777	Filing Dt:	07/25/2013
Publication #:	US20130309830	Pub Dt:	11/21/2013
Title:	SELF-ALIGNED III-V MOSFET FABRICATION WITH IN-SITU III-V EPITAXY AND IN-SITU METAL EPITAXY AND CONTACT FORMATION

Patent #:	9041061	Issue Dt:	05/26/2015	Application #:	13950788	Filing Dt:	07/25/2013
Publication #:	US20150028388	Pub Dt:	01/29/2015
Title:	III-V DEVICE WITH OVERLAPPED EXTENSION REGIONS USING REPLACEMENT GATE

Patent #:	9455577	Issue Dt:	09/27/2016	Application #:	13950818	Filing Dt:	07/25/2013
Publication #:	US20150032278	Pub Dt:	01/29/2015
Title:	MANAGING DEVICES WITHIN MICRO-GRIDS

Patent #:	9059272	Issue Dt:	06/16/2015	Application #:	13950841	Filing Dt:	07/25/2013
Publication #:	US20130307089	Pub Dt:	11/21/2013
Title:	Self-Aligned III-V MOSFET Fabrication With In-Situ III-V Epitaxy And In-Situ Metal Epitaxy And Contact Formation

Patent #:	9171663	Issue Dt:	10/27/2015	Application #:	13950947	Filing Dt:	07/25/2013
Publication #:	US20150028987	Pub Dt:	01/29/2015
Title:	HIGH EFFICIENCY ON-CHIP 3D TRANSFORMER STRUCTURE

Patent #:	9280463	Issue Dt:	03/08/2016	Application #:	13951207	Filing Dt:	07/25/2013
Publication #:	US20150032939	Pub Dt:	01/29/2015
Title:	SEMICONDUCTOR MEMORY GARBAGE COLLECTION

Patent #:	9535794	Issue Dt:	01/03/2017	Application #:	13951528	Filing Dt:	07/26/2013
Publication #:	US20150033072	Pub Dt:	01/29/2015
Title:	MONITORING HIERARCHICAL CONTAINER-BASED SOFTWARE SYSTEMS

Patent #:	9159667	Issue Dt:	10/13/2015	Application #:	13951654	Filing Dt:	07/26/2013
Publication #:	US20150028447	Pub Dt:	01/29/2015
Title:	METHODS OF FORMING AN E-FUSE FOR AN INTEGRATED CIRCUIT PRODUCT AND THE RESULTING E-FUSE STRUCTURE

Patent #:	8904327	Issue Dt:	12/02/2014	Application #:	13951693	Filing Dt:	07/26/2013
Publication #:	US20140033153	Pub Dt:	01/30/2014
Title:	ASSISTING IN LOGIC CIRCUIT DESIGN TO PLACE CELLS ON AN IC SUBSTRATE AND OPTIMIZE WIRING

Patent #:	9047930	Issue Dt:	06/02/2015	Application #:	13951801	Filing Dt:	07/26/2013
Publication #:	US20150029803	Pub Dt:	01/29/2015
Title:	SINGLE-ENDED LOW-SWING POWER-SAVINGS MECHANISM WITH PROCESS COMPENSATION

Patent #:	9136223	Issue Dt:	09/15/2015	Application #:	13952231	Filing Dt:	07/26/2013
Publication #:	US20150028500	Pub Dt:	01/29/2015
Title:	FORMING ALIGNMENT MARK AND RESULTING MARK

Patent #:	9563371	Issue Dt:	02/07/2017	Application #:	13952279	Filing Dt:	07/26/2013
Publication #:	US20150032979	Pub Dt:	01/29/2015
Title:	SELF-ADJUSTING PHASE CHANGE MEMORY STORAGE MODULE

Patent #:	8653624	Issue Dt:	02/18/2014	Application #:	13952792	Filing Dt:	07/29/2013
Publication #:	US20130307114	Pub Dt:	11/21/2013
Title:	SEMICONDUCTOR DEVICE COMPRISING METAL-BASED eFUSES OF ENHANCED PROGRAMMING EFFICIENCY BY ENHANCING METAL AGGLOMERATION AND/OR VOIDING

Patent #:	9209094	Issue Dt:	12/08/2015	Application #:	13952993	Filing Dt:	07/29/2013
Publication #:	US20150028419	Pub Dt:	01/29/2015
Title:	FIN FIELD EFFECT TRANSISTOR WITH DIELECTRIC ISOLATION AND ANCHORED STRESSOR ELEMENTS

Patent #:	9093534	Issue Dt:	07/28/2015	Application #:	13953024	Filing Dt:	07/29/2013
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Title:	DIELECTRIC FILLER FINS FOR PLANAR TOPOGRAPHY IN GATE LEVEL

Patent #:	9358618	Issue Dt:	06/07/2016	Application #:	13953045	Filing Dt:	07/29/2013
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Title:	IMPLEMENTING REDUCED DRILL SMEAR

Patent #:	8906799	Issue Dt:	12/09/2014	Application #:	13953058	Filing Dt:	07/29/2013
Title:	RANDOM LOCAL METAL CAP LAYER FORMATION FOR IMPROVED INTEGRATED CIRCUIT RELIABILITY

Patent #:	8698243	Issue Dt:	04/15/2014	Application #:	13953349	Filing Dt:	07/29/2013
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Title:	SEMICONDUCTOR DEVICE WITH STRAIN-INDUCING REGIONS AND METHOD THEREOF

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Title:	SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICE STRUCTURES

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Title:	NITRIDE SPACER FOR PROTECTING A FIN-SHAPED FIELD EFFECT TRANSISTOR (FINFET) DEVICE

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Title:	METHODS AND SYSTEMS FOR DESIGNING AND MANUFACTURING OPTICAL LITHOGRAPHY MASKS

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Title:	INTEGRATED CIRCUITS HAVING FINFETS WITH IMPROVED DOPED CHANNEL REGIONS AND METHODS FOR FABRICATING SAME

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Title:	METHODS OF FORMING ARTICLES INCLUDING METAL STRUCTURES HAVING MAXIMIZED BOND ADHESION AND BOND RELIABILITY

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Title:	SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN FORMED ON BULK AND GATE CHANNEL FORMED ON OXIDE LAYER

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Title:	REDUCED SPACER THICKNESS IN SEMICONDUCTOR DEVICE FABRICATION

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Title:	DISCRIMINATING SYNONYMOUS EXPRESSIONS USING IMAGES

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Title:	Method and Apparatus for Optimal Cache Sizing and Configuration for Large Memory Systems

100

Patent #:	9075948	Issue Dt:	07/07/2015	Application #:	13955244	Filing Dt:	07/31/2013
Publication #:	US20150040095	Pub Dt:	02/05/2015
Title:	Method of Improving Timing Critical Cells For Physical Design In The Presence Of Local Placement Congestion

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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