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06/16/2015
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14030414
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09/18/2013
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01/16/2014
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10/03/2017
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09/18/2013
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03/19/2015
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06/16/2015
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14030506
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09/18/2013
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03/19/2015
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12/01/2015
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09/18/2013
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03/19/2015
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10/23/2014
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01/13/2015
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09/18/2013
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09/18/2014
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12/29/2015
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09/18/2013
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03/19/2015
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06/02/2015
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14031202
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09/19/2013
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03/19/2015
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INTERDIGITATED FINFETS
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07/21/2015
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14031367
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09/19/2013
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03/05/2015
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02/02/2016
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09/19/2013
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03/05/2015
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05/26/2015
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09/19/2013
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03/19/2015
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07/26/2016
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09/19/2013
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03/19/2015
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05/10/2016
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09/19/2013
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12/11/2014
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11/03/2015
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09/19/2013
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01/15/2015
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08/04/2015
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09/19/2013
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01/15/2015
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06/02/2015
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09/20/2013
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03/26/2015
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08/25/2015
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09/20/2013
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03/26/2015
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12/22/2015
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09/20/2013
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01/23/2014
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12/30/2014
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09/20/2013
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02/27/2014
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07/28/2015
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09/20/2013
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03/26/2015
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07/21/2015
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14032778
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09/20/2013
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03/26/2015
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GROUNDED BELT AND MOVABLE DRAWER APPARATUS
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08/11/2015
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14032998
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09/20/2013
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03/26/2015
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TRANSFERABLE TRANSPARENT CONDUCTIVE OXIDE
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08/09/2016
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14033593
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09/23/2013
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03/26/2015
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DIFFERENTIAL DOSE AND FOCUS MONITOR
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11/17/2015
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14033616
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09/23/2013
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03/26/2015
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PASSWORD ENTRY FOR DOUBLE SIDED MULTI-TOUCH DISPLAY
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07/21/2015
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14033626
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09/23/2013
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12/25/2014
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03/15/2016
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14033762
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09/23/2013
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03/26/2015
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08/18/2015
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14033789
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09/23/2013
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03/26/2015
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08/04/2015
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14034594
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09/24/2013
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03/26/2015
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METHOD AND SYSTEM FOR USING A VIBRATION SIGNATURE AS AN AUTHENTICATION KEY
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01/06/2015
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14034660
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09/24/2013
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01/16/2014
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OPTIMIZED BUFFER PLACEMENT BASED ON TIMING AND CAPACITANCE ASSERTIONS
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07/21/2015
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14034970
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09/24/2013
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03/26/2015
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MARGIN IMPROVEMENT FOR CONFIGURABLE LOCAL CLOCK BUFFER
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12/02/2014
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09/24/2013
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Gate-All-Around Nanowire MOSFET and Method of Formation
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06/16/2015
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14035125
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09/24/2013
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03/27/2014
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05/03/2016
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14035222
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09/24/2013
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03/26/2015
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DERIVATION OF GENERALIZED TEST CASES
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02/24/2015
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14035329
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09/24/2013
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METHODS OF GENERATING CIRCUIT LAYOUTS THAT ARE TO BE MANUFACTURED USING SADP TECHNIQUES
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12/08/2015
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14035349
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09/24/2013
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12/25/2014
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COHERENT ATTACHED PROCESSOR PROXY HAVING HYBRID DIRECTORY
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11/10/2015
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14036070
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09/25/2013
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03/26/2015
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Method and System for Identifying and Visualizing Work Transfers Using Financial Data
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10/27/2015
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14036205
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09/25/2013
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03/26/2015
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SPEED OF LIGHT BASED OSCILLATOR FREQUENCY
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06/16/2015
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14036375
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09/25/2013
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01/23/2014
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SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURE WITH SELECTIVELY PLACED SUB-INSULATOR LAYER VOID(S) AND METHOD OF FORMING THE SOI STRUCTURE
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06/23/2015
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14036393
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09/25/2013
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06/19/2014
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ELECTROSTATIC DISCHARGE RESISTANT DIODES
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10/14/2014
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14036474
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09/25/2013
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01/23/2014
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CREATING DEEP TRENCHES ON UNDERLYING SUBSTRATE
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01/03/2017
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14036665
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09/25/2013
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03/26/2015
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DATA CENTER COOLING WITH CRITICAL DEVICE PRIORITIZATION
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05/17/2016
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14036676
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09/25/2013
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03/12/2015
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WAVELENGTH DIVISION MULTIPLEXING WITH MULTI-CORE FIBER
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03/15/2016
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14036965
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09/25/2013
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03/26/2015
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METHOD AND SYSTEM FOR AUTOMATIC SPACE ORGANIZATION IN TIER2 SOLID STATE DRIVE (SSD) CACHE IN DATABASES FOR MULTI PAGE SUPPORT
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06/16/2015
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14037334
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09/25/2013
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09/18/2014
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SELF ALIGNED CAPACITOR FABRICATION
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02/23/2016
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14037423
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09/26/2013
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03/26/2015
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Silicon Nitride Layer Deposited at Low Temperature to Prevent Gate Dielectric Regrowth High-K Metal Gate Field Effect Transistors
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09/27/2016
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14037550
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09/26/2013
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03/26/2015
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INTEGRATED CIRCUITS WITH RADIOACTIVE SOURCE MATERIAL AND RADIATION DETECTION
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06/28/2016
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14037768
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09/26/2013
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03/26/2015
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EOS PROTECTION CIRCUIT WITH FET-BASED TRIGGER DIODES
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10/20/2015
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14037774
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09/26/2013
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03/26/2015
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METHODS FOR FABRICATING INTEGRATED CIRCUITS USING IMPROVED MASKS
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08/30/2016
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14037874
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09/26/2013
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03/05/2015
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DNA SEQUENCING USING A SUSPENDED CARBON NANOTUBE
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03/29/2016
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14037879
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09/26/2013
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03/26/2015
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MANAGING HIGH-CONFLICT CACHE LINES IN TRANSACTIONAL MEMORY COMPUTING ENVIRONMENTS
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07/21/2015
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14037891
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09/26/2013
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03/26/2015
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Reordering the Output of Recirculated Transactions Within a Pipeline
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03/29/2016
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14037901
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09/26/2013
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03/26/2015
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IDENTIFYING HIGH-CONFLICT CACHE LINES IN TRANSACTIONAL MEMORY COMPUTING ENVIRONMENTS
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01/26/2016
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14037923
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09/26/2013
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02/19/2015
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MANAGEMENT OF TRANSACTIONAL MEMORY ACCESS REQUESTS BY A CACHE MEMORY
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05/03/2016
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14037925
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09/26/2013
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03/26/2015
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MANAGING HIGH-COHERENCE-MISS CACHE LINES IN MULTI-PROCESSOR COMPUTING ENVIRONMENTS
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07/21/2015
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14037958
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09/26/2013
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03/26/2015
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CENTRALIZED MANAGEMENT OF HIGH-CONTENTION CACHE LINES IN MULTI-PROCESSOR COMPUTING ENVIRONMENTS
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02/21/2017
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14038139
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09/26/2013
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03/26/2015
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GALLIUM NITRIDE MATERIAL AND DEVICE DEPOSITION ON GRAPHENE TERMINATED WAFER AND METHOD OF FORMING THE SAME
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12/22/2015
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14038308
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09/26/2013
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03/26/2015
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ERROR DETECTION AND ISOLATION
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01/03/2017
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14039034
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09/27/2013
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03/26/2015
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DATA CENTER COOLING METHOD WITH CRITICAL DEVICE PRIORITIZATION
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12/23/2014
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14039450
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09/27/2013
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01/30/2014
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THRESHOLD VOLTAGE ADJUSTMENT IN A FIN TRANSISTOR BY CORNER IMPLANTATION
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11/24/2015
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Application #:
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14040784
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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SMART CALENDAR
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Patent #:
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Issue Dt:
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02/28/2017
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14040819
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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DETECTING VULNERABILITY TO RESOURCE EXHAUSTION
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Patent #:
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Issue Dt:
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07/12/2016
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Application #:
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14041010
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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Security Testing Using Semantic Modeling
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14041187
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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SELF-ALIGNED VIAS FORMED USING SACRIFICIAL METAL CAPS
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Patent #:
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Issue Dt:
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08/02/2016
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14041422
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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ON CHIP BIAS TEMPERATURE INSTABILITY CHARACTERIZATION OF A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14041840
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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02/06/2014
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Title:
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Transistor having replacement metal gate and process for fabricating the same
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Patent #:
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Issue Dt:
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11/17/2015
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Application #:
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14041922
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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12/25/2014
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Title:
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NANOGAP DEVICE WITH CAPPED NANOWIRE STRUCTURES
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Patent #:
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Issue Dt:
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04/14/2015
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Application #:
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14041983
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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08/21/2014
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Title:
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MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) CAPACITIVE OHMIC SWITCH AND DESIGN STRUCTURES
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Patent #:
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Issue Dt:
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03/22/2016
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14042083
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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STRING GENERATION TOOL
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Patent #:
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Issue Dt:
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12/15/2015
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Application #:
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14042495
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Filing Dt:
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09/30/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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IDENTIFYING AND RANKING PIRATED MEDIA CONTENT
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Patent #:
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Issue Dt:
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05/26/2015
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Application #:
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14042752
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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01/16/2014
| | | | |
Title:
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GROUNDED LID FOR MICRO-ELECTRONIC ASSEMBLIES
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Patent #:
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Issue Dt:
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03/29/2016
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Application #:
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14042886
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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VERIFICATION OF DYNAMIC LOGICAL PARTITIONING
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Patent #:
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Issue Dt:
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02/23/2016
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14042889
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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03/05/2015
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Title:
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TRENCH SIDEWALL PROTECTION FOR SELECTIVE EPITAXIAL SEMICONDUCTOR MATERIAL FORMATION
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Patent #:
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Issue Dt:
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05/31/2016
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14042951
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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04/02/2015
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Title:
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LATERAL HETEROJUNCTION BIPOLAR TRANSISTOR WITH LOW TEMPERATURE RECESSED CONTACTS
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Patent #:
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Issue Dt:
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11/24/2015
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Application #:
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14043017
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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INTEGRATED CIRCUITS WITH DUAL SILICIDE CONTACTS AND METHODS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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10/03/2017
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14043047
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Filing Dt:
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10/01/2013
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Pub Dt:
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04/02/2015
| | | | |
Title:
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CHIP JOINING BY INDUCTION HEATING
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Patent #:
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Issue Dt:
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09/06/2016
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Application #:
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14043110
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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MEMORY SYSTEM FOR MIRRORING DATA
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Patent #:
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Issue Dt:
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06/24/2014
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Application #:
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14043137
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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01/30/2014
| | | | |
Title:
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UNDERFILL MATERIAL DISPENSING FOR STACKED SEMICONDUCTOR CHIPS
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Patent #:
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Issue Dt:
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05/26/2015
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Application #:
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14043181
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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GATE ELECTRODE WITH A SHRINK SPACER
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Patent #:
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Issue Dt:
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09/29/2015
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Application #:
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14043243
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Filing Dt:
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10/01/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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DEVICES AND METHODS OF FORMING FINFETS WITH SELF ALIGNED FIN FORMATION
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Patent #:
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Issue Dt:
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02/10/2015
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Application #:
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14043251
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Filing Dt:
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10/01/2013
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Title:
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METHODS OF GENERATING CIRCUIT LAYOUTS THAT ARE TO BE MANUFACTURED USING SADP ROUTING TECHNIQUES AND VIRTUAL NON-MANDREL MASK RULES
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Patent #:
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Issue Dt:
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09/27/2016
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Application #:
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14043864
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Filing Dt:
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10/02/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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EXPLAINING PARTIALLY ILLEGAL COMBINATIONS IN COMBINATORIAL MODELS
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Patent #:
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Issue Dt:
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09/12/2017
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Application #:
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14043871
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Filing Dt:
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10/02/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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HARDMASK FOR A HALO/EXTENSION IMPLANT OF A STATIC RANDOM ACCESS MEMORY (SRAM) LAYOUT
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Patent #:
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Issue Dt:
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01/12/2016
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Application #:
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14044120
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Filing Dt:
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10/02/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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METHODS OF FORMING FINFET SEMICONDUCTOR DEVICES USING A REPLACEMENT GATE TECHNIQUE AND THE RESULTING DEVICES
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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14044131
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Filing Dt:
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10/02/2013
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Publication #:
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Pub Dt:
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03/05/2015
| | | | |
Title:
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STACKED NANOWIRE
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Patent #:
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Issue Dt:
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05/19/2015
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Application #:
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14044163
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Filing Dt:
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10/02/2013
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Publication #:
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Pub Dt:
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01/30/2014
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Title:
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STRESS ENHANCED LDMOS TRANSISTOR TO MINIMIZE ON-RESISTANCE AND MAINTAIN HIGH BREAKDOWN VOLTAGE
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Patent #:
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Issue Dt:
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12/08/2015
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Application #:
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14044269
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Filing Dt:
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10/02/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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INDUCTOR STRUCTURE HAVING EMBEDDED AIRGAP
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Patent #:
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Issue Dt:
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09/01/2015
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Application #:
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14044533
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Filing Dt:
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10/02/2013
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Publication #:
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Pub Dt:
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04/02/2015
| | | | |
Title:
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FINFET FABRICATION METHOD
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14045006
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Filing Dt:
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10/03/2013
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Pub Dt:
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04/09/2015
| | | | |
Title:
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DEVICE FOR ATTENUATING PROPAGATION OF ELECTROMAGNETIC EMISSIONS FROM AN ENCLOSURE
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Patent #:
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Issue Dt:
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01/10/2017
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Application #:
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14045007
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Filing Dt:
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10/03/2013
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Title:
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PROCESSING CORE DATA PRODUCED BY A COMPUTER PROCESS
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Patent #:
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Issue Dt:
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07/14/2015
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Application #:
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14045145
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Filing Dt:
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10/03/2013
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Publication #:
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Pub Dt:
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04/09/2015
| | | | |
Title:
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SEMICONDUCTOR ARTICLE HAVING A ZIG-ZAG GUARD RING AND METHOD OF FORMING THE SAME
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Patent #:
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Issue Dt:
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03/01/2016
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14045340
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Filing Dt:
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10/03/2013
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Publication #:
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Pub Dt:
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04/09/2015
| | | | |
Title:
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METHOD AND APPARATUS FOR HIGH YIELD CONTACT INTEGRATION SCHEME
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Patent #:
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Issue Dt:
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11/03/2015
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Application #:
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14045455
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Filing Dt:
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10/03/2013
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Pub Dt:
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04/09/2015
| | | | |
Title:
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SEMICONDUCTOR DEVICE BURN-IN STRESS METHOD AND SYSTEM
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Issue Dt:
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02/23/2016
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14045718
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Filing Dt:
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10/03/2013
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Pub Dt:
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04/09/2015
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Title:
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PRIVACY ENHANCED SPATIAL ANALYTICS
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Issue Dt:
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03/03/2015
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Application #:
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14046069
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10/04/2013
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Pub Dt:
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03/26/2015
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Title:
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GATE-ALL-AROUND NANOWIRE MOSFET AND METHOD OF FORMATION
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Issue Dt:
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01/06/2015
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14046207
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Filing Dt:
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10/04/2013
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Pub Dt:
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01/30/2014
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Title:
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Scheduling for Parallel Processing of Regionally-Constrained Placement Problem
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Issue Dt:
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01/06/2015
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Application #:
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14046218
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Filing Dt:
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10/04/2013
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Pub Dt:
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02/06/2014
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Title:
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HIGH-K TRANSISTORS WITH LOW THRESHOLD VOLTAGE
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Issue Dt:
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05/13/2014
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14046316
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Filing Dt:
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10/04/2013
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Pub Dt:
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01/30/2014
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Title:
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CMOS WITH CHANNEL P-FINFET AND CHANNEL N-FINFET HAVING DIFFERENT CRYSTALLINE ORIENTATIONS AND PARALLEL FINS
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Patent #:
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Issue Dt:
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05/13/2014
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14046340
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Filing Dt:
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10/04/2013
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Pub Dt:
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02/06/2014
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Title:
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CMOS WITH CHANNEL P-FINFET AND CHANNEL N-FINFET HAVING DIFFERENT CRYSTALLINE ORIENTATIONS AND PARALLEL FINS
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Patent #:
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Issue Dt:
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01/23/2018
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14046506
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10/04/2013
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Pub Dt:
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04/09/2015
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Title:
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INTEGRATED WAVEGUIDE STRUCTURE WITH PERFORATED CHIP EDGE SEAL
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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14047071
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10/07/2013
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Pub Dt:
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04/09/2015
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Title:
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IMPLEMENTING ENHANCED NET ROUTING CONGESTION RESOLUTION OF NON-RECTANGULAR OR RECTANGULAR HIERARCHICAL MACROS
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