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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
06/16/2015
Application #:
14030414
Filing Dt:
09/18/2013
Publication #:
Pub Dt:
01/16/2014
Title:
CHARGE BREAKDOWN AVOIDANCE FOR MIM ELEMENTS IN SOI BASE TECHNOLOGY AND METHOD
2
Patent #:
Issue Dt:
10/03/2017
Application #:
14030458
Filing Dt:
09/18/2013
Publication #:
Pub Dt:
03/19/2015
Title:
FIN WIDTH MEASUREMENT USING QUANTUM WELL STRUCTURE
3
Patent #:
Issue Dt:
06/16/2015
Application #:
14030506
Filing Dt:
09/18/2013
Publication #:
Pub Dt:
03/19/2015
Title:
REDUCING GATE EXPANSION AFTER SOURCE AND DRAIN IMPLANT IN GATE LAST PROCESS
4
Patent #:
Issue Dt:
12/01/2015
Application #:
14030540
Filing Dt:
09/18/2013
Publication #:
Pub Dt:
03/19/2015
Title:
METHODS OF FORMING STRESSED LAYERS ON FINFET SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES
5
Patent #:
Issue Dt:
05/17/2016
Application #:
14030655
Filing Dt:
09/18/2013
Publication #:
Pub Dt:
10/23/2014
Title:
LOCAL DIRECT STORAGE CLASS MEMORY ACCESS
6
Patent #:
Issue Dt:
01/13/2015
Application #:
14030738
Filing Dt:
09/18/2013
Publication #:
Pub Dt:
09/18/2014
Title:
FREQUENCY QUADRUPLERS AT MILLIMETER-WAVE FREQUENCIES
7
Patent #:
Issue Dt:
12/29/2015
Application #:
14030744
Filing Dt:
09/18/2013
Publication #:
Pub Dt:
03/19/2015
Title:
ADMINISTERING INTER-CORE COMMUNICATION VIA SHARED MEMORY
8
Patent #:
Issue Dt:
06/02/2015
Application #:
14031202
Filing Dt:
09/19/2013
Publication #:
Pub Dt:
03/19/2015
Title:
INTERDIGITATED FINFETS
9
Patent #:
Issue Dt:
07/21/2015
Application #:
14031367
Filing Dt:
09/19/2013
Publication #:
Pub Dt:
03/05/2015
Title:
Malicious Activity Detection of a Functional Unit
10
Patent #:
Issue Dt:
02/02/2016
Application #:
14031401
Filing Dt:
09/19/2013
Publication #:
Pub Dt:
03/05/2015
Title:
MALICIOUS ACTIVITY DETECTION OF A PROCESSING THREAD
11
Patent #:
Issue Dt:
05/26/2015
Application #:
14031502
Filing Dt:
09/19/2013
Publication #:
Pub Dt:
03/19/2015
Title:
SILICON-ON-NOTHING FINFETS
12
Patent #:
Issue Dt:
07/26/2016
Application #:
14031563
Filing Dt:
09/19/2013
Publication #:
Pub Dt:
03/19/2015
Title:
FEATURE ETCHING USING VARYING SUPPLY OF POWER PULSES
13
Patent #:
Issue Dt:
05/10/2016
Application #:
14031611
Filing Dt:
09/19/2013
Publication #:
Pub Dt:
12/11/2014
Title:
Surface Modification Using Functional Carbon Nanotubes
14
Patent #:
Issue Dt:
11/03/2015
Application #:
14031767
Filing Dt:
09/19/2013
Publication #:
Pub Dt:
01/15/2015
Title:
TOLERATING FAILURES USING CONCURRENCY IN A CLUSTER
15
Patent #:
Issue Dt:
08/04/2015
Application #:
14031830
Filing Dt:
09/19/2013
Publication #:
Pub Dt:
01/15/2015
Title:
SPECULATIVE RECOVERY USING STORAGE SNAPSHOT IN A CLUSTERED DATABASE
16
Patent #:
Issue Dt:
06/02/2015
Application #:
14032212
Filing Dt:
09/20/2013
Publication #:
Pub Dt:
03/26/2015
Title:
MULTI-FIN FINFETS WITH MERGED-FIN SOURCE/DRAINS AND REPLACEMENT GATES
17
Patent #:
Issue Dt:
08/25/2015
Application #:
14032218
Filing Dt:
09/20/2013
Publication #:
Pub Dt:
03/26/2015
Title:
EMBEDDED ON-CHIP SECURITY
18
Patent #:
Issue Dt:
12/22/2015
Application #:
14032484
Filing Dt:
09/20/2013
Publication #:
Pub Dt:
01/23/2014
Title:
INTEGRATED CIRCUIT WITH A FIN-BASED FUSE, AND RELATED FABRICATION METHOD
19
Patent #:
Issue Dt:
12/30/2014
Application #:
14032567
Filing Dt:
09/20/2013
Publication #:
Pub Dt:
02/27/2014
Title:
REPLACEMENT GATE FABRICATION METHODS
20
Patent #:
Issue Dt:
07/28/2015
Application #:
14032740
Filing Dt:
09/20/2013
Publication #:
Pub Dt:
03/26/2015
Title:
GATE HEIGHT UNIFORMITY IN SEMICONDUCTOR DEVICES
21
Patent #:
Issue Dt:
07/21/2015
Application #:
14032778
Filing Dt:
09/20/2013
Publication #:
Pub Dt:
03/26/2015
Title:
GROUNDED BELT AND MOVABLE DRAWER APPARATUS
22
Patent #:
Issue Dt:
08/11/2015
Application #:
14032998
Filing Dt:
09/20/2013
Publication #:
Pub Dt:
03/26/2015
Title:
TRANSFERABLE TRANSPARENT CONDUCTIVE OXIDE
23
Patent #:
Issue Dt:
08/09/2016
Application #:
14033593
Filing Dt:
09/23/2013
Publication #:
Pub Dt:
03/26/2015
Title:
DIFFERENTIAL DOSE AND FOCUS MONITOR
24
Patent #:
Issue Dt:
11/17/2015
Application #:
14033616
Filing Dt:
09/23/2013
Publication #:
Pub Dt:
03/26/2015
Title:
PASSWORD ENTRY FOR DOUBLE SIDED MULTI-TOUCH DISPLAY
25
Patent #:
Issue Dt:
07/21/2015
Application #:
14033626
Filing Dt:
09/23/2013
Publication #:
Pub Dt:
12/25/2014
Title:
MEMORY UNCORRECTABLE ERROR HANDLING TECHNIQUE FOR REDUCING THE IMPACT OF NOISE
26
Patent #:
Issue Dt:
03/15/2016
Application #:
14033762
Filing Dt:
09/23/2013
Publication #:
Pub Dt:
03/26/2015
Title:
DERIVATION OF GENERALIZED TEST CASES
27
Patent #:
Issue Dt:
08/18/2015
Application #:
14033789
Filing Dt:
09/23/2013
Publication #:
Pub Dt:
03/26/2015
Title:
INTEGRATED CIRCUITS WITH PROTECTED RESISTORS AND METHODS FOR FABRICATING THE SAME
28
Patent #:
Issue Dt:
08/04/2015
Application #:
14034594
Filing Dt:
09/24/2013
Publication #:
Pub Dt:
03/26/2015
Title:
METHOD AND SYSTEM FOR USING A VIBRATION SIGNATURE AS AN AUTHENTICATION KEY
29
Patent #:
Issue Dt:
01/06/2015
Application #:
14034660
Filing Dt:
09/24/2013
Publication #:
Pub Dt:
01/16/2014
Title:
OPTIMIZED BUFFER PLACEMENT BASED ON TIMING AND CAPACITANCE ASSERTIONS
30
Patent #:
Issue Dt:
07/21/2015
Application #:
14034970
Filing Dt:
09/24/2013
Publication #:
Pub Dt:
03/26/2015
Title:
MARGIN IMPROVEMENT FOR CONFIGURABLE LOCAL CLOCK BUFFER
31
Patent #:
Issue Dt:
12/02/2014
Application #:
14035060
Filing Dt:
09/24/2013
Title:
Gate-All-Around Nanowire MOSFET and Method of Formation
32
Patent #:
Issue Dt:
06/16/2015
Application #:
14035125
Filing Dt:
09/24/2013
Publication #:
Pub Dt:
03/27/2014
Title:
METHOD AND SYSTEM TO FIX EARLY MODE SLACKS IN A CIRCUIT DESIGN
33
Patent #:
Issue Dt:
05/03/2016
Application #:
14035222
Filing Dt:
09/24/2013
Publication #:
Pub Dt:
03/26/2015
Title:
DERIVATION OF GENERALIZED TEST CASES
34
Patent #:
Issue Dt:
02/24/2015
Application #:
14035329
Filing Dt:
09/24/2013
Title:
METHODS OF GENERATING CIRCUIT LAYOUTS THAT ARE TO BE MANUFACTURED USING SADP TECHNIQUES
35
Patent #:
Issue Dt:
12/08/2015
Application #:
14035349
Filing Dt:
09/24/2013
Publication #:
Pub Dt:
12/25/2014
Title:
COHERENT ATTACHED PROCESSOR PROXY HAVING HYBRID DIRECTORY
36
Patent #:
Issue Dt:
11/10/2015
Application #:
14036070
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
03/26/2015
Title:
Method and System for Identifying and Visualizing Work Transfers Using Financial Data
37
Patent #:
Issue Dt:
10/27/2015
Application #:
14036205
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
03/26/2015
Title:
SPEED OF LIGHT BASED OSCILLATOR FREQUENCY
38
Patent #:
Issue Dt:
06/16/2015
Application #:
14036375
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
01/23/2014
Title:
SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURE WITH SELECTIVELY PLACED SUB-INSULATOR LAYER VOID(S) AND METHOD OF FORMING THE SOI STRUCTURE
39
Patent #:
Issue Dt:
06/23/2015
Application #:
14036393
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
06/19/2014
Title:
ELECTROSTATIC DISCHARGE RESISTANT DIODES
40
Patent #:
Issue Dt:
10/14/2014
Application #:
14036474
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
01/23/2014
Title:
CREATING DEEP TRENCHES ON UNDERLYING SUBSTRATE
41
Patent #:
Issue Dt:
01/03/2017
Application #:
14036665
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
03/26/2015
Title:
DATA CENTER COOLING WITH CRITICAL DEVICE PRIORITIZATION
42
Patent #:
Issue Dt:
05/17/2016
Application #:
14036676
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
03/12/2015
Title:
WAVELENGTH DIVISION MULTIPLEXING WITH MULTI-CORE FIBER
43
Patent #:
Issue Dt:
03/15/2016
Application #:
14036965
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
03/26/2015
Title:
METHOD AND SYSTEM FOR AUTOMATIC SPACE ORGANIZATION IN TIER2 SOLID STATE DRIVE (SSD) CACHE IN DATABASES FOR MULTI PAGE SUPPORT
44
Patent #:
Issue Dt:
06/16/2015
Application #:
14037334
Filing Dt:
09/25/2013
Publication #:
Pub Dt:
09/18/2014
Title:
SELF ALIGNED CAPACITOR FABRICATION
45
Patent #:
Issue Dt:
02/23/2016
Application #:
14037423
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
Silicon Nitride Layer Deposited at Low Temperature to Prevent Gate Dielectric Regrowth High-K Metal Gate Field Effect Transistors
46
Patent #:
Issue Dt:
09/27/2016
Application #:
14037550
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
INTEGRATED CIRCUITS WITH RADIOACTIVE SOURCE MATERIAL AND RADIATION DETECTION
47
Patent #:
Issue Dt:
06/28/2016
Application #:
14037768
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
EOS PROTECTION CIRCUIT WITH FET-BASED TRIGGER DIODES
48
Patent #:
Issue Dt:
10/20/2015
Application #:
14037774
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS USING IMPROVED MASKS
49
Patent #:
Issue Dt:
08/30/2016
Application #:
14037874
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/05/2015
Title:
DNA SEQUENCING USING A SUSPENDED CARBON NANOTUBE
50
Patent #:
Issue Dt:
03/29/2016
Application #:
14037879
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
MANAGING HIGH-CONFLICT CACHE LINES IN TRANSACTIONAL MEMORY COMPUTING ENVIRONMENTS
51
Patent #:
Issue Dt:
07/21/2015
Application #:
14037891
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
Reordering the Output of Recirculated Transactions Within a Pipeline
52
Patent #:
Issue Dt:
03/29/2016
Application #:
14037901
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
IDENTIFYING HIGH-CONFLICT CACHE LINES IN TRANSACTIONAL MEMORY COMPUTING ENVIRONMENTS
53
Patent #:
Issue Dt:
01/26/2016
Application #:
14037923
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
02/19/2015
Title:
MANAGEMENT OF TRANSACTIONAL MEMORY ACCESS REQUESTS BY A CACHE MEMORY
54
Patent #:
Issue Dt:
05/03/2016
Application #:
14037925
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
MANAGING HIGH-COHERENCE-MISS CACHE LINES IN MULTI-PROCESSOR COMPUTING ENVIRONMENTS
55
Patent #:
Issue Dt:
07/21/2015
Application #:
14037958
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
CENTRALIZED MANAGEMENT OF HIGH-CONTENTION CACHE LINES IN MULTI-PROCESSOR COMPUTING ENVIRONMENTS
56
Patent #:
Issue Dt:
02/21/2017
Application #:
14038139
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
GALLIUM NITRIDE MATERIAL AND DEVICE DEPOSITION ON GRAPHENE TERMINATED WAFER AND METHOD OF FORMING THE SAME
57
Patent #:
Issue Dt:
12/22/2015
Application #:
14038308
Filing Dt:
09/26/2013
Publication #:
Pub Dt:
03/26/2015
Title:
ERROR DETECTION AND ISOLATION
58
Patent #:
Issue Dt:
01/03/2017
Application #:
14039034
Filing Dt:
09/27/2013
Publication #:
Pub Dt:
03/26/2015
Title:
DATA CENTER COOLING METHOD WITH CRITICAL DEVICE PRIORITIZATION
59
Patent #:
Issue Dt:
12/23/2014
Application #:
14039450
Filing Dt:
09/27/2013
Publication #:
Pub Dt:
01/30/2014
Title:
THRESHOLD VOLTAGE ADJUSTMENT IN A FIN TRANSISTOR BY CORNER IMPLANTATION
60
Patent #:
Issue Dt:
11/24/2015
Application #:
14040784
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
04/02/2015
Title:
SMART CALENDAR
61
Patent #:
Issue Dt:
02/28/2017
Application #:
14040819
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
04/02/2015
Title:
DETECTING VULNERABILITY TO RESOURCE EXHAUSTION
62
Patent #:
Issue Dt:
07/12/2016
Application #:
14041010
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
04/02/2015
Title:
Security Testing Using Semantic Modeling
63
Patent #:
Issue Dt:
06/16/2015
Application #:
14041187
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
04/02/2015
Title:
SELF-ALIGNED VIAS FORMED USING SACRIFICIAL METAL CAPS
64
Patent #:
Issue Dt:
08/02/2016
Application #:
14041422
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
04/02/2015
Title:
ON CHIP BIAS TEMPERATURE INSTABILITY CHARACTERIZATION OF A SEMICONDUCTOR DEVICE
65
Patent #:
Issue Dt:
06/16/2015
Application #:
14041840
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
02/06/2014
Title:
Transistor having replacement metal gate and process for fabricating the same
66
Patent #:
Issue Dt:
11/17/2015
Application #:
14041922
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
12/25/2014
Title:
NANOGAP DEVICE WITH CAPPED NANOWIRE STRUCTURES
67
Patent #:
Issue Dt:
04/14/2015
Application #:
14041983
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
08/21/2014
Title:
MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) CAPACITIVE OHMIC SWITCH AND DESIGN STRUCTURES
68
Patent #:
Issue Dt:
03/22/2016
Application #:
14042083
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
04/02/2015
Title:
STRING GENERATION TOOL
69
Patent #:
Issue Dt:
12/15/2015
Application #:
14042495
Filing Dt:
09/30/2013
Publication #:
Pub Dt:
04/02/2015
Title:
IDENTIFYING AND RANKING PIRATED MEDIA CONTENT
70
Patent #:
Issue Dt:
05/26/2015
Application #:
14042752
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
01/16/2014
Title:
GROUNDED LID FOR MICRO-ELECTRONIC ASSEMBLIES
71
Patent #:
Issue Dt:
03/29/2016
Application #:
14042886
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
04/02/2015
Title:
VERIFICATION OF DYNAMIC LOGICAL PARTITIONING
72
Patent #:
Issue Dt:
02/23/2016
Application #:
14042889
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
03/05/2015
Title:
TRENCH SIDEWALL PROTECTION FOR SELECTIVE EPITAXIAL SEMICONDUCTOR MATERIAL FORMATION
73
Patent #:
Issue Dt:
05/31/2016
Application #:
14042951
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
04/02/2015
Title:
LATERAL HETEROJUNCTION BIPOLAR TRANSISTOR WITH LOW TEMPERATURE RECESSED CONTACTS
74
Patent #:
Issue Dt:
11/24/2015
Application #:
14043017
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
04/02/2015
Title:
INTEGRATED CIRCUITS WITH DUAL SILICIDE CONTACTS AND METHODS FOR FABRICATING SAME
75
Patent #:
Issue Dt:
10/03/2017
Application #:
14043047
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
04/02/2015
Title:
CHIP JOINING BY INDUCTION HEATING
76
Patent #:
Issue Dt:
09/06/2016
Application #:
14043110
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
04/02/2015
Title:
MEMORY SYSTEM FOR MIRRORING DATA
77
Patent #:
Issue Dt:
06/24/2014
Application #:
14043137
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
01/30/2014
Title:
UNDERFILL MATERIAL DISPENSING FOR STACKED SEMICONDUCTOR CHIPS
78
Patent #:
Issue Dt:
05/26/2015
Application #:
14043181
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
04/02/2015
Title:
GATE ELECTRODE WITH A SHRINK SPACER
79
Patent #:
Issue Dt:
09/29/2015
Application #:
14043243
Filing Dt:
10/01/2013
Publication #:
Pub Dt:
04/02/2015
Title:
DEVICES AND METHODS OF FORMING FINFETS WITH SELF ALIGNED FIN FORMATION
80
Patent #:
Issue Dt:
02/10/2015
Application #:
14043251
Filing Dt:
10/01/2013
Title:
METHODS OF GENERATING CIRCUIT LAYOUTS THAT ARE TO BE MANUFACTURED USING SADP ROUTING TECHNIQUES AND VIRTUAL NON-MANDREL MASK RULES
81
Patent #:
Issue Dt:
09/27/2016
Application #:
14043864
Filing Dt:
10/02/2013
Publication #:
Pub Dt:
04/02/2015
Title:
EXPLAINING PARTIALLY ILLEGAL COMBINATIONS IN COMBINATORIAL MODELS
82
Patent #:
Issue Dt:
09/12/2017
Application #:
14043871
Filing Dt:
10/02/2013
Publication #:
Pub Dt:
04/02/2015
Title:
HARDMASK FOR A HALO/EXTENSION IMPLANT OF A STATIC RANDOM ACCESS MEMORY (SRAM) LAYOUT
83
Patent #:
Issue Dt:
01/12/2016
Application #:
14044120
Filing Dt:
10/02/2013
Publication #:
Pub Dt:
04/02/2015
Title:
METHODS OF FORMING FINFET SEMICONDUCTOR DEVICES USING A REPLACEMENT GATE TECHNIQUE AND THE RESULTING DEVICES
84
Patent #:
Issue Dt:
02/02/2016
Application #:
14044131
Filing Dt:
10/02/2013
Publication #:
Pub Dt:
03/05/2015
Title:
STACKED NANOWIRE
85
Patent #:
Issue Dt:
05/19/2015
Application #:
14044163
Filing Dt:
10/02/2013
Publication #:
Pub Dt:
01/30/2014
Title:
STRESS ENHANCED LDMOS TRANSISTOR TO MINIMIZE ON-RESISTANCE AND MAINTAIN HIGH BREAKDOWN VOLTAGE
86
Patent #:
Issue Dt:
12/08/2015
Application #:
14044269
Filing Dt:
10/02/2013
Publication #:
Pub Dt:
04/02/2015
Title:
INDUCTOR STRUCTURE HAVING EMBEDDED AIRGAP
87
Patent #:
Issue Dt:
09/01/2015
Application #:
14044533
Filing Dt:
10/02/2013
Publication #:
Pub Dt:
04/02/2015
Title:
FINFET FABRICATION METHOD
88
Patent #:
Issue Dt:
06/16/2015
Application #:
14045006
Filing Dt:
10/03/2013
Publication #:
Pub Dt:
04/09/2015
Title:
DEVICE FOR ATTENUATING PROPAGATION OF ELECTROMAGNETIC EMISSIONS FROM AN ENCLOSURE
89
Patent #:
Issue Dt:
01/10/2017
Application #:
14045007
Filing Dt:
10/03/2013
Title:
PROCESSING CORE DATA PRODUCED BY A COMPUTER PROCESS
90
Patent #:
Issue Dt:
07/14/2015
Application #:
14045145
Filing Dt:
10/03/2013
Publication #:
Pub Dt:
04/09/2015
Title:
SEMICONDUCTOR ARTICLE HAVING A ZIG-ZAG GUARD RING AND METHOD OF FORMING THE SAME
91
Patent #:
Issue Dt:
03/01/2016
Application #:
14045340
Filing Dt:
10/03/2013
Publication #:
Pub Dt:
04/09/2015
Title:
METHOD AND APPARATUS FOR HIGH YIELD CONTACT INTEGRATION SCHEME
92
Patent #:
Issue Dt:
11/03/2015
Application #:
14045455
Filing Dt:
10/03/2013
Publication #:
Pub Dt:
04/09/2015
Title:
SEMICONDUCTOR DEVICE BURN-IN STRESS METHOD AND SYSTEM
93
Patent #:
Issue Dt:
02/23/2016
Application #:
14045718
Filing Dt:
10/03/2013
Publication #:
Pub Dt:
04/09/2015
Title:
PRIVACY ENHANCED SPATIAL ANALYTICS
94
Patent #:
Issue Dt:
03/03/2015
Application #:
14046069
Filing Dt:
10/04/2013
Publication #:
Pub Dt:
03/26/2015
Title:
GATE-ALL-AROUND NANOWIRE MOSFET AND METHOD OF FORMATION
95
Patent #:
Issue Dt:
01/06/2015
Application #:
14046207
Filing Dt:
10/04/2013
Publication #:
Pub Dt:
01/30/2014
Title:
Scheduling for Parallel Processing of Regionally-Constrained Placement Problem
96
Patent #:
Issue Dt:
01/06/2015
Application #:
14046218
Filing Dt:
10/04/2013
Publication #:
Pub Dt:
02/06/2014
Title:
HIGH-K TRANSISTORS WITH LOW THRESHOLD VOLTAGE
97
Patent #:
Issue Dt:
05/13/2014
Application #:
14046316
Filing Dt:
10/04/2013
Publication #:
Pub Dt:
01/30/2014
Title:
CMOS WITH CHANNEL P-FINFET AND CHANNEL N-FINFET HAVING DIFFERENT CRYSTALLINE ORIENTATIONS AND PARALLEL FINS
98
Patent #:
Issue Dt:
05/13/2014
Application #:
14046340
Filing Dt:
10/04/2013
Publication #:
Pub Dt:
02/06/2014
Title:
CMOS WITH CHANNEL P-FINFET AND CHANNEL N-FINFET HAVING DIFFERENT CRYSTALLINE ORIENTATIONS AND PARALLEL FINS
99
Patent #:
Issue Dt:
01/23/2018
Application #:
14046506
Filing Dt:
10/04/2013
Publication #:
Pub Dt:
04/09/2015
Title:
INTEGRATED WAVEGUIDE STRUCTURE WITH PERFORATED CHIP EDGE SEAL
100
Patent #:
Issue Dt:
07/21/2015
Application #:
14047071
Filing Dt:
10/07/2013
Publication #:
Pub Dt:
04/09/2015
Title:
IMPLEMENTING ENHANCED NET ROUTING CONGESTION RESOLUTION OF NON-RECTANGULAR OR RECTANGULAR HIERARCHICAL MACROS
Assignor
1
Exec Dt:
11/17/2020
Assignee
1
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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