skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 14520
Page 122 of 146
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146
1
Patent #:
9682371
Issue Dt:
06/20/2017
Application #:
14367225
Filing Dt:
06/19/2014
Publication #:
US20140326924
Pub Dt:
11/06/2014
Title:
REMOVAL OF COMPONENTS FROM A STARTING MATERIAL
2
Patent #:
10120801
Issue Dt:
11/06/2018
Application #:
14378118
Filing Dt:
08/12/2014
Publication #:
US20150032974
Pub Dt:
01/29/2015
Title:
OBJECT CACHING FOR MOBILE DATA COMMUNICATION WITH MOBILITY MANAGEMENT
3
Patent #:
9766066
Issue Dt:
09/19/2017
Application #:
14381963
Filing Dt:
08/28/2014
Publication #:
US20150077359
Pub Dt:
03/19/2015
Title:
Position Sensing Apparatus
4
Patent #:
9218839
Issue Dt:
12/22/2015
Application #:
14387572
Filing Dt:
09/24/2014
Publication #:
US20150131180
Pub Dt:
05/14/2015
Title:
OPERATING A TAPE STORAGE DEVICE
5
Patent #:
9018714
Issue Dt:
04/28/2015
Application #:
14444330
Filing Dt:
07/28/2014
Publication #:
US20140332903
Pub Dt:
11/13/2014
Title:
INTEGRATED CIRCUIT HAVING RAISED SOURCE DRAINS DEVICES WITH REDUCED SILICIDE CONTACT RESISTANCE AND METHODS TO FABRICATE SAME
6
Patent #:
9224858
Issue Dt:
12/29/2015
Application #:
14445101
Filing Dt:
07/29/2014
Title:
LATERAL DOUBLE-DIFFUSED METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (LDMOSFET) WITH A BELOW SOURCE ISOLATION REGION AND A METHOD OF FORMING THE LDMOSFET
7
Patent #:
9207695
Issue Dt:
12/08/2015
Application #:
14445775
Filing Dt:
07/29/2014
Publication #:
US20150301541
Pub Dt:
10/22/2015
Title:
CALIBRATION SCHEMES FOR CHARGE-RECYCLING STACKED VOLTAGE DOMAINS
8
Patent #:
9293556
Issue Dt:
03/22/2016
Application #:
14445893
Filing Dt:
07/29/2014
Publication #:
US20160035856
Pub Dt:
02/04/2016
Title:
SEMICONDUCTOR STRUCTURE INCLUDING A FERROELECTRIC TRANSISTOR AND METHOD FOR THE FORMATION THEREOF
9
Patent #:
9344450
Issue Dt:
05/17/2016
Application #:
14446020
Filing Dt:
07/29/2014
Publication #:
US20150089642
Pub Dt:
03/26/2015
Title:
DETECTING PHISHING OF A MATRIX BARCODE
10
Patent #:
9092587
Issue Dt:
07/28/2015
Application #:
14446536
Filing Dt:
07/30/2014
Publication #:
US20150113488
Pub Dt:
04/23/2015
Title:
CONGESTION ESTIMATION TECHNIQUES AT PRE-SYNTHESIS STAGE
11
Patent #:
9189234
Issue Dt:
11/17/2015
Application #:
14446567
Filing Dt:
07/30/2014
Publication #:
US20150067300
Pub Dt:
03/05/2015
Title:
REDUCING OVERHEAD IN LOADING CONSTANTS
12
Patent #:
8951906
Issue Dt:
02/10/2015
Application #:
14446634
Filing Dt:
07/30/2014
Publication #:
US20140342552
Pub Dt:
11/20/2014
Title:
METHOD OF FORMING A THROUGH-SILICON VIA UTILIZING A METAL CONTACT PAD IN A BACK-END-OF-LINE WIRING LEVEL TO FILL THE THROUGH-SILICON VIA
13
Patent #:
9413728
Issue Dt:
08/09/2016
Application #:
14446710
Filing Dt:
07/30/2014
Publication #:
US20150039882
Pub Dt:
02/05/2015
Title:
IDENTIFYING CONTENT FROM AN ENCRYPTED COMMUNICATION
14
Patent #:
8951920
Issue Dt:
02/10/2015
Application #:
14446797
Filing Dt:
07/30/2014
Publication #:
US20140335668
Pub Dt:
11/13/2014
Title:
CONTACT LANDING PADS FOR A SEMICONDUCTOR DEVICE AND METHODS OF MAKING SAME
15
Patent #:
9252208
Issue Dt:
02/02/2016
Application #:
14447678
Filing Dt:
07/31/2014
Publication #:
US20160035820
Pub Dt:
02/04/2016
Title:
UNIAXIALLY-STRAINED FD-SOI FINFET
16
Patent #:
9202919
Issue Dt:
12/01/2015
Application #:
14447685
Filing Dt:
07/31/2014
Title:
FINFETS AND TECHNIQUES FOR CONTROLLING SOURCE AND DRAIN JUNCTION PROFILES IN FINFETS
17
Patent #:
9059167
Issue Dt:
06/16/2015
Application #:
14447710
Filing Dt:
07/31/2014
Publication #:
US20140339703
Pub Dt:
11/20/2014
Title:
STRUCTURE AND METHOD FOR MAKING CRACK STOP FOR 3D INTEGRATED CIRCUITS
18
Patent #:
9202920
Issue Dt:
12/01/2015
Application #:
14447727
Filing Dt:
07/31/2014
Title:
METHODS FOR FORMING VERTICAL AND SHARP JUNCTIONS IN FINFET STRUCTURES
19
Patent #:
8969916
Issue Dt:
03/03/2015
Application #:
14447830
Filing Dt:
07/31/2014
Publication #:
US20140339604
Pub Dt:
11/20/2014
Title:
STRAIN ENHANCEMENT IN TRANSISTORS COMPRISING AN EMBEDDED STRAIN-INDUCING SEMICONDUCTOR ALLOY BY CREATING A PATTERNING NON-UNIFORMITY AT THE BOTTOM OF THE GATE ELECTRODE
20
Patent #:
9658853
Issue Dt:
05/23/2017
Application #:
14448790
Filing Dt:
07/31/2014
Publication #:
US20150039862
Pub Dt:
02/05/2015
Title:
TECHNIQUES FOR INCREASING INSTRUCTION ISSUE RATE AND REDUCING LATENCY IN AN OUT-OF-ORDER PROCESSOR
21
Patent #:
9070578
Issue Dt:
06/30/2015
Application #:
14449177
Filing Dt:
08/01/2014
Publication #:
US20150069472
Pub Dt:
03/12/2015
Title:
ELECTROMECHANICAL SWITCHING DEVICE WITH 2D LAYERED MATERIAL SURFACES
22
Patent #:
9058999
Issue Dt:
06/16/2015
Application #:
14449180
Filing Dt:
08/01/2014
Publication #:
US20140340138
Pub Dt:
11/20/2014
Title:
LOW VOLTAGE METAL GATE ANTIFUSE WITH DEPLETION MODE MOSFET
23
Patent #:
9401303
Issue Dt:
07/26/2016
Application #:
14449185
Filing Dt:
08/01/2014
Publication #:
US20160035616
Pub Dt:
02/04/2016
Title:
HANDLER WAFER REMOVAL BY USE OF SACRIFICIAL INERT LAYER
24
Patent #:
NONE
Issue Dt:
Application #:
14449222
Filing Dt:
08/01/2014
Publication #:
US20160033958
Pub Dt:
02/04/2016
Title:
ENDPOINT DETERMINATION USING INDIVIDUALLY MEASURED TARGET SPECTRA
25
Patent #:
9269621
Issue Dt:
02/23/2016
Application #:
14449314
Filing Dt:
08/01/2014
Publication #:
US20140342549
Pub Dt:
11/20/2014
Title:
DUAL DAMASCENE DUAL ALIGNMENT INTERCONNECT SCHEME
26
Patent #:
9106854
Issue Dt:
08/11/2015
Application #:
14449557
Filing Dt:
08/01/2014
Publication #:
US20140340548
Pub Dt:
11/20/2014
Title:
PIXEL SENSOR CELL WITH HOLD NODE FOR LEAKAGE CANCELLATION AND METHODS OF MANUFACTURE AND DESIGN STRUCTURE
27
Patent #:
9412371
Issue Dt:
08/09/2016
Application #:
14449592
Filing Dt:
08/01/2014
Publication #:
US20140343941
Pub Dt:
11/20/2014
Title:
VISUALIZATION INTERFACE OF CONTINUOUS WAVEFORM MULTI-SPEAKER IDENTIFICATION
28
Patent #:
9575822
Issue Dt:
02/21/2017
Application #:
14449666
Filing Dt:
08/01/2014
Publication #:
US20160034321
Pub Dt:
02/04/2016
Title:
TRACKING A RELATIVE ARRIVAL ORDER OF EVENTS BEING STORED IN MULTIPLE QUEUES USING A COUNTER USING MOST SIGNIFICANT BIT VALUES
29
Patent #:
9087720
Issue Dt:
07/21/2015
Application #:
14450535
Filing Dt:
08/04/2014
Title:
METHODS FOR FORMING FinFETs WITH REDUCED SERIES RESISTANCE
30
Patent #:
9343590
Issue Dt:
05/17/2016
Application #:
14450887
Filing Dt:
08/04/2014
Publication #:
US20160035906
Pub Dt:
02/04/2016
Title:
PLANAR SEMICONDUCTOR ESD DEVICE AND METHOD OF MAKING SAME
31
Patent #:
9190479
Issue Dt:
11/17/2015
Application #:
14451493
Filing Dt:
08/05/2014
Publication #:
US20150333051
Pub Dt:
11/19/2015
Title:
TRANSISTOR STRUCTURE HAVING AN ELECTRICAL CONTACT STRUCTURE WITH MULTIPLE METAL INTERCONNECT LEVELS STAGGERING ONE ANOTHER
32
Patent #:
9570564
Issue Dt:
02/14/2017
Application #:
14451716
Filing Dt:
08/05/2014
Publication #:
US20160043203
Pub Dt:
02/11/2016
Title:
SELF-ALIGNED EMITTER-BASE BIPOLAR JUNCTION TRANSISTOR WITH REDUCED BASE RESISTANCE AND BASE-COLLECTOR CAPACITANCE
33
Patent #:
9292532
Issue Dt:
03/22/2016
Application #:
14451778
Filing Dt:
08/05/2014
Publication #:
US20150067331
Pub Dt:
03/05/2015
Title:
REMOTE DATA STORAGE
34
Patent #:
9087808
Issue Dt:
07/21/2015
Application #:
14451836
Filing Dt:
08/05/2014
Publication #:
US20140339607
Pub Dt:
11/20/2014
Title:
FABRICATING POLYSILICON MOS DEVICES AND PASSIVE ESD DEVICES
35
Patent #:
10176996
Issue Dt:
01/08/2019
Application #:
14452606
Filing Dt:
08/06/2014
Publication #:
US20160042954
Pub Dt:
02/11/2016
Title:
REPLACEMENT METAL GATE AND FABRICATION PROCESS WITH REDUCED LITHOGRAPHY STEPS
36
Patent #:
9228994
Issue Dt:
01/05/2016
Application #:
14452741
Filing Dt:
08/06/2014
Title:
NANOCHANNEL ELECTRODE DEVICES
37
Patent #:
9754945
Issue Dt:
09/05/2017
Application #:
14452762
Filing Dt:
08/06/2014
Publication #:
US20160043088
Pub Dt:
02/11/2016
Title:
NON-VOLATILE MEMORY DEVICE EMPLOYING A DEEP TRENCH CAPACITOR
38
Patent #:
9190088
Issue Dt:
11/17/2015
Application #:
14453227
Filing Dt:
08/06/2014
Publication #:
US20150062747
Pub Dt:
03/05/2015
Title:
ALIGNING A FIRST ELEMENT COUPLED TO AN ACTUATOR WITH A SECOND ELEMENT OF A MAIN SYSTEM
39
Patent #:
9460811
Issue Dt:
10/04/2016
Application #:
14453779
Filing Dt:
08/07/2014
Publication #:
US20140351662
Pub Dt:
11/27/2014
Title:
READ ONLY MEMORY (ROM) WITH REDUNDANCY
40
Patent #:
9431346
Issue Dt:
08/30/2016
Application #:
14454765
Filing Dt:
08/08/2014
Publication #:
US20140346674
Pub Dt:
11/27/2014
Title:
GRAPHENE-METAL E-FUSE
41
Patent #:
9679990
Issue Dt:
06/13/2017
Application #:
14454778
Filing Dt:
08/08/2014
Publication #:
US20160043190
Pub Dt:
02/11/2016
Title:
SEMICONDUCTOR STRUCTURE(S) WITH EXTENDED SOURCE/DRAIN CHANNEL INTERFACES AND METHODS OF FABRICATION
42
Patent #:
9318148
Issue Dt:
04/19/2016
Application #:
14455816
Filing Dt:
08/08/2014
Publication #:
US20140347762
Pub Dt:
11/27/2014
Title:
COMBINED SOFT DETECTION/SOFT DECODING IN TAPE DRIVE STORAGE CHANNELS
43
Patent #:
8962412
Issue Dt:
02/24/2015
Application #:
14456199
Filing Dt:
08/11/2014
Publication #:
US20140349459
Pub Dt:
11/27/2014
Title:
INTEGRATED CIRCUIT HAVING RAISED SOURCE DRAINS DEVICES WITH REDUCED SILICIDE CONTACT RESISTANCE AND METHODS TO FABRICATE SAME
44
Patent #:
9235119
Issue Dt:
01/12/2016
Application #:
14457149
Filing Dt:
08/12/2014
Publication #:
US20140349237
Pub Dt:
11/27/2014
Title:
EXPOSURE PHOTOLITHOGRAPHY METHODS
45
Patent #:
9087859
Issue Dt:
07/21/2015
Application #:
14457273
Filing Dt:
08/12/2014
Publication #:
US20140357037
Pub Dt:
12/04/2014
Title:
FINFET WITH ENHANCED EMBEDDED STRESSOR
46
Patent #:
9171752
Issue Dt:
10/27/2015
Application #:
14457325
Filing Dt:
08/12/2014
Title:
PRODUCT COMPRISED OF FINFET DEVICES WITH SINGLE DIFFUSION BREAK ISOLATION STRUCTURES, AND METHODS OF MAKING SUCH A PRODUCT
47
Patent #:
NONE
Issue Dt:
Application #:
14457370
Filing Dt:
08/12/2014
Publication #:
US20160049370
Pub Dt:
02/18/2016
Title:
METHODS OF FORMING MIS CONTACT STRUCTURES FOR SEMICONDUCTOR DEVICES BY SELECTIVE DEPOSITION OF INSULATING MATERIAL AND THE RESULTING DEVICES
48
Patent #:
9058417
Issue Dt:
06/16/2015
Application #:
14457537
Filing Dt:
08/12/2014
Publication #:
US20140359583
Pub Dt:
12/04/2014
Title:
THREAD SERIALIZATION AND DISABLEMENT TOOL
49
Patent #:
9825172
Issue Dt:
11/21/2017
Application #:
14457545
Filing Dt:
08/12/2014
Publication #:
US20140353755
Pub Dt:
12/04/2014
Title:
FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD OF FORMING SAME
50
Patent #:
9330972
Issue Dt:
05/03/2016
Application #:
14457708
Filing Dt:
08/12/2014
Publication #:
US20160049332
Pub Dt:
02/18/2016
Title:
METHODS OF FORMING CONTACT STRUCTURES FOR SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES
51
Patent #:
9306019
Issue Dt:
04/05/2016
Application #:
14457934
Filing Dt:
08/12/2014
Publication #:
US20160049489
Pub Dt:
02/18/2016
Title:
INTEGRATED CIRCUITS WITH NANOWIRES AND METHODS OF MANUFACTURING THE SAME
52
Patent #:
8981829
Issue Dt:
03/17/2015
Application #:
14458428
Filing Dt:
08/13/2014
Publication #:
US20150061744
Pub Dt:
03/05/2015
Title:
PASSGATE STRENGTH CALIBRATION TECHNIQUES FOR VOLTAGE REGULATORS
53
Patent #:
9190488
Issue Dt:
11/17/2015
Application #:
14458633
Filing Dt:
08/13/2014
Title:
METHODS OF FORMING GATE STRUCTURE OF SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES
54
Patent #:
9337045
Issue Dt:
05/10/2016
Application #:
14458718
Filing Dt:
08/13/2014
Publication #:
US20160049302
Pub Dt:
02/18/2016
Title:
METHODS OF FORMING A SEMICONDUCTOR CIRCUIT ELEMENT AND SEMICONDUCTOR CIRCUIT ELEMENT
55
Patent #:
9312191
Issue Dt:
04/12/2016
Application #:
14459407
Filing Dt:
08/14/2014
Publication #:
US20160049339
Pub Dt:
02/18/2016
Title:
BLOCK PATTERNING PROCESS FOR POST FIN
56
Patent #:
9362162
Issue Dt:
06/07/2016
Application #:
14459444
Filing Dt:
08/14/2014
Publication #:
US20160049327
Pub Dt:
02/18/2016
Title:
METHODS OF FABRICATING BEOL INTERLAYER STRUCTURES
57
Patent #:
9178035
Issue Dt:
11/03/2015
Application #:
14459446
Filing Dt:
08/14/2014
Title:
METHODS OF FORMING GATE STRUCTURES OF SEMICONDUCTOR DEVICES
58
Patent #:
9504967
Issue Dt:
11/29/2016
Application #:
14459593
Filing Dt:
08/14/2014
Publication #:
US20140353253
Pub Dt:
12/04/2014
Title:
COMPOSITE MEMBRANE WITH MULTI-LAYERED ACTIVE LAYER
59
Patent #:
9324654
Issue Dt:
04/26/2016
Application #:
14459607
Filing Dt:
08/14/2014
Publication #:
US20160049366
Pub Dt:
02/18/2016
Title:
INTEGRATED CIRCUITS WITH ELECTRONIC FUSE STRUCTURES
60
Patent #:
9070771
Issue Dt:
06/30/2015
Application #:
14460921
Filing Dt:
08/15/2014
Publication #:
US20140353721
Pub Dt:
12/04/2014
Title:
BULK FINFET WITH CONTROLLED FIN HEIGHT AND HIGH-K LINER
61
Patent #:
9123773
Issue Dt:
09/01/2015
Application #:
14461015
Filing Dt:
08/15/2014
Title:
T-SHAPED SINGLE DIFFUSION BARRIER WITH SINGLE MASK APPROACH PROCESS FLOW
62
Patent #:
9356047
Issue Dt:
05/31/2016
Application #:
14461700
Filing Dt:
08/18/2014
Publication #:
US20160049427
Pub Dt:
02/18/2016
Title:
INTEGRATED CIRCUITS WITH SELF ALIGNED CONTACT STRUCTURES FOR IMPROVED WINDOWS AND FABRICATION METHODS
63
Patent #:
9324831
Issue Dt:
04/26/2016
Application #:
14461713
Filing Dt:
08/18/2014
Publication #:
US20160049494
Pub Dt:
02/18/2016
Title:
FORMING TRANSISTORS WITHOUT SPACERS AND RESULTING DEVICES
64
Patent #:
9142560
Issue Dt:
09/22/2015
Application #:
14461737
Filing Dt:
08/18/2014
Publication #:
US20140353764
Pub Dt:
12/04/2014
Title:
LAYOUT TO MINIMIZE FET VARIATION IN SMALL DIMENSION PHOTOLITHOGRAPHY
65
Patent #:
9105510
Issue Dt:
08/11/2015
Application #:
14461745
Filing Dt:
08/18/2014
Publication #:
US20140353765
Pub Dt:
12/04/2014
Title:
DOUBLE SIDEWALL IMAGE TRANSFER PROCESS
66
Patent #:
10290636
Issue Dt:
05/14/2019
Application #:
14461769
Filing Dt:
08/18/2014
Publication #:
US20160049402
Pub Dt:
02/18/2016
Title:
SEMICONDUCTOR DEVICE HAVING FINS WITH IN-SITU DOPED, PUNCH-THROUGH STOPPER LAYER AND RELATED METHODS
67
Patent #:
9252238
Issue Dt:
02/02/2016
Application #:
14461887
Filing Dt:
08/18/2014
Publication #:
US20160049495
Pub Dt:
02/18/2016
Title:
SEMICONDUCTOR STRUCTURES WITH COPLANAR RECESSED GATE LAYERS AND FABRICATION METHODS
68
Patent #:
9297666
Issue Dt:
03/29/2016
Application #:
14462112
Filing Dt:
08/18/2014
Publication #:
US20150066367
Pub Dt:
03/05/2015
Title:
Automatically Generating Route Directions Based On Signpost Data
69
Patent #:
9500703
Issue Dt:
11/22/2016
Application #:
14462643
Filing Dt:
08/19/2014
Publication #:
US20160054383
Pub Dt:
02/25/2016
Title:
SEMICONDUCTOR STRUCTURE HAVING TEST DEVICE
70
Patent #:
9236308
Issue Dt:
01/12/2016
Application #:
14463013
Filing Dt:
08/19/2014
Title:
METHODS OF FABRICATING FIN STRUCTURES OF UNIFORM HEIGHT
71
Patent #:
9348962
Issue Dt:
05/24/2016
Application #:
14463025
Filing Dt:
08/19/2014
Publication #:
US20140359547
Pub Dt:
12/04/2014
Title:
HIERARCHICAL DESIGN OF INTEGRATED CIRCUITS WITH MULTI-PATTERNING REQUIREMENTS
72
Patent #:
9324868
Issue Dt:
04/26/2016
Application #:
14463057
Filing Dt:
08/19/2014
Publication #:
US20160056294
Pub Dt:
02/25/2016
Title:
EPITAXIAL GROWTH OF SILICON FOR FINFETS WITH NON-RECTANGULAR CROSS-SECTIONS
73
Patent #:
9263325
Issue Dt:
02/16/2016
Application #:
14463801
Filing Dt:
08/20/2014
Publication #:
US20160056075
Pub Dt:
02/25/2016
Title:
PRECUT METAL LINES
74
Patent #:
9508642
Issue Dt:
11/29/2016
Application #:
14463803
Filing Dt:
08/20/2014
Publication #:
US20160056104
Pub Dt:
02/25/2016
Title:
SELF-ALIGNED BACK END OF LINE CUT
75
Patent #:
9400602
Issue Dt:
07/26/2016
Application #:
14464090
Filing Dt:
08/20/2014
Publication #:
US20150331767
Pub Dt:
11/19/2015
Title:
Stacked Memory Device Control
76
Patent #:
8980720
Issue Dt:
03/17/2015
Application #:
14464282
Filing Dt:
08/20/2014
Publication #:
US20140357045
Pub Dt:
12/04/2014
Title:
EFUSE AND METHOD OF FABRICATION
77
Patent #:
9594641
Issue Dt:
03/14/2017
Application #:
14465248
Filing Dt:
08/21/2014
Publication #:
US20150058538
Pub Dt:
02/26/2015
Title:
TECHNIQUES FOR UPDATING MEMORY OF A CHASSIS MANAGEMENT MODULE
78
Patent #:
9054108
Issue Dt:
06/09/2015
Application #:
14465255
Filing Dt:
08/21/2014
Publication #:
US20150028484
Pub Dt:
01/29/2015
Title:
RANDOM LOCAL METAL CAP LAYER FORMATION FOR IMPROVED INTEGRATED CIRCUIT RELIABILITY
79
Patent #:
9208859
Issue Dt:
12/08/2015
Application #:
14466385
Filing Dt:
08/22/2014
Title:
LOW POWER STATIC RANDOM ACCESS MEMORY (SRAM) READ DATA PATH
80
Patent #:
9396991
Issue Dt:
07/19/2016
Application #:
14467191
Filing Dt:
08/25/2014
Publication #:
US20160056072
Pub Dt:
02/25/2016
Title:
MULTILAYERED CONTACT STRUCTURE HAVING NICKEL, COPPER, AND NICKEL-IRON LAYERS
81
Patent #:
9484449
Issue Dt:
11/01/2016
Application #:
14467357
Filing Dt:
08/25/2014
Publication #:
US20160056253
Pub Dt:
02/25/2016
Title:
INTEGRATED CIRCUITS WITH DIFFUSION BARRIER LAYERS AND PROCESSES FOR PREPARING INTEGRATED CIRCUITS INCLUDING DIFFUSION BARRIER LAYERS
82
Patent #:
9543378
Issue Dt:
01/10/2017
Application #:
14467420
Filing Dt:
08/25/2014
Publication #:
US20160056231
Pub Dt:
02/25/2016
Title:
SEMICONDUCTOR DEVICES AND FABRICATION METHODS THEREOF
83
Patent #:
9740092
Issue Dt:
08/22/2017
Application #:
14467489
Filing Dt:
08/25/2014
Publication #:
US20160055281
Pub Dt:
02/25/2016
Title:
MODEL-BASED GENERATION OF DUMMY FEATURES
84
Patent #:
8987132
Issue Dt:
03/24/2015
Application #:
14467564
Filing Dt:
08/25/2014
Publication #:
US20140363965
Pub Dt:
12/11/2014
Title:
DOUBLE SOLDER BUMPS ON SUBSTRATES FOR LOW TEMPERATURE FLIP CHIP BONDING
85
Patent #:
9337265
Issue Dt:
05/10/2016
Application #:
14467660
Filing Dt:
08/25/2014
Publication #:
US20150061078
Pub Dt:
03/05/2015
Title:
COMPOUND SEMICONDUCTOR STRUCTURE
86
Patent #:
9535631
Issue Dt:
01/03/2017
Application #:
14468544
Filing Dt:
08/26/2014
Publication #:
US20150058558
Pub Dt:
02/26/2015
Title:
MULTI-PATH MANAGEMENT
87
Patent #:
9514844
Issue Dt:
12/06/2016
Application #:
14468999
Filing Dt:
08/26/2014
Publication #:
US20160064102
Pub Dt:
03/03/2016
Title:
FAST AUTO SHIFT OF FAILING MEMORY DIAGNOSTICS DATA USING PATTERN DETECTION
88
Patent #:
9583240
Issue Dt:
02/28/2017
Application #:
14469012
Filing Dt:
08/26/2014
Publication #:
US20160064123
Pub Dt:
03/03/2016
Title:
TEMPERATURE INDEPENDENT RESISTOR
89
Patent #:
9502528
Issue Dt:
11/22/2016
Application #:
14469014
Filing Dt:
08/26/2014
Publication #:
US20160064514
Pub Dt:
03/03/2016
Title:
BORDERLESS CONTACT FORMATION THROUGH METAL-RECESS DUAL CAP INTEGRATION
90
Patent #:
9349718
Issue Dt:
05/24/2016
Application #:
14469155
Filing Dt:
08/26/2014
Publication #:
US20160064372
Pub Dt:
03/03/2016
Title:
ESD SNAPBACK BASED CLAMP FOR FINFET
91
Patent #:
9484407
Issue Dt:
11/01/2016
Application #:
14469741
Filing Dt:
08/27/2014
Publication #:
US20150129964
Pub Dt:
05/14/2015
Title:
METHODS OF FORMING A NANOWIRE TRANSISTOR DEVICE
92
Patent #:
9672311
Issue Dt:
06/06/2017
Application #:
14469886
Filing Dt:
08/27/2014
Publication #:
US20160063167
Pub Dt:
03/03/2016
Title:
METHOD AND SYSTEM FOR VIA RETARGETING
93
Patent #:
9318436
Issue Dt:
04/19/2016
Application #:
14470213
Filing Dt:
08/27/2014
Publication #:
US20140361435
Pub Dt:
12/11/2014
Title:
COPPER BASED NITRIDE LINER PASSIVATION LAYERS FOR CONDUCTIVE COPPER STRUCTURES
94
Patent #:
9425289
Issue Dt:
08/23/2016
Application #:
14471038
Filing Dt:
08/28/2014
Publication #:
US20160064526
Pub Dt:
03/03/2016
Title:
METHODS OF FORMING ALTERNATIVE CHANNEL MATERIALS ON FINFET SEMICONDUCTOR DEVICES
95
Patent #:
9147616
Issue Dt:
09/29/2015
Application #:
14471087
Filing Dt:
08/28/2014
Title:
METHODS OF FORMING ISOLATED FINS FOR A FINFET SEMICONDUCTOR DEVICE WITH ALTERNATIVE CHANNEL MATERIALS
96
Patent #:
9391156
Issue Dt:
07/12/2016
Application #:
14471546
Filing Dt:
08/28/2014
Publication #:
US20160064471
Pub Dt:
03/03/2016
Title:
EMBEDDED CAPACITOR
97
Patent #:
9318466
Issue Dt:
04/19/2016
Application #:
14471620
Filing Dt:
08/28/2014
Publication #:
US20160064354
Pub Dt:
03/03/2016
Title:
METHOD FOR ELECTRONIC CIRCUIT ASSEMBLY ON A PAPER SUBSTRATE
98
Patent #:
9257530
Issue Dt:
02/09/2016
Application #:
14471660
Filing Dt:
08/28/2014
Publication #:
US20160064515
Pub Dt:
03/03/2016
Title:
METHODS OF MAKING INTEGRATED CIRCUITS AND COMPONENTS THEREOF
99
Patent #:
9412600
Issue Dt:
08/09/2016
Application #:
14471812
Filing Dt:
08/28/2014
Publication #:
US20160064228
Pub Dt:
03/03/2016
Title:
METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A FERROELECTRIC MATERIAL AND SEMICONDUCTOR STRUCTURE INCLUDING A FERROELECTRIC TRANSISTOR
100
Patent #:
9342245
Issue Dt:
05/17/2016
Application #:
14472426
Filing Dt:
08/29/2014
Publication #:
US20150067294
Pub Dt:
03/05/2015
Title:
METHOD AND SYSTEM FOR ALLOCATING A RESOURCE OF A STORAGE DEVICE TO A STORAGE OPTIMIZATION OPERATION
Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES INC.
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

Search Results as of: 05/21/2024 11:53 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT