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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
Page 143 of 146
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Patent #:	9911825	Issue Dt:	03/06/2018	Application #:	15443522	Filing Dt:	02/27/2017
Publication #:	US20170170293	Pub Dt:	06/15/2017
Title:	INTEGRATED CIRCUITS WITH SPACER CHAMFERING AND METHODS OF SPACER CHAMFERING

Patent #:	9899259	Issue Dt:	02/20/2018	Application #:	15443523	Filing Dt:	02/27/2017
Publication #:	US20170170070	Pub Dt:	06/15/2017
Title:	GATE TIE-DOWN ENABLEMENT WITH INNER SPACER

Patent #:	9935168	Issue Dt:	04/03/2018	Application #:	15445481	Filing Dt:	02/28/2017
Publication #:	US20170170266	Pub Dt:	06/15/2017
Title:	GATE CONTACT WITH VERTICAL ISOLATION FROM SOURCE-DRAIN

Patent #:	9881669	Issue Dt:	01/30/2018	Application #:	15446091	Filing Dt:	03/01/2017
Title:	WORDLINE DRIVER WITH INTEGRATED VOLTAGE LEVEL SHIFT FUNCTION

Patent #:	9831317	Issue Dt:	11/28/2017	Application #:	15447639	Filing Dt:	03/02/2017
Title:	BURIED CONTACT STRUCTURES FOR A VERTICAL FIELD-EFFECT TRANSISTOR

Patent #:	9899257	Issue Dt:	02/20/2018	Application #:	15448873	Filing Dt:	03/03/2017
Title:	ETCH STOP LINER FOR CONTACT PUNCH THROUGH MITIGATION IN SOI SUBSTRATE

Patent #:	9911474	Issue Dt:	03/06/2018	Application #:	15451470	Filing Dt:	03/07/2017
Title:	FEEDBACK CIRCUIT AT WORDLINE ENDS

Patent #:	10249726	Issue Dt:	04/02/2019	Application #:	15451565	Filing Dt:	03/07/2017
Publication #:	US20170179246	Pub Dt:	06/22/2017
Title:	METHODS OF FORMING A PROTECTION LAYER ON A SEMICONDUCTOR DEVICE AND THE RESULTING DEVICE

Patent #:	9865681	Issue Dt:	01/09/2018	Application #:	15453170	Filing Dt:	03/08/2017
Title:	NANOWIRE TRANSISTORS HAVING MULTIPLE THRESHOLD VOLTAGES

Patent #:	9923082	Issue Dt:	03/20/2018	Application #:	15453939	Filing Dt:	03/09/2017
Publication #:	US20170179257	Pub Dt:	06/22/2017
Title:	JUNCTION BUTTING STRUCTURE USING NONUNIFORM TRENCH SHAPE

Patent #:	10020386	Issue Dt:	07/10/2018	Application #:	15454511	Filing Dt:	03/09/2017
Title:	HIGH-VOLTAGE AND ANALOG BIPOLAR DEVICES

Patent #:	9793294	Issue Dt:	10/17/2017	Application #:	15455588	Filing Dt:	03/10/2017
Title:	JUNCTION FORMATION WITH REDUCED CEFF FOR 22NM FDSOI DEVICES

Patent #:	9905694	Issue Dt:	02/27/2018	Application #:	15457017	Filing Dt:	03/13/2017
Publication #:	US20180026137	Pub Dt:	01/25/2018
Title:	FIN-TYPE FIELD-EFFECT TRANSISTORS WITH STRAINED CHANNELS

Patent #:	10103224	Issue Dt:	10/16/2018	Application #:	15457384	Filing Dt:	03/13/2017
Publication #:	US20170288015	Pub Dt:	10/05/2017
Title:	SEMICONDUCTOR STRUCTURE INCLUDING A TRENCH CAPPING LAYER

Patent #:	9891039	Issue Dt:	02/13/2018	Application #:	15458124	Filing Dt:	03/14/2017
Title:	METHOD AND DEVICE FOR MEASURING PLATING RING ASSEMBLY DIMENSIONS

Patent #:	10002827	Issue Dt:	06/19/2018	Application #:	15458140	Filing Dt:	03/14/2017
Publication #:	US20170186687	Pub Dt:	06/29/2017
Title:	METHOD FOR SELECTIVE RE-ROUTING OF SELECTED AREAS IN A TARGET LAYER AND IN ADJACENT INTERCONNECTING LAYERS OF AN IC DEVICE

Patent #:	9997695	Issue Dt:	06/12/2018	Application #:	15458316	Filing Dt:	03/14/2017
Publication #:	US20170222126	Pub Dt:	08/03/2017
Title:	METHODS TO UTILIZE PIEZOELECTRIC MATERIALS AS GATE DIELECTRIC IN HIGH FREQUENCY RBTs IN AN IC DEVICE

Patent #:	9871096	Issue Dt:	01/16/2018	Application #:	15459450	Filing Dt:	03/15/2017
Publication #:	US20170250243	Pub Dt:	08/31/2017
Title:	SERIAL CAPACITOR DEVICE WITH MIDDLE ELECTRODE CONTACT

Patent #:	10014364	Issue Dt:	07/03/2018	Application #:	15460914	Filing Dt:	03/16/2017
Title:	ON-CHIP RESISTORS WITH A TUNABLE TEMPERATURE COEFFICIENT OF RESISTANCE

Patent #:	NONE	Issue Dt:		Application #:	15460976	Filing Dt:	03/16/2017
Publication #:	US20170186688	Pub Dt:	06/29/2017
Title:	METHODS AND DEVICES FOR METAL FILLING PROCESSES

Patent #:	10068835	Issue Dt:	09/04/2018	Application #:	15461538	Filing Dt:	03/17/2017
Publication #:	US20170186669	Pub Dt:	06/29/2017
Title:	PROCESS FLOW FOR A COMBINED CA AND TSV OXIDE DEPOSITION

Patent #:	9985135	Issue Dt:	05/29/2018	Application #:	15462644	Filing Dt:	03/17/2017
Publication #:	US20170194499	Pub Dt:	07/06/2017
Title:	REPLACEMENT LOW-K SPACER

Patent #:	9892926	Issue Dt:	02/13/2018	Application #:	15462657	Filing Dt:	03/17/2017
Publication #:	US20170194153	Pub Dt:	07/06/2017
Title:	REPLACEMENT LOW-K SPACER

Patent #:	10033383	Issue Dt:	07/24/2018	Application #:	15463316	Filing Dt:	03/20/2017
Title:	PROGRAMMABLE LOGIC ELEMENTS AND METHODS OF OPERATING THE SAME

Patent #:	9966128	Issue Dt:	05/08/2018	Application #:	15463394	Filing Dt:	03/20/2017
Title:	STORAGE STRUCTURE WITH NON-VOLATILE STORAGE CAPABILITY AND A METHOD OF OPERATING THE SAME

Patent #:	9893765	Issue Dt:	02/13/2018	Application #:	15464397	Filing Dt:	03/21/2017
Title:	TRANSMISSION SYSTEM HAVING DUPLICATE TRANSMISSION SYSTEMS FOR INDIVIDUALIZED PRECHARGE AND OUTPUT TIMING

Patent #:	10002793	Issue Dt:	06/19/2018	Application #:	15464591	Filing Dt:	03/21/2017
Title:	SUB-FIN DOPING METHOD

Patent #:	9899417	Issue Dt:	02/20/2018	Application #:	15467305	Filing Dt:	03/23/2017
Publication #:	US20170200743	Pub Dt:	07/13/2017
Title:	SEMICONDUCTOR STRUCTURE INCLUDING A FIRST TRANSISTOR AND A SECOND TRANSISTOR

Patent #:	9853612	Issue Dt:	12/26/2017	Application #:	15467589	Filing Dt:	03/23/2017
Title:	PEAKING AMPLIFIER FREQUENCY TUNING

Patent #:	10033334	Issue Dt:	07/24/2018	Application #:	15467610	Filing Dt:	03/23/2017
Title:	PEAKING AMPLIFIER FREQUENCY TUNING

Patent #:	9960738	Issue Dt:	05/01/2018	Application #:	15467617	Filing Dt:	03/23/2017
Title:	PEAKING AMPLIFIER FREQUENCY TUNING

Patent #:	10008456	Issue Dt:	06/26/2018	Application #:	15469983	Filing Dt:	03/27/2017
Title:	LAMINATED SPACERS FOR FIELD-EFFECT TRANSISTORS

Patent #:	NONE	Issue Dt:		Application #:	15470006	Filing Dt:	03/27/2017
Publication #:	US20170207122	Pub Dt:	07/20/2017
Title:	SELF-ALIGNED DEVICE LEVEL CONTACT STRUCTURES

Patent #:	9773885	Issue Dt:	09/26/2017	Application #:	15471733	Filing Dt:	03/28/2017
Publication #:	US20170200807	Pub Dt:	07/13/2017
Title:	SELF ALIGNED GATE SHAPE PREVENTING VOID FORMATION

Patent #:	9935179	Issue Dt:	04/03/2018	Application #:	15472556	Filing Dt:	03/29/2017
Publication #:	US20170200812	Pub Dt:	07/13/2017
Title:	METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH FILLED GATE LINE END RECESSES

Patent #:	10068978	Issue Dt:	09/04/2018	Application #:	15472924	Filing Dt:	03/29/2017
Publication #:	US20170200797	Pub Dt:	07/13/2017
Title:	METHODS, APPARATUS AND SYSTEM FOR PROVIDING SOURCE-DRAIN EPITAXY LAYER WITH LATERAL OVER-GROWTH SUPPRESSION

Patent #:	10290582	Issue Dt:	05/14/2019	Application #:	15473371	Filing Dt:	03/29/2017
Publication #:	US20170207165	Pub Dt:	07/20/2017
Title:	METHOD, APPARATUS, AND SYSTEM FOR OFFSET METAL POWER RAIL FOR CELL DESIGN

Patent #:	10114282	Issue Dt:	10/30/2018	Application #:	15474408	Filing Dt:	03/30/2017
Publication #:	US20170205703	Pub Dt:	07/20/2017
Title:	SAMPLING FOR OPC MODEL BUILDING

Patent #:	10361132	Issue Dt:	07/23/2019	Application #:	15476158	Filing Dt:	03/31/2017
Publication #:	US20170207134	Pub Dt:	07/20/2017
Title:	STRUCTURES WITH THINNED DIELECTRIC MATERIAL

Patent #:	10163697	Issue Dt:	12/25/2018	Application #:	15478385	Filing Dt:	04/04/2017
Publication #:	US20170207121	Pub Dt:	07/20/2017
Title:	METHOD FOR FORMING BEOL METAL LEVELS WITH MULTIPLE DIELECTRIC LAYERS FOR IMPROVED DIELECTRIC TO METAL ADHESION

Patent #:	9786333	Issue Dt:	10/10/2017	Application #:	15478820	Filing Dt:	04/04/2017
Publication #:	US20170206938	Pub Dt:	07/20/2017
Title:	DUAL-BIT 3-T HIGH DENSITY MTPROM ARRAY

Patent #:	9847391	Issue Dt:	12/19/2017	Application #:	15479801	Filing Dt:	04/05/2017
Title:	STACKED NANOSHEET FIELD-EFFECT TRANSISTOR WITH DIODE ISOLATION

Patent #:	10054974	Issue Dt:	08/21/2018	Application #:	15480931	Filing Dt:	04/06/2017
Title:	CURRENT MIRROR DEVICES USING CASCODE WITH BACK-GATE BIAS

Patent #:	10147715	Issue Dt:	12/04/2018	Application #:	15481202	Filing Dt:	04/06/2017
Publication #:	US20180026028	Pub Dt:	01/25/2018
Title:	METHODS FOR AN ESD PROTECTION CIRCUIT INCLUDING TRIGGER-VOLTAGE TUNABLE CASCODE TRANSISTORS

Patent #:	9935180	Issue Dt:	04/03/2018	Application #:	15482040	Filing Dt:	04/07/2017
Publication #:	US20170243956	Pub Dt:	08/24/2017
Title:	FIN CUT FOR TAPER DEVICE

Patent #:	10204991	Issue Dt:	02/12/2019	Application #:	15482086	Filing Dt:	04/07/2017
Publication #:	US20170213890	Pub Dt:	07/27/2017
Title:	TRANSISTOR STRUCTURES AND FABRICATION METHODS THEREOF

Patent #:	10041183	Issue Dt:	08/07/2018	Application #:	15482938	Filing Dt:	04/10/2017
Publication #:	US20170211199	Pub Dt:	07/27/2017
Title:	ELECTRODEPOSITION SYSTEMS AND METHODS THAT MINIMIZE ANODE AND/OR PLATING SOLUTION DEGRADATION

Patent #:	9972621	Issue Dt:	05/15/2018	Application #:	15483344	Filing Dt:	04/10/2017
Title:	FIN STRUCTURE IN SUBLITHO DIMENSION FOR HIGH PERFORMANCE CMOS APPLICATION

Patent #:	9984893	Issue Dt:	05/29/2018	Application #:	15483346	Filing Dt:	04/10/2017
Publication #:	US20170213741	Pub Dt:	07/27/2017
Title:	FIN CUT FOR TAPER DEVICE

Patent #:	10957544	Issue Dt:	03/23/2021	Application #:	15484173	Filing Dt:	04/11/2017
Publication #:	US20170221721	Pub Dt:	08/03/2017
Title:	GATE CUT WITH HIGH SELECTIVITY TO PRESERVE INTERLEVEL DIELECTRIC LAYER

Patent #:	10236253	Issue Dt:	03/19/2019	Application #:	15484309	Filing Dt:	04/11/2017
Publication #:	US20170221808	Pub Dt:	08/03/2017
Title:	SELF-ALIGNED LOCAL INTERCONNECT TECHNOLOGY

Patent #:	NONE	Issue Dt:		Application #:	15485657	Filing Dt:	04/12/2017
Publication #:	US20170236780	Pub Dt:	08/17/2017
Title:	INTEGRATED CIRCUIT HAVING IMPROVED ELECTROMIGRATION PERFORMANCE AND METHOD OF FORMING SAME

Patent #:	9818836	Issue Dt:	11/14/2017	Application #:	15486387	Filing Dt:	04/13/2017
Title:	GATE CUT METHOD FOR REPLACEMENT METAL GATE INTEGRATION

Patent #:	10014296	Issue Dt:	07/03/2018	Application #:	15487636	Filing Dt:	04/14/2017
Title:	FIN-TYPE FIELD EFFECT TRANSISTORS WITH SINGLE-DIFFUSION BREAKS AND METHOD

Patent #:	9831175	Issue Dt:	11/28/2017	Application #:	15489404	Filing Dt:	04/17/2017
Publication #:	US20170221823	Pub Dt:	08/03/2017
Title:	METHOD, APPARATUS, AND SYSTEM FOR E-FUSE IN ADVANCED CMOS TECHNOLOGIES

Patent #:	10008576	Issue Dt:	06/26/2018	Application #:	15490180	Filing Dt:	04/18/2017
Publication #:	US20170222015	Pub Dt:	08/03/2017
Title:	EPI FACET HEIGHT UNIFORMITY IMPROVEMENT FOR FDSOI TECHNOLOGIES

Patent #:	9966338	Issue Dt:	05/08/2018	Application #:	15490181	Filing Dt:	04/18/2017
Title:	PRE-SPACER SELF-ALIGNED CUT FORMATION

Patent #:	9960271	Issue Dt:	05/01/2018	Application #:	15490255	Filing Dt:	04/18/2017
Title:	METHOD OF FORMING VERTICAL FIELD EFFECT TRANSISTORS WITH DIFFERENT THRESHOLD VOLTAGES AND THE RESULTING INTEGRATED CIRCUIT STRUCTURE

Patent #:	10056373	Issue Dt:	08/21/2018	Application #:	15490702	Filing Dt:	04/18/2017
Publication #:	US20170221886	Pub Dt:	08/03/2017
Title:	TRANSISTOR CONTACTS SELF-ALIGNED IN TWO DIMENSIONS

Patent #:	9922972	Issue Dt:	03/20/2018	Application #:	15491222	Filing Dt:	04/19/2017
Title:	EMBEDDED SILICON CARBIDE BLOCK PATTERNING

Patent #:	10014370	Issue Dt:	07/03/2018	Application #:	15491420	Filing Dt:	04/19/2017
Title:	AIR GAP ADJACENT A BOTTOM SOURCE/DRAIN REGION OF VERTICAL TRANSISTOR DEVICE

Patent #:	NONE	Issue Dt:		Application #:	15491465	Filing Dt:	04/19/2017
Publication #:	US20170222054	Pub Dt:	08/03/2017
Title:	SEMICONDUCTOR STRUCTURE(S) WITH EXTENDED SOURCE/DRAIN CHANNEL INTERFACES AND METHODS OF FABRICATION

Patent #:	10056303	Issue Dt:	08/21/2018	Application #:	15494119	Filing Dt:	04/21/2017
Title:	INTEGRATION SCHEME FOR GATE HEIGHT CONTROL AND VOID FREE RMG FILL

Patent #:	9905424	Issue Dt:	02/27/2018	Application #:	15494803	Filing Dt:	04/24/2017
Title:	SELF-ALIGNED NON-MANDREL CUT FORMATION FOR TONE INVERSION

Patent #:	10003302	Issue Dt:	06/19/2018	Application #:	15496049	Filing Dt:	04/25/2017
Publication #:	US20170230004	Pub Dt:	08/10/2017
Title:	MODIFIED TUNNELING FIELD EFFECT TRANSISTORS AND FABRICATION METHODS

Patent #:	9953927	Issue Dt:	04/24/2018	Application #:	15497828	Filing Dt:	04/26/2017
Title:	LINER REPLACEMENTS FOR INTERCONNECT OPENINGS

Patent #:	10297589	Issue Dt:	05/21/2019	Application #:	15497924	Filing Dt:	04/26/2017
Publication #:	US20170229443	Pub Dt:	08/10/2017
Title:	ELECTROSTATIC DISCHARGE AND PASSIVE STRUCTURES INTEGRATED IN A VERTICAL GATE FIN-TYPE FIELD EFFECT DIODE

Patent #:	10032891	Issue Dt:	07/24/2018	Application #:	15498652	Filing Dt:	04/27/2017
Publication #:	US20170271484	Pub Dt:	09/21/2017
Title:	FINFET BASED FLASH MEMORY CELL

Patent #:	NONE	Issue Dt:		Application #:	15499222	Filing Dt:	04/27/2017
Publication #:	US20170229450	Pub Dt:	08/10/2017
Title:	FIELD EFFECT TRANSISTORS WITH VARYING THRESHOLD VOLTAGES

Patent #:	10178718	Issue Dt:	01/08/2019	Application #:	15531458	Filing Dt:	05/29/2017
Publication #:	US20170273153	Pub Dt:	09/21/2017
Title:	A SYSTEM AND METHOD FOR ACTIVE POWER FACTOR CORRECTION AND CURRENT REGULATION IN LED CIRCUIT

Patent #:	NONE	Issue Dt:		Application #:	15531459	Filing Dt:	05/29/2017
Publication #:	US20170273150	Pub Dt:	09/21/2017
Title:	DYNAMIC BLEED SYSTEM AND METHOD FOR DYNAMIC LOADING OF A DIMMER USING EVENT DRIVEN ARCHITECTURE

Patent #:	10349482	Issue Dt:	07/09/2019	Application #:	15531460	Filing Dt:	05/29/2017
Publication #:	US20180295692	Pub Dt:	10/11/2018
Title:	SYSTEM AND METHOD TO REGULATE PRIMARY SIDE CURRENT USING AN EVENT DRIVEN ARCHITECTURE IN LED CIRCUIT

Patent #:	9887135	Issue Dt:	02/06/2018	Application #:	15581510	Filing Dt:	04/28/2017
Title:	METHODS FOR PROVIDING VARIABLE FEATURE WIDTHS IN A SELF-ALIGNED SPACER-MASK PATTERNING PROCESS

Patent #:	9887094	Issue Dt:	02/06/2018	Application #:	15585800	Filing Dt:	05/03/2017
Title:	METHODS OF FORMING EPI SEMICONDUCTOR MATERIAL ON THE SOURCE/DRAIN REGIONS OF A FINFET DEVICE

Patent #:	9817940	Issue Dt:	11/14/2017	Application #:	15585972	Filing Dt:	05/03/2017
Publication #:	US20170235866	Pub Dt:	08/17/2017
Title:	METHOD WHEREIN TEST CELLS AND DUMMY CELLS ARE INCLUDED INTO A LAYOUT OF AN INTEGRATED CIRCUIT

Patent #:	9911738	Issue Dt:	03/06/2018	Application #:	15586621	Filing Dt:	05/04/2017
Title:	VERTICAL-TRANSPORT FIELD-EFFECT TRANSISTORS WITH A DAMASCENE GATE STRAP

Patent #:	10008496	Issue Dt:	06/26/2018	Application #:	15589139	Filing Dt:	05/08/2017
Title:	METHOD FOR FORMING SEMICONDUCTOR DEVICE HAVING CONTINUOUS FIN DIFFUSION BREAK

Patent #:	9935104	Issue Dt:	04/03/2018	Application #:	15589292	Filing Dt:	05/08/2017
Title:	FIN-TYPE FIELD EFFECT TRANSISTORS WITH SINGLE-DIFFUSION BREAKS AND METHOD

Patent #:	10014297	Issue Dt:	07/03/2018	Application #:	15589312	Filing Dt:	05/08/2017
Title:	METHODS OF FORMING INTEGRATED CIRCUIT STRUCTURE USING EXTREME ULTRAVIOLET PHOTOLITHOGRAPHY TECHNIQUE AND RELATED INTEGRATED CIRCUIT STRUCTURE

Patent #:	10026693	Issue Dt:	07/17/2018	Application #:	15589829	Filing Dt:	05/08/2017
Publication #:	US20170243823	Pub Dt:	08/24/2017
Title:	METHOD, APPARATUS, AND SYSTEM FOR MOL INTERCONNECTS WITHOUT TITANIUM LINER

Patent #:	10347729	Issue Dt:	07/09/2019	Application #:	15590459	Filing Dt:	05/09/2017
Publication #:	US20170365676	Pub Dt:	12/21/2017
Title:	DEVICE FOR IMPROVING PERFORMANCE THROUGH GATE CUT LAST PROCESS

Patent #:	10043713	Issue Dt:	08/07/2018	Application #:	15591814	Filing Dt:	05/10/2017
Title:	METHOD TO REDUCE FINFET SHORT CHANNEL GATE HEIGHT

Patent #:	9899525	Issue Dt:	02/20/2018	Application #:	15592597	Filing Dt:	05/11/2017
Publication #:	US20170250285	Pub Dt:	08/31/2017
Title:	INCREASED CONTACT AREA FOR FINFETS

Patent #:	10014214	Issue Dt:	07/03/2018	Application #:	15593496	Filing Dt:	05/12/2017
Publication #:	US20170250111	Pub Dt:	08/31/2017
Title:	ELECTRONIC DEVICE INCLUDING MOAT POWER METALLIZATION IN TRENCH

Patent #:	NONE	Issue Dt:		Application #:	15594059	Filing Dt:	05/12/2017
Publication #:	US20170323855	Pub Dt:	11/09/2017
Title:	LASER SCRIBE STRUCTURES FOR A WAFER

Patent #:	9929247	Issue Dt:	03/27/2018	Application #:	15594757	Filing Dt:	05/15/2017
Publication #:	US20170250262	Pub Dt:	08/31/2017
Title:	ETCH STOP FOR AIRGAP PROTECTION

Patent #:	9954137	Issue Dt:	04/24/2018	Application #:	15594951	Filing Dt:	05/15/2017
Publication #:	US20170250306	Pub Dt:	08/31/2017
Title:	PHOTODETECTOR AND METHODS OF MANUFACTURE

Patent #:	10643894	Issue Dt:	05/05/2020	Application #:	15597650	Filing Dt:	05/17/2017
Publication #:	US20180006141	Pub Dt:	01/04/2018
Title:	SURFACE AREA AND SCHOTTKY BARRIER HEIGHT ENGINEERING FOR CONTACT TRENCH EPITAXY

Patent #:	9905473	Issue Dt:	02/27/2018	Application #:	15598447	Filing Dt:	05/18/2017
Title:	SELF-ALIGNED CONTACT ETCH FOR FABRICATING A FINFET

Patent #:	10685847	Issue Dt:	06/16/2020	Application #:	15598905	Filing Dt:	05/18/2017
Publication #:	US20170263465	Pub Dt:	09/14/2017
Title:	VERTICAL NANOWIRES FORMED ON UPPER FIN SURFACE

Patent #:	NONE	Issue Dt:		Application #:	15599026	Filing Dt:	05/18/2017
Publication #:	US20170256455	Pub Dt:	09/07/2017
Title:	METHODS TO FORM MULTI THRESHOLD-VOLTAGE DUAL CHANNEL WITHOUT CHANNEL DOPING

Patent #:	10388691	Issue Dt:	08/20/2019	Application #:	15599427	Filing Dt:	05/18/2017
Publication #:	US20170338275	Pub Dt:	11/23/2017
Title:	LIGHT EMITTING DIODES (LEDS) WITH STACKED MULTI-COLOR PIXELS FOR DISPLAYS

Patent #:	9941329	Issue Dt:	04/10/2018	Application #:	15599438	Filing Dt:	05/18/2017
Publication #:	US20170338276	Pub Dt:	11/23/2017
Title:	LIGHT EMITTING DIODES (LEDs) WITH INTEGRATED CMOS CIRCUITS

Patent #:	9941330	Issue Dt:	04/10/2018	Application #:	15599458	Filing Dt:	05/18/2017
Publication #:	US20170338277	Pub Dt:	11/23/2017
Title:	LEDS WITH THREE COLOR RGB PIXELS FOR DISPLAYS

Patent #:	10037981	Issue Dt:	07/31/2018	Application #:	15599465	Filing Dt:	05/18/2017
Publication #:	US20170358562	Pub Dt:	12/14/2017
Title:	INTEGRATED DISPLAY SYSTEM WITH MULTI-COLOR LIGHT EMITTING DIODES (LEDS)

Patent #:	9935112	Issue Dt:	04/03/2018	Application #:	15599581	Filing Dt:	05/19/2017
Title:	SRAM CELL HAVING DUAL PASS GATE TRANSISTORS AND METHOD OF MAKING THE SAME

Patent #:	NONE	Issue Dt:		Application #:	15599751	Filing Dt:	05/19/2017
Publication #:	US20170256541	Pub Dt:	09/07/2017
Title:	METHOD OF FORMING SUPER STEEP RETROGRADE WELLS ON FINFET

Patent #:	9960233	Issue Dt:	05/01/2018	Application #:	15600837	Filing Dt:	05/22/2017
Publication #:	US20170263707	Pub Dt:	09/14/2017
Title:	EXPITAXIALLY REGROWN HETEROSTRUCTURE NANOWIRE LATERAL TUNNEL FIELD EFFECT TRANSISTOR

Patent #:	9947589	Issue Dt:	04/17/2018	Application #:	15600874	Filing Dt:	05/22/2017
Title:	METHODS OF FORMING A GATE CONTACT FOR A TRANSISTOR ABOVE AN ACTIVE REGION AND THE RESULTING DEVICE

100

Patent #:	9972606	Issue Dt:	05/15/2018	Application #:	15604803	Filing Dt:	05/25/2017
Publication #:	US20170271309	Pub Dt:	09/21/2017
Title:	THREE-DIMENSIONAL HYBRID PACKAGING WITH THROUGH-SILICON-VIAS AND TAPE-AUTOMATED-BONDING

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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