USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Assignments on the Web > Patent Query

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
Page 21 of 146
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146

Patent #:	6762367	Issue Dt:	07/13/2004	Application #:	10246147	Filing Dt:	09/17/2002
Publication #:	US20040050585	Pub Dt:	03/18/2004
Title:	METHOD TO OBTAIN HIGH DENSITY SIGNAL WIRES WITH LOW RESISTANCE IN AN ELECTRONIC PACKAGE

Patent #:	6709951	Issue Dt:	03/23/2004	Application #:	10246252	Filing Dt:	09/18/2002
Publication #:	US20030015736	Pub Dt:	01/23/2003
Title:	OXYNITRIDE SHALLOW TRENCH ISOLATION AND METHOD OF FORMATION

Patent #:	6605848	Issue Dt:	08/12/2003	Application #:	10246267	Filing Dt:	09/18/2002
Publication #:	US20030098487	Pub Dt:	05/29/2003
Title:	SEMICONDUCTOR DEVICE WITH METAL GATE ELECTRODE AND SILICON OXYNITRIDE SPACER

Patent #:	7033873	Issue Dt:	04/25/2006	Application #:	10246572	Filing Dt:	09/18/2002
Title:	METHODS OF CONTROLLING GATE ELECTRODE DOPING, AND SYSTEMS FOR ACCOMPLISHING SAME

Patent #:	6624499	Issue Dt:	09/23/2003	Application #:	10247415	Filing Dt:	09/19/2002
Publication #:	US20030160297	Pub Dt:	08/28/2003
Title:	SYSTEM FOR PROGRAMMING FUSE STRUCTURE BY ELECTROMIGRATION OF SILICIDE ENHANCED BY CREATING TEMPERATURE GRADIENT

Patent #:	6797610	Issue Dt:	09/28/2004	Application #:	10248019	Filing Dt:	12/11/2002
Title:	SUBLITHOGRAPHIC PATTERNING USING MICROTRENCHING

Patent #:	6986116	Issue Dt:	01/10/2006	Application #:	10248302	Filing Dt:	01/07/2003
Publication #:	US20040133865	Pub Dt:	07/08/2004
Title:	SIGNAL BALANCING BETWEEN VOLTAGE DOMAINS

Patent #:	7249358	Issue Dt:	07/24/2007	Application #:	10248303	Filing Dt:	01/07/2003
Publication #:	US20040133892	Pub Dt:	07/08/2004
Title:	A METHOD AND APPARATUS FOR DYNAMICALLY ALLOCATING PROCESSORS

Patent #:	6924661	Issue Dt:	08/02/2005	Application #:	10248696	Filing Dt:	02/10/2003
Publication #:	US20040155681	Pub Dt:	08/12/2004
Title:	POWER SWITCH CIRCUIT SIZING TECHNIQUE

Patent #:	6803270	Issue Dt:	10/12/2004	Application #:	10248819	Filing Dt:	02/21/2003
Publication #:	US20040166624	Pub Dt:	08/26/2004
Title:	CMOS PERFORMANCE ENHANCEMENT USING LOCALIZED VOIDS AND EXTENDED DEFECTS

Patent #:	7185215	Issue Dt:	02/27/2007	Application #:	10248838	Filing Dt:	02/24/2003
Publication #:	US20040168097	Pub Dt:	08/26/2004
Title:	MACHINE CODE BUILDER DERIVED POWER CONSUMPTION REDUCTION

Patent #:	7302376	Issue Dt:	11/27/2007	Application #:	10248853	Filing Dt:	02/25/2003
Publication #:	US20040034517	Pub Dt:	02/19/2004
Title:	DEVICE MODELING FOR PROXIMITY EFFECTS

Patent #:	6826113	Issue Dt:	11/30/2004	Application #:	10249273	Filing Dt:	03/27/2003
Publication #:	US20040190365	Pub Dt:	09/30/2004
Title:	SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY DEVICE HAVING MEMORY COMMAND CANCEL FUNCTION

Patent #:	6993671	Issue Dt:	01/31/2006	Application #:	10249291	Filing Dt:	03/28/2003
Publication #:	US20040193933	Pub Dt:	09/30/2004
Title:	HIGH SPEED CLOCK DIVIDER WITH SYNCHRONOUS PHASE START-UP OVER PHYSICALLY DISTRIBUTED SPACE

Patent #:	6790733	Issue Dt:	09/14/2004	Application #:	10249296	Filing Dt:	03/28/2003
Publication #:	US20040191998	Pub Dt:	09/30/2004
Title:	PRESERVING TEOS HARD MASK USING COR FOR RAISED SOURCE-DRAIN INCLUDING REMOVABLE/DISPOSABLE SPACER

Patent #:	6731134	Issue Dt:	05/04/2004	Application #:	10249311	Filing Dt:	03/31/2003
Title:	TRI-STATE DELAY BOOST

Patent #:	7480774	Issue Dt:	01/20/2009	Application #:	10249331	Filing Dt:	04/01/2003
Publication #:	US20040199715	Pub Dt:	10/07/2004
Title:	METHOD FOR PERFORMING A COMMAND CANCEL FUNCTION IN A DRAM

Patent #:	6747890	Issue Dt:	06/08/2004	Application #:	10249347	Filing Dt:	04/02/2003
Title:	GAIN CELL STRUCTURE WITH DEEP TRENCH CAPACITOR

Patent #:	7018746	Issue Dt:	03/28/2006	Application #:	10249509	Filing Dt:	04/15/2003
Publication #:	US20040209169	Pub Dt:	10/21/2004
Title:	METHOD OF VERIFYING THE PLACEMENT OF SUB-RESOLUTION ASSIST FEATURES IN A PHOTOMASK LAYOUT

Patent #:	6891357	Issue Dt:	05/10/2005	Application #:	10249545	Filing Dt:	04/17/2003
Publication #:	US20040207379	Pub Dt:	10/21/2004
Title:	REFERENCE CURRENT GENERATION SYSTEM AND METHOD

Patent #:	6940117	Issue Dt:	09/06/2005	Application #:	10249550	Filing Dt:	04/17/2003
Publication #:	US20040104420	Pub Dt:	06/03/2004
Title:	PREVENTION OF TA2O5 MIM CAP SHORTING IN THE BEOL ANNEAL CYCLES

Patent #:	6780695	Issue Dt:	08/24/2004	Application #:	10249563	Filing Dt:	04/18/2003
Title:	BICMOS INTEGRATION SCHEME WITH RAISED EXTRINSIC BASE

Patent #:	7855130	Issue Dt:	12/21/2010	Application #:	10249576	Filing Dt:	04/21/2003
Publication #:	US20040209443	Pub Dt:	10/21/2004
Title:	CORROSION INHIBITOR ADDITIVES TO PREVENT SEMICONDUCTOR DEVICE BOND-PAD CORROSION DURING WAFER DICING OPERATIONS

Patent #:	6825711	Issue Dt:	11/30/2004	Application #:	10249684	Filing Dt:	04/30/2003
Publication #:	US20040217805	Pub Dt:	11/04/2004
Title:	POWER REDUCTION BY STAGE IN INTEGRATED CIRCUIT

Patent #:	6680681	Issue Dt:	01/20/2004	Application #:	10249795	Filing Dt:	05/08/2003
Title:	HIGH SPEED FIR TRANSMITTER

Patent #:	6809024	Issue Dt:	10/26/2004	Application #:	10249821	Filing Dt:	05/09/2003
Publication #:	US20040222497	Pub Dt:	11/11/2004
Title:	METHOD TO FABRICATE HIGH-PERFORMANCE NPN TRANSISTORS IN A BICMOS PROCESS

Patent #:	6777147	Issue Dt:	08/17/2004	Application #:	10249944	Filing Dt:	05/21/2003
Title:	METHOD FOR EVALUATING THE EFFECTS OF MULTIPLE EXPOSURE PROCESSES IN LITHOGRAPHY

Patent #:	6790739	Issue Dt:	09/14/2004	Application #:	10249997	Filing Dt:	05/27/2003
Publication #:	US20030186502	Pub Dt:	10/02/2003
Title:	STRUCTURE AND METHODS FOR PROCESS INTEGRATION IN VERTICAL DRAM CELL FABRICATION

Patent #:	6937054	Issue Dt:	08/30/2005	Application #:	10250043	Filing Dt:	05/30/2003
Publication #:	US20040239369	Pub Dt:	12/02/2004
Title:	PROGRAMMABLE PEAKING RECEIVER AND METHOD

Patent #:	6777302	Issue Dt:	08/17/2004	Application #:	10250100	Filing Dt:	06/04/2003
Title:	NITRIDE PEDESTAL FOR RAISED EXTRINSIC BASE HBT PROCESS

Patent #:	6964897	Issue Dt:	11/15/2005	Application #:	10250157	Filing Dt:	06/09/2003
Publication #:	US20040248363	Pub Dt:	12/09/2004
Title:	SOI TRENCH CAPACITOR CELL INCORPORATING A LOW-LEAKAGE FLOATING BODY ARRAY TRANSISTOR

Patent #:	6853234	Issue Dt:	02/08/2005	Application #:	10250159	Filing Dt:	06/09/2003
Publication #:	US20040246038	Pub Dt:	12/09/2004
Title:	LEVEL SHIFT CIRCUITRY HAVING DELAY BOOST

Patent #:	7046572	Issue Dt:	05/16/2006	Application #:	10250233	Filing Dt:	06/16/2003
Publication #:	US20040252573	Pub Dt:	12/16/2004
Title:	LOW POWER MANAGER FOR STANDBY OPERATION OF MEMORY SYSTEM

Patent #:	6787838	Issue Dt:	09/07/2004	Application #:	10250259	Filing Dt:	06/18/2003
Title:	TRENCH CAPACITOR DRAM CELL USING BURIED OXIDE AS ARRAY TOP OXIDE

Patent #:	7289659	Issue Dt:	10/30/2007	Application #:	10250295	Filing Dt:	06/20/2003
Publication #:	US20040258294	Pub Dt:	12/23/2004
Title:	METHOD AND APPARATUS FOR MANUFACTURING DIAMOND SHAPED CHIPS

Patent #:	7243217	Issue Dt:	07/10/2007	Application #:	10254084	Filing Dt:	09/24/2002
Title:	FLOATING POINT UNIT WITH VARIABLE SPEED EXECUTION PIPELINE AND METHOD OF OPERATION

Patent #:	6810296	Issue Dt:	10/26/2004	Application #:	10254209	Filing Dt:	09/25/2002
Publication #:	US20040059456	Pub Dt:	03/25/2004
Title:	CORRELATING AN INLINE PARAMETER TO A DEVICE OPERATION PARAMETER

Patent #:	6679707	Issue Dt:	01/20/2004	Application #:	10254239	Filing Dt:	09/25/2002
Title:	LAND GRID ARRAY CONNECTOR AND METHOD FOR FORMING THE SAME

Patent #:	6746947	Issue Dt:	06/08/2004	Application #:	10254277	Filing Dt:	09/25/2002
Publication #:	US20030116820	Pub Dt:	06/26/2003
Title:	POST-FUSE BLOW CORROSION PREVENTION STRUCTURE FOR COPPER FUSES

Patent #:	6703704	Issue Dt:	03/09/2004	Application #:	10254391	Filing Dt:	09/25/2002
Title:	STRESS REDUCING STIFFENER RING

Patent #:	6756662	Issue Dt:	06/29/2004	Application #:	10254414	Filing Dt:	09/25/2002
Publication #:	US20040056347	Pub Dt:	03/25/2004
Title:	SEMICONDUCTOR CHIP MODULE AND METHOD OF MANUFACTURE OF SAME

Patent #:	6653704	Issue Dt:	11/25/2003	Application #:	10254432	Filing Dt:	09/24/2002
Title:	MAGNETIC MEMORY WITH TUNNEL JUNCTION MEMORY CELLS AND PHASE TRANSITION MATERIAL FOR CONTROLLING CURRENT TO THE CELLS

Patent #:	7115916	Issue Dt:	10/03/2006	Application #:	10255351	Filing Dt:	09/26/2002
Publication #:	US20040061422	Pub Dt:	04/01/2004
Title:	SYSTEM AND METHOD FOR MOLECULAR OPTICAL EMISSION

Patent #:	6677522	Issue Dt:	01/13/2004	Application #:	10255457	Filing Dt:	09/26/2002
Title:	PACKAGE FOR ELECTRONIC COMPONENT

Patent #:	6915496	Issue Dt:	07/05/2005	Application #:	10255469	Filing Dt:	09/26/2002
Publication #:	US20040064793	Pub Dt:	04/01/2004
Title:	APPARATUS AND METHOD FOR INCORPORATING DRIVER SIZING INTO BUFFER INSERTION USING A DELAY PENALTY ESTIMATION TECHNIQUE

Patent #:	6623994	Issue Dt:	09/23/2003	Application #:	10255509	Filing Dt:	09/26/2002
Title:	METHOD FOR CALIBRATING OPTICAL-BASED METROLOGY TOOLS

Patent #:	6744087	Issue Dt:	06/01/2004	Application #:	10256881	Filing Dt:	09/27/2002
Publication #:	US20040061153	Pub Dt:	04/01/2004
Title:	NON-VOLATILE MEMORY USING FERROELECTRIC GATE FIELD-EFFECT TRANSISTORS

Patent #:	7096323	Issue Dt:	08/22/2006	Application #:	10256970	Filing Dt:	09/27/2002
Title:	COMPUTER SYSTEM WITH PROCESSOR CACHE THAT STORES REMOTE CACHE PRESENCE INFORMATION

Patent #:	7115464	Issue Dt:	10/03/2006	Application #:	10259016	Filing Dt:	09/27/2002
Publication #:	US20030164524	Pub Dt:	09/04/2003
Title:	SEMICONDUCTOR DEVICE HAVING DIFFERENT METAL-SEMICONDUCTOR PORTIONS FORMED IN A SEMICONDUCTOR REGION AND A METHOD FOR FABRICATING THE SEMICONDUCTOR DEVICE

Patent #:	7096290	Issue Dt:	08/22/2006	Application #:	10259665	Filing Dt:	09/27/2002
Publication #:	US20030188071	Pub Dt:	10/02/2003
Title:	ON-CHIP HIGH SPEED DATA INTERFACE

Patent #:	7184729	Issue Dt:	02/27/2007	Application #:	10259708	Filing Dt:	09/27/2002
Publication #:	US20030203726	Pub Dt:	10/30/2003
Title:	DIGITAL AUTOMATIC GAIN CONTROL FOR TRANSCEIVER DEVICES

Patent #:	6922738	Issue Dt:	07/26/2005	Application #:	10259710	Filing Dt:	09/27/2002
Publication #:	US20030191874	Pub Dt:	10/09/2003
Title:	ATA/SATA COMBINED CONTROLLER

Patent #:	6859413	Issue Dt:	02/22/2005	Application #:	10260087	Filing Dt:	09/27/2002
Publication #:	US20040062137	Pub Dt:	04/01/2004
Title:	METHOD AND APPARATUS FOR DLL LOCK LATENCY DETECTION

Patent #:	7217657	Issue Dt:	05/15/2007	Application #:	10260926	Filing Dt:	09/30/2002
Publication #:	US20030160198	Pub Dt:	08/28/2003
Title:	SEMICONDUCTOR DEVICE HAVING DIFFERENT METAL SILICIDE PORTIONS AND METHOD FOR FABRICATING THE SEMICONDUCTOR DEVICE

Patent #:	6605838	Issue Dt:	08/12/2003	Application #:	10261219	Filing Dt:	09/30/2002
Title:	PROCESS FLOW FOR THICK ISOLATION COLLAR WITH REDUCED LENGTH

Patent #:	6897664	Issue Dt:	05/24/2005	Application #:	10261390	Filing Dt:	09/30/2002
Title:	LASER BEAM INDUCED PHENOMENA DETECTION

Patent #:	6759702	Issue Dt:	07/06/2004	Application #:	10261559	Filing Dt:	09/30/2002
Publication #:	US20040061161	Pub Dt:	04/01/2004
Title:	MEMORY CELL WITH VERTICAL TRANSISTOR AND TRENCH CAPACITOR WITH REDUCED BURRIED STRAP

Patent #:	7737021	Issue Dt:	06/15/2010	Application #:	10261613	Filing Dt:	09/30/2002
Title:	RESIST TRIM PROCESS TO DEFINE SMALL OPENINGS IN DIELECTRIC LAYERS

Patent #:	6834378	Issue Dt:	12/21/2004	Application #:	10264162	Filing Dt:	10/03/2002
Publication #:	US20040068707	Pub Dt:	04/08/2004
Title:	SYSTEM ON A CHIP BUS WITH AUTOMATIC PIPELINE STAGE INSERTION FOR TIMING CLOSURE

Patent #:	6768694	Issue Dt:	07/27/2004	Application #:	10265591	Filing Dt:	10/07/2002
Publication #:	US20040066695	Pub Dt:	04/08/2004
Title:	METHOD OF ELECTRICALLY BLOWING FUSES UNDER CONTROL OF AN ON-CHIP TESTER INTERFACE APPARATUS

Patent #:	7289572	Issue Dt:	10/30/2007	Application #:	10265755	Filing Dt:	10/07/2002
Publication #:	US20040066855	Pub Dt:	04/08/2004
Title:	METHOD AND SYSTEM FOR SCALABLE PRE-DRIVER TO DRIVER INTERFACE

Patent #:	6737364	Issue Dt:	05/18/2004	Application #:	10266000	Filing Dt:	10/07/2002
Publication #:	US20040067659	Pub Dt:	04/08/2004
Title:	METHOD FOR FABRICATING CRYSTALLINE-DIELECTRIC THIN FILMS AND DEVICES FORMED USING SAME

Patent #:	6968413	Issue Dt:	11/22/2005	Application #:	10266132	Filing Dt:	10/07/2002
Publication #:	US20040068600	Pub Dt:	04/08/2004
Title:	METHOD AND SYSTEM FOR CONFIGURING TERMINATORS IN A SERIAL COMMUNICATION SYSTEM

Patent #:	6766083	Issue Dt:	07/20/2004	Application #:	10268638	Filing Dt:	10/10/2002
Publication #:	US20030072534	Pub Dt:	04/17/2003
Title:	TUNABLE COUPLER DEVICE AND OPTICAL FILTER

Patent #:	6759346	Issue Dt:	07/06/2004	Application #:	10270325	Filing Dt:	10/15/2002
Title:	METHOD OF FORMING DIELECTRIC LAYERS

Patent #:	6801693	Issue Dt:	10/05/2004	Application #:	10272694	Filing Dt:	10/16/2002
Publication #:	US20040208453	Pub Dt:	10/21/2004
Title:	OPTICAL BACKPLANE ARRAY CONNECTOR

Patent #:	6649511	Issue Dt:	11/18/2003	Application #:	10272760	Filing Dt:	10/16/2002
Title:	METHOD OF MANUFACTURING A SEED LAYER WITH ANNEALED REGION FOR INTEGRATED CIRCUIT INTERCONNECTS

Patent #:	6707106	Issue Dt:	03/16/2004	Application #:	10272979	Filing Dt:	10/18/2002
Title:	SEMICONDUCTOR DEVICE WITH TENSILE STRAIN SILICON INTRODUCED BY COMPRESSIVE MATERIAL IN A BURIED OXIDE LAYER

Patent #:	6664604	Issue Dt:	12/16/2003	Application #:	10273306	Filing Dt:	10/18/2002
Title:	METAL GATE STACK WITH ETCH STOP LAYER

Patent #:	7319946	Issue Dt:	01/15/2008	Application #:	10274861	Filing Dt:	10/21/2002
Publication #:	US20040078176	Pub Dt:	04/22/2004
Title:	METHOD FOR ON-CHIP SIGNAL INTEGRITY AND NOISE VERIFICATION USING FREQUENCY DEPENDENT RLC EXTRACTION AND MODELING TECHNIQUES

Patent #:	6833588	Issue Dt:	12/21/2004	Application #:	10274867	Filing Dt:	10/22/2002
Publication #:	US20040075121	Pub Dt:	04/22/2004
Title:	SEMICONDUCTOR DEVICE HAVING A U-SHAPED GATE STRUCTURE

Patent #:	6706571	Issue Dt:	03/16/2004	Application #:	10274951	Filing Dt:	10/22/2002
Title:	METHOD FOR FORMING MULTIPLE STRUCTURES IN A SEMICONDUCTOR DEVICE

Patent #:	6702648	Issue Dt:	03/09/2004	Application #:	10277559	Filing Dt:	10/22/2002
Title:	USE OF SCATTEROMETRY/REFLECTOMETRY TO MEASURE THIN FILM DELAMINATION DURING CMP

Patent #:	6661069	Issue Dt:	12/09/2003	Application #:	10278211	Filing Dt:	10/22/2002
Title:	MICRO-ELECTROMECHANICAL VARACTOR WITH ENHANCED TUNING RANGE

Patent #:	6787852	Issue Dt:	09/07/2004	Application #:	10278420	Filing Dt:	10/23/2002
Title:	SEMICONDUCTOR-ON-INSULATOR (SOI) DEVICE HAVING SOURCE/DRAIN SILICON-GERMANIUM REGIONS

Patent #:	7023093	Issue Dt:	04/04/2006	Application #:	10280283	Filing Dt:	10/24/2002
Publication #:	US20040087135	Pub Dt:	05/06/2004
Title:	VERY LOW EFFECTIVE DIELECTRIC CONSTANT INTERCONNECT STRUCTURES AND METHODS FOR FABRICATING THE SAME

Patent #:	6835983	Issue Dt:	12/28/2004	Application #:	10280661	Filing Dt:	10/25/2002
Publication #:	US20040079993	Pub Dt:	04/29/2004
Title:	SILICON-ON-INSULATOR (SOI) INTEGRATED CIRCUIT (IC) CHIP WITH THE SILICON LAYERS CONSISTING OF REGIONS OF DIFFERENT THICKNESS

Patent #:	6734259	Issue Dt:	05/11/2004	Application #:	10281038	Filing Dt:	10/24/2002
Publication #:	US20040082730	Pub Dt:	04/29/2004
Title:	RESIN COMPOSITION WITH A POLYMERIZING AGENT AND METHOD OF MANUFACTURING PREPREG AND OTHER LAMINATE STRUCTURES THEREFROM

Patent #:	6657223	Issue Dt:	12/02/2003	Application #:	10282538	Filing Dt:	10/29/2002
Title:	STRAINED SILICON MOSFET HAVING SILICON SOURCE/DRAIN REGIONS AND METHOD FOR ITS FABRICATION

Patent #:	6703648	Issue Dt:	03/09/2004	Application #:	10282559	Filing Dt:	10/29/2002
Title:	STRAINED SILICON PMOS HAVING SILICON GERMANIUM SOURCE/DRAIN EXTENSIONS AND METHOD FOR ITS FABRICATION

Patent #:	6864163	Issue Dt:	03/08/2005	Application #:	10283523	Filing Dt:	10/30/2002
Title:	FABRICATION OF DUAL WORK-FUNCTION METAL GATE STRUCTURE FOR COMPLEMENTARY FIELD EFFECT TRANSISTORS

Patent #:	6781141	Issue Dt:	08/24/2004	Application #:	10284509	Filing Dt:	10/29/2002
Publication #:	US20040079895	Pub Dt:	04/29/2004
Title:	METHOD AND STRUCTURE FOR DETECTION AND MEASUREMENT OF ELECTRICAL AND MECHANICAL RESONANCE ASSOCIATED WITH AN E-BEAM LITHOGRAPHY TOOL

Patent #:	7003271	Issue Dt:	02/21/2006	Application #:	10284642	Filing Dt:	10/31/2002
Publication #:	US20030203727	Pub Dt:	10/30/2003
Title:	DIRECT CONVERSION RECEIVER HAVING A GAIN-SETTING DEPENDENT FILTER PARAMETER

Patent #:	6660543	Issue Dt:	12/09/2003	Application #:	10284996	Filing Dt:	10/31/2002
Title:	METHOD OF MEASURING IMPLANT PROFILES USING SCATTEROMETRIC TECHNIQUES WHEREIN DISPERSION COEFFICIENTS ARE VARIED BASED UPON DEPTH

Patent #:	6656825	Issue Dt:	12/02/2003	Application #:	10285004	Filing Dt:	10/31/2002
Publication #:	US20030201490	Pub Dt:	10/30/2003
Title:	SEMICONDUCTOR DEVICE HAVING AN IMPROVED LOCAL INTERCONNECT STRUCTURE AND A METHOD FOR FORMING SUCH A DEVICE

Patent #:	6638607	Issue Dt:	10/28/2003	Application #:	10285162	Filing Dt:	10/30/2002
Title:	METHOD AND STRUCTURE FOR PRODUCING Z-AXIS INTERCONNECTION ASSEMBLY OF PRINTED WIRING BOARD ELEMENTS

Patent #:	7148079	Issue Dt:	12/12/2006	Application #:	10285860	Filing Dt:	11/01/2002
Title:	DIAMOND LIKE CARBON SILICON ON INSULATOR SUBSTRATES AND METHODS OF FABRICATION THEREOF

Patent #:	7016994	Issue Dt:	03/21/2006	Application #:	10285935	Filing Dt:	11/01/2002
Publication #:	US20040024949	Pub Dt:	02/05/2004
Title:	RETRY MECHANISM FOR BLOCKING INTERFACES

Patent #:	6597596	Issue Dt:	07/22/2003	Application #:	10286206	Filing Dt:	11/01/2002
Publication #:	US20030065880	Pub Dt:	04/03/2003
Title:	CONTENT ADDRESSABLE MEMORY HAVING CASCADED SUB-ENTRY ARCHITECTURE

Patent #:	6654660	Issue Dt:	11/25/2003	Application #:	10287292	Filing Dt:	11/04/2002
Title:	CONTROLLING THERMAL EXPANSION OF MASK SUBSTRATES BY SCATTEROMETRY

Patent #:	6641899	Issue Dt:	11/04/2003	Application #:	10287935	Filing Dt:	11/05/2002
Title:	NONLITHOGRAPHIC METHOD TO PRODUCE MASKS BY SELECTIVE REACTION, ARTICLES PRODUCED, AND COMPOSITION FOR SAME

Patent #:	6624075	Issue Dt:	09/23/2003	Application #:	10288862	Filing Dt:	11/05/2002
Title:	METHOD OF REDUCING ELECTROMIGRATION IN A COPPER LINE BY ZINC-DOPING OF A COPPER SURFACE FROM AN ELECTROPLATED COPPER-ZINC ALLOY THIN FILM AND A SEMICONDUCTOR DEVICE THEREBY FORMED

Patent #:	7880305	Issue Dt:	02/01/2011	Application #:	10290049	Filing Dt:	11/07/2002
Publication #:	US20040089948	Pub Dt:	05/13/2004
Title:	TECHNOLOGY FOR FABRICATION OF PACKAGING INTERFACE SUBSTRATE WAFERS WITH FULLY METALLIZED VIAS THROUGH THE SUBSTRATE WAFER

Patent #:	6707095	Issue Dt:	03/16/2004	Application #:	10290400	Filing Dt:	11/06/2002
Title:	STRUCTURE AND METHOD FOR IMPROVED VERTICAL MOSFET DRAM CELL-TO-CELL ISOLATION

Patent #:	6783862	Issue Dt:	08/31/2004	Application #:	10290682	Filing Dt:	11/08/2002
Publication #:	US20030114013	Pub Dt:	06/19/2003
Title:	TOUGHNESS, ADHESION AND SMOOTH METAL LINES OF POROUS LOW K DIELECTRIC INTERCONNECT STRUCTURES

Patent #:	6716742	Issue Dt:	04/06/2004	Application #:	10292205	Filing Dt:	11/12/2002
Publication #:	US20030075803	Pub Dt:	04/24/2003
Title:	LOW-K INTERCONNECT STRUCTURE COMPRISED OF A MULTILAYER OF SPIN-ON POROUS DIELECTRICS

Patent #:	6819160	Issue Dt:	11/16/2004	Application #:	10293340	Filing Dt:	11/13/2002
Publication #:	US20040090261	Pub Dt:	05/13/2004
Title:	SELF-TIMED AND SELF-TESTED FUSE BLOW

Patent #:	6917108	Issue Dt:	07/12/2005	Application #:	10294139	Filing Dt:	11/14/2002
Publication #:	US20040094839	Pub Dt:	05/20/2004
Title:	RELIABLE LOW-K INTERCONNECT STRUCTURE WITH HYBRID DIELECTRIC

Patent #:	6776885	Issue Dt:	08/17/2004	Application #:	10294199	Filing Dt:	11/14/2002
Publication #:	US20040094403	Pub Dt:	05/20/2004
Title:	INTEGRATED PLATING AND PLANARIZATION APPARATUS HAVING A VARIABLE-DIAMETER COUNTERELECTRODE

100

Patent #:	6773570	Issue Dt:	08/10/2004	Application #:	10294200	Filing Dt:	11/14/2002
Publication #:	US20040094427	Pub Dt:	05/20/2004
Title:	INTEGRATED PLATING AND PLANARIZATION PROCESS AND APPARATUS THEREFOR

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

Search Results as of: 05/15/2024 02:19 PM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6