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09/14/1999
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07/24/2001
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11/19/2002
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02/18/2003
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10/03/2000
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03/19/2002
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02/25/2003
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02/04/1999
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03/09/2004
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02/04/1999
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10/30/2001
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10/24/2000
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07/10/2001
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02/09/1999
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07/16/2002
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02/10/1999
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02/14/2002
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01/15/2002
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02/10/1999
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12/09/2003
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02/10/1999
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04/15/2003
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02/10/1999
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SCALABLE VIRTUAL TIMER ARCHITECTURE FOR EFFICIENTLY IMPLEMENTING MULTIPLE HARDWARE TIMERS WITH MINIMAL SILICON OVERHEAD
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07/10/2001
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02/11/1999
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01/30/2001
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02/11/1999
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02/20/2001
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02/13/1999
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05/08/2001
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02/16/1999
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01/23/2001
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02/16/1999
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12/04/2001
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02/16/1999
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08/01/2000
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02/16/1999
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09/04/2001
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02/16/1999
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01/30/2001
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02/17/1999
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04/17/2001
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02/18/1999
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02/06/2001
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02/19/1999
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07/04/2000
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02/19/1999
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06/12/2001
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02/19/1999
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05/01/2001
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02/22/1999
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02/06/2001
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02/22/1999
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03/27/2001
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02/23/1999
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HIGH K INTEGRATION OF GATE DIELECTRIC WITH INTEGRATED SPACER FORMATION FOR HIGH SPEED CMOS
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02/27/2001
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02/23/1999
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04/22/2008
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02/23/1999
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MULTILAYERED RESIST SYSTEMS USING TUNED POLYMER FILMS AS UNDERLAYERS AND METHODS OF FABRICATION THEREOF
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06/19/2001
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02/24/1999
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METHOD OF FABRICATING SUB-MICRON METAL LINES
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04/27/2004
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02/24/1999
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02/10/2004
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02/24/1999
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08/14/2001
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02/24/1999
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METHOD OF FORMING JUNCTION-LEAKAGE FREE METAL SILICIDE IN A SEMICONDUCTOR WAFER BY AMORPHIZATION OF REFACTORY METAL LAYER
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07/03/2001
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02/24/1999
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05/22/2012
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02/24/1999
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11/05/2002
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02/24/1999
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02/28/2002
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02/05/2008
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02/25/1999
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COMMUNICATION PROTOCOL PROCESSOR HAVING MULTIPLE MICROPROCESSOR CORES CONNECTED IN SERIES AND DYNAMICALLY REPROGRAMMED DURING OPERATION VIA INSTRUCTIONS TRANSMITTED ALONG THE SAME DATA PATHS USED TO CONVEY COMMUNICATION DATA
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12/04/2001
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02/26/1999
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VARIABLE SYMBOLIC LINKS FOR A FILE IN A UNIX OPERATING SYSTEM
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04/17/2001
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02/26/1999
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12/12/2000
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03/01/1999
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EXTREME ULTRAVIOLET LITHOGRAPHY REFLECTIVE MASK
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10/03/2000
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03/01/1999
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METHOD OF MAKING A PRINTED CIRCUIT BOARD HAVING FILLED HOLES AND A FILL MEMBER FOR USE THEREWITH INCLUDING REINFORCEMENT MEANS
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09/04/2001
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03/02/1999
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METHOD OF FORMING A SUPER-SHALLOW AMORPHOUS LAYER IN SILICON
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03/20/2001
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03/02/1999
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METHOD FOR FABRICATING A MOSFET DEVICE STRUCTURE WHICH FACILITATES MITIGATION OF JUNCTION CAPACITANCE AND FLOATING BODY EFFECTS
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09/28/2004
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03/02/1999
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07/04/2002
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REFLECTIVE LIGHTVALVE
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02/20/2001
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03/03/1999
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MULTIPLE SEMICONDUCTOR-ON-INSULATOR THRESHOLD VOLTAGE CIRCUIT
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01/30/2001
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03/03/1999
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THIN FILM TRANSISTORS WITH ORGANIC-INORGANIC HYBRID MATERIALS AS SEMICONDUCTING CHANNELS
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07/10/2001
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03/04/1999
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07/27/2004
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03/04/1999
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11/06/2001
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03/08/1999
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03/27/2001
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03/09/1999
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09/26/2000
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03/11/1999
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10/03/2000
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03/11/1999
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10/30/2001
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03/15/1999
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01/22/2002
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03/19/1999
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04/08/2008
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03/24/1999
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05/14/2002
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03/25/1999
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01/22/2002
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03/26/1999
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07/09/2002
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03/26/1999
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08/06/2002
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03/26/1999
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04/25/2002
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WIRING STRUCTURES CONTAINING INTERCONNECTED METAL AND WIRING LEVELS INCLUDING A CONTINOUS, SINGLE CRYSTALLINE OR POLYCRYSTALLINE CONDUCTIVE MATERIAL HAVING ONE OR MORE TWIN BOUNDARIES
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10/01/2002
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03/30/1999
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12/12/2000
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03/31/1999
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12/03/2002
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03/31/1999
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08/15/2000
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03/30/1999
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12/30/2008
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03/31/1999
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09/12/2000
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03/31/1999
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07/13/2004
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03/31/1999
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01/02/2003
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09/18/2001
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04/01/1999
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12/26/2000
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Application #:
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09283753
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Filing Dt:
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04/02/1999
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Title:
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POLYSILICON GATE HAVING A METAL PLUG FOR REDUCED GATE RESISTANCE WITHIN A TRENCH EXTENDING INTO THE POLYSILICON LAYER OF THE GATE
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09283754
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Filing Dt:
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04/02/1999
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Title:
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PLASMA TREATMENT TO REDUCE STRESS CORROSION INDUCED VOIDING OF PATTERNED METAL LAYERS
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Patent #:
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Issue Dt:
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01/23/2001
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Application #:
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09283960
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Filing Dt:
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04/01/1999
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Title:
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COMPENSATED-CURRENT MIRROR OFF-CHIP DRIVER
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Patent #:
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Issue Dt:
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12/25/2001
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Application #:
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09285388
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Filing Dt:
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04/02/1999
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Title:
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METHOD OF REDUCING STRESS CORROSION INDUCED VOIDING OF PATTERNED METAL LAYERS
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Patent #:
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Issue Dt:
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01/15/2002
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Application #:
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09286987
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Filing Dt:
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04/07/1999
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Title:
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COLLISION HANDLING SCHEME FOR DISCRETE MULTI-TONE DATA COMMUNICATIONS NETWORK
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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09286997
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Filing Dt:
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04/07/1999
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Title:
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ADAPTIVE TRANSMISSION SYSTEM IN A NETWORK
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Patent #:
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Issue Dt:
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02/05/2002
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Application #:
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09287173
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Filing Dt:
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04/06/1999
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Title:
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MANAGING VT FOR REDUCED POWER USING A STATUS TABLE
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Patent #:
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Issue Dt:
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12/11/2001
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Application #:
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09288051
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Filing Dt:
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04/07/1999
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Title:
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LOW CTE POWER AND GROUND PLANES
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09289950
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Filing Dt:
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04/13/1999
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Title:
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NETWORK TRANSCEIVER HAVING MEDIA INDEPENDENT INTERFACE OPERABLE IN A GENERAL PURPOSE SERIAL INTERFACE MODE
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Patent #:
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Issue Dt:
|
08/06/2002
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Application #:
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09289951
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Filing Dt:
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04/13/1999
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Title:
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NETWORK TRANSCEIVER HAVING CIRCUITRY FOR REFERENCING TRANSMIT DATA TO A SELECTED INPUT CLOCK
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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09290048
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Filing Dt:
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04/12/1999
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Title:
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ACOUSTIC NOISE SUPPRESSING CIRCUIT BY SELECTIVE ENABLEMENT OF AN INTERPOLATOR
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09290086
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Filing Dt:
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04/12/1999
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Title:
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PROCESS FOR FABRICATING A METAL SEMICONDUCTOR DEVICE COMPONENT BY LATERAL OXIDIZATION
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Patent #:
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Issue Dt:
|
04/03/2001
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Application #:
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09290087
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Filing Dt:
|
04/12/1999
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Title:
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PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE COMPONENT USING A SELECTIVE SILICIDATION REACTION
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|
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Patent #:
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Issue Dt:
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11/27/2001
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Application #:
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09290088
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Filing Dt:
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04/12/1999
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Title:
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PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE COMPONENT BY OXIDIZING A SILICON HARD MASK
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Patent #:
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Issue Dt:
|
07/10/2001
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Application #:
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09290311
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Filing Dt:
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04/12/1999
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Title:
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POLYMER ENHANCED COLUMN GRID ARRAY
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|
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Patent #:
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Issue Dt:
|
04/10/2001
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Application #:
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09290555
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Filing Dt:
|
04/12/1999
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Title:
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PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE COMPONENT USING LATERAL METAL OXIDATION
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|
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Patent #:
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|
Issue Dt:
|
10/10/2000
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Application #:
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09290784
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Filing Dt:
|
04/13/1999
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Title:
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PARTICLE BEAM SYSTEM WITH DYNAMIC FOCUSING
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Patent #:
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Issue Dt:
|
10/31/2000
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Application #:
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09291036
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Filing Dt:
|
04/14/1999
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Title:
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AUTO-NEGOTIATION USING NEGATIVE LINK PULSES
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09291040
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Filing Dt:
|
04/14/1999
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Title:
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POLISHING PAD AND METHOD FOR POLISHING POROUS MATERIALS
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Patent #:
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Issue Dt:
|
08/07/2001
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Application #:
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09291138
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Filing Dt:
|
04/12/1999
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Title:
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MODIFIED MATERIAL DEPOSITION SEQUENCE FOR REDUCED DETECT DENSITIES IN SEMICONDUCTOR MANUFACTURING
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Patent #:
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Issue Dt:
|
04/02/2002
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Application #:
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09291389
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Filing Dt:
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04/13/1999
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Title:
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BLENDS OF HYDROXYSTYRENE POLYMERS FOR USE IN CHEMICALLY AMPLIFIED POSITIVE RESIST FORMULATIONS
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Patent #:
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Issue Dt:
|
08/08/2000
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Application #:
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09291984
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Filing Dt:
|
04/14/1999
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Title:
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FAST CHIP ERASE MODE FOR NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
|
01/30/2001
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Application #:
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09292769
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Filing Dt:
|
04/14/1999
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Title:
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SYSTEM FOR MAKING ELECTROPHORETIC DIES WHILE REDUCING DAMAGE DUE TO ELECTROSTATIC CHARGE
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Patent #:
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Issue Dt:
|
07/16/2002
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Application #:
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09292913
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Filing Dt:
|
04/16/1999
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Title:
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METHOD OF FORMING ELECTRODE FOR HIGH PERFORMANCE SEMICONDUCTOR DEVICES
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|
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Patent #:
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Issue Dt:
|
08/15/2000
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Application #:
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09293559
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Filing Dt:
|
04/15/1999
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Title:
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METHOD OF IMPROVING CU DAMASCENE INTERCONNECT RELIABILITY BY LASER ANNEAL BEFORE BARRIER POLISH
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|
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Patent #:
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Issue Dt:
|
02/05/2002
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Application #:
|
09294076
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Filing Dt:
|
04/19/1999
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Title:
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SELF-ALIGNED DAMASCENE INTERCONNECT
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|
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Patent #:
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Issue Dt:
|
11/09/2004
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Application #:
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09294178
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Filing Dt:
|
04/19/1999
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Publication #:
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|
Pub Dt:
|
04/24/2003
| | | | |
Title:
|
METHOD FOR STATICALLY TIMING SOI DEVICES AND CIRCUITS
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|
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Patent #:
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Issue Dt:
|
05/22/2001
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Application #:
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09295271
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Filing Dt:
|
04/20/1999
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Title:
|
RESIST REMOVAL BY POLISHING
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|
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Patent #:
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|
Issue Dt:
|
05/29/2001
|
Application #:
|
09295357
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Filing Dt:
|
04/21/1999
|
Title:
|
WIRE BONDING CU INTERCONNECTS
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