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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
Page 36 of 146
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Patent #:	7490280	Issue Dt:	02/10/2009	Application #:	11276413	Filing Dt:	02/28/2006
Publication #:	US20070204193	Pub Dt:	08/30/2007
Title:	MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST)

Patent #:	7529294	Issue Dt:	05/05/2009	Application #:	11276433	Filing Dt:	02/28/2006
Publication #:	US20070204194	Pub Dt:	08/30/2007
Title:	TESTING OF MULTIPLE ASYNCHRONOUS LOGIC DOMAINS

Patent #:	7449942	Issue Dt:	11/11/2008	Application #:	11276451	Filing Dt:	02/28/2006
Publication #:	US20070200744	Pub Dt:	08/30/2007
Title:	INTRINSIC RC POWER DISTRIBUTION FOR NOISE FILTERING OF ANALOG SUPPLIES

Patent #:	7526698	Issue Dt:	04/28/2009	Application #:	11277306	Filing Dt:	03/23/2006
Publication #:	US20070241398	Pub Dt:	10/18/2007
Title:	ERROR DETECTION AND CORRECTION IN SEMICONDUCTOR STRUCTURES

Patent #:	7403061	Issue Dt:	07/22/2008	Application #:	11277315	Filing Dt:	03/23/2006
Publication #:	US20070222497	Pub Dt:	09/27/2007
Title:	METHOD OF IMPROVING FUSE STATE DETECTION AND YIELD IN SEMICONDUCTOR APPLICATIONS

Patent #:	7404163	Issue Dt:	07/22/2008	Application #:	11277385	Filing Dt:	03/24/2006
Publication #:	US20070226667	Pub Dt:	09/27/2007
Title:	STATIC TIMING SLACKS ANALYSIS AND MODIFICATION

Patent #:	7365401	Issue Dt:	04/29/2008	Application #:	11277677	Filing Dt:	03/28/2006
Publication #:	US20070235818	Pub Dt:	10/11/2007
Title:	DUAL-PLANE COMPLEMENTARY METAL OXIDE SEMICONDUCTOR

Patent #:	7307457	Issue Dt:	12/11/2007	Application #:	11278169	Filing Dt:	03/31/2006
Publication #:	US20070229116	Pub Dt:	10/04/2007
Title:	APPARATUS FOR IMPLEMENTING DYNAMIC DATA PATH WITH INTERLOCKED KEEPER AND RESTORE DEVICES

Patent #:	7454642	Issue Dt:	11/18/2008	Application #:	11278262	Filing Dt:	03/31/2006
Publication #:	US20070228830	Pub Dt:	10/04/2007
Title:	METHOD AND ARCHITECTURE FOR POWER MANAGEMENT OF AN ELECTRONIC DEVICE

Patent #:	8035098	Issue Dt:	10/11/2011	Application #:	11278618	Filing Dt:	04/04/2006
Title:	TRANSISTOR WITH ASYMMETRIC SILICON GERMANIUM SOURCE REGION

Patent #:	7542880	Issue Dt:	06/02/2009	Application #:	11278840	Filing Dt:	04/06/2006
Publication #:	US20070239285	Pub Dt:	10/11/2007
Title:	TIME WEIGHTED MOVING AVERAGE FILTER

Patent #:	7498602	Issue Dt:	03/03/2009	Application #:	11278910	Filing Dt:	04/06/2006
Publication #:	US20060163608	Pub Dt:	07/27/2006
Title:	PROTECTING SILICON GERMANIUM SIDEWALL WITH SILICON FOR STRAINED SILICON/SILICON MOSFETS

Patent #:	7401311	Issue Dt:	07/15/2008	Application #:	11278924	Filing Dt:	04/06/2006
Publication #:	US20060166426	Pub Dt:	07/27/2006
Title:	METHODOLOGY FOR PLACEMENT BASED ON CIRCUIT FUNCTION AND LATCHUP SENSITIVITY

Patent #:	7285480	Issue Dt:	10/23/2007	Application #:	11279063	Filing Dt:	04/07/2006
Publication #:	US20070235806	Pub Dt:	10/11/2007
Title:	INTEGRATED CIRCUIT CHIP WITH FETS HAVING MIXED BODY THICKNESSES AND METHOD OF MANUFACTURE THEREOF

Patent #:	7461364	Issue Dt:	12/02/2008	Application #:	11279237	Filing Dt:	04/10/2006
Publication #:	US20070245282	Pub Dt:	10/18/2007
Title:	METHODS AND READABLE MEDIA FOR USING RELATIVE POSITIONING IN STRUCTURES WITH DYNAMIC RANGES

Patent #:	7437691	Issue Dt:	10/14/2008	Application #:	11279283	Filing Dt:	04/11/2006
Publication #:	US20070240088	Pub Dt:	10/11/2007
Title:	VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GRID CONSTRAINTS

Patent #:	7424691	Issue Dt:	09/09/2008	Application #:	11279312	Filing Dt:	04/11/2006
Publication #:	US20070245279	Pub Dt:	10/18/2007
Title:	METHOD FOR VERIFYING PERFORMANCE OF AN ARRAY BY SIMULATING OPERATION OF EDGE CELLS IN A FULL ARRAY MODEL

Patent #:	7365412	Issue Dt:	04/29/2008	Application #:	11279434	Filing Dt:	04/12/2006
Publication #:	US20070241424	Pub Dt:	10/18/2007
Title:	VERTICAL PARALLEL PLATE CAPACITOR USING SPACER SHAPED ELECTRODES AND METHOD FOR FABRICATION THEREOF

Patent #:	7397718	Issue Dt:	07/08/2008	Application #:	11279639	Filing Dt:	04/13/2006
Publication #:	US20070258305	Pub Dt:	11/08/2007
Title:	DETERMINING RELATIVE AMOUNT OF USAGE OF DATA RETAINING DEVICE BASED ON POTENTIAL OF CHARGE STORING DEVICE

Patent #:	7315301	Issue Dt:	01/01/2008	Application #:	11279981	Filing Dt:	04/17/2006
Title:	COMPUTER GRAPHICS PROCESSING SYSTEM, COMPUTER MEMORY, AND METHOD OF USE WITH COMPUTER GRAPHICS PROCESSING SYSTEM UTILIZING HIERARCHICAL IMAGE DEPTH BUFFER

Patent #:	7566938	Issue Dt:	07/28/2009	Application #:	11281032	Filing Dt:	11/17/2005
Publication #:	US20060138603	Pub Dt:	06/29/2006
Title:	DEPOSITION OF HAFNIUM OXIDE AND/OR ZIRCONIUM OXIDE AND FABRICATION OF PASSIVATED ELECTRONIC STRUCTURES

Patent #:	7335880	Issue Dt:	02/26/2008	Application #:	11281169	Filing Dt:	11/17/2005
Publication #:	US20060219906	Pub Dt:	10/05/2006
Title:	TECHNIQUE FOR CD MEASUREMENT ON THE BASIS OF AREA FRACTION DETERMINATION

Patent #:	7355125	Issue Dt:	04/08/2008	Application #:	11281688	Filing Dt:	11/17/2005
Publication #:	US20070109726	Pub Dt:	05/17/2007
Title:	PRINTED CIRCUIT BOARD AND CHIP MODULE

Patent #:	7835898	Issue Dt:	11/16/2010	Application #:	11285338	Filing Dt:	11/22/2005
Publication #:	US20070118340	Pub Dt:	05/24/2007
Title:	SATISFIABILITY (SAT) BASED BOUNDED MODEL CHECKERS

Patent #:	7271634	Issue Dt:	09/18/2007	Application #:	11286454	Filing Dt:	11/23/2005
Title:	DELAY-LOCKED LOOP HAVING A PLURALITY OF LOCK MODES

Patent #:	7386414	Issue Dt:	06/10/2008	Application #:	11289066	Filing Dt:	11/29/2005
Publication #:	US20070124100	Pub Dt:	05/31/2007
Title:	GENERATION OF HARDWARE THERMAL PROFILES FOR A SET OF PROCESSORS

Patent #:	7468296	Issue Dt:	12/23/2008	Application #:	11290787	Filing Dt:	11/30/2005
Title:	THIN FILM GERMANIUM DIODE WITH LOW REVERSE BREAKDOWN

Patent #:	7442993	Issue Dt:	10/28/2008	Application #:	11293774	Filing Dt:	12/02/2005
Publication #:	US20060081837	Pub Dt:	04/20/2006
Title:	ULTRA-THIN, HIGH QUALITY STRAINED SILICON-ON-INSULATOR FORMED BY ELASTIC STRAIN TRANSFER

Patent #:	7464354	Issue Dt:	12/09/2008	Application #:	11297308	Filing Dt:	12/08/2005
Publication #:	US20070136703	Pub Dt:	06/14/2007
Title:	METHOD AND APPARATUS FOR PERFORMING TEMPORAL CHECKING

Patent #:	7342406	Issue Dt:	03/11/2008	Application #:	11297730	Filing Dt:	12/08/2005
Publication #:	US20070132473	Pub Dt:	06/14/2007
Title:	METHODS AND APPARATUS FOR INLINE VARIABILITY MEASUREMENT OF INTEGRATED CIRCUIT COMPONENTS

Patent #:	7426621	Issue Dt:	09/16/2008	Application #:	11297856	Filing Dt:	12/09/2005
Publication #:	US20070136545	Pub Dt:	06/14/2007
Title:	MEMORY ACCESS REQUEST ARBITRATION

Patent #:	7460922	Issue Dt:	12/02/2008	Application #:	11298340	Filing Dt:	12/07/2005
Title:	SCANNER OPTIMIZATION FOR REDUCED ACROSS-CHIP PERFORMANCE VARIATION THROUGH NON-CONTACT ELECTRICAL METROLOGY

Patent #:	8304698	Issue Dt:	11/06/2012	Application #:	11299071	Filing Dt:	12/09/2005
Title:	THERMAL THROTTLING OF PERIPHERAL COMPONENTS IN A PROCESSING DEVICE

Patent #:	7303968	Issue Dt:	12/04/2007	Application #:	11299682	Filing Dt:	12/13/2005
Publication #:	US20060157824	Pub Dt:	07/20/2006
Title:	SEMICONDUCTOR DEVICE AND METHOD HAVING MULTIPLE SUBCOLLECTORS FORMED ON A COMMON WAFER

Patent #:	7672749	Issue Dt:	03/02/2010	Application #:	11303103	Filing Dt:	12/16/2005
Title:	METHOD AND APPARATUS FOR HIERARCHICAL PROCESS CONTROL

Patent #:	7569466	Issue Dt:	08/04/2009	Application #:	11303715	Filing Dt:	12/16/2005
Publication #:	US20070138563	Pub Dt:	06/21/2007
Title:	DUAL METAL GATE SELF-ALIGNED INTEGRATION

Patent #:	7437697	Issue Dt:	10/14/2008	Application #:	11303792	Filing Dt:	12/16/2005
Publication #:	US20070143722	Pub Dt:	06/21/2007
Title:	SYSTEM AND METHOD OF CRITICALITY PREDICTION IN STATISTICAL TIMING ANALYSIS

Patent #:	7718500	Issue Dt:	05/18/2010	Application #:	11305584	Filing Dt:	12/16/2005
Publication #:	US20070138570	Pub Dt:	06/21/2007
Title:	FORMATION OF RAISED SOURCE/DRAIN STRUCTURES IN NFET WITH EMBEDDED SIGE IN PFET

Patent #:	7436044	Issue Dt:	10/14/2008	Application #:	11306597	Filing Dt:	01/04/2006
Publication #:	US20070158781	Pub Dt:	07/12/2007
Title:	ELECTRICAL FUSES COMPRISING THIN FILM TRANSISTORS (TFTS), AND METHODS FOR PROGRAMMING SAME

Patent #:	7250667	Issue Dt:	07/31/2007	Application #:	11306663	Filing Dt:	01/05/2006
Publication #:	US20060208321	Pub Dt:	09/21/2006
Title:	SELECTABLE OPEN CIRCUIT AND ANTI-FUSE ELEMENT

Patent #:	7326986	Issue Dt:	02/05/2008	Application #:	11306669	Filing Dt:	01/06/2006
Publication #:	US20070158724	Pub Dt:	07/12/2007
Title:	TRENCH MEMORY

Patent #:	8012863	Issue Dt:	09/06/2011	Application #:	11306670	Filing Dt:	01/06/2006
Publication #:	US20070161198	Pub Dt:	07/12/2007
Title:	TRANSISTORS WITH GATE STACKS HAVING METAL ELECTRODES

Patent #:	7560761	Issue Dt:	07/14/2009	Application #:	11306709	Filing Dt:	01/09/2006
Publication #:	US20070158725	Pub Dt:	07/12/2007
Title:	SEMICONDUCTOR STRUCTURE INCLUDING TRENCH CAPACITOR AND TRENCH RESISTOR

Patent #:	7417290	Issue Dt:	08/26/2008	Application #:	11306719	Filing Dt:	01/09/2006
Publication #:	US20070161240	Pub Dt:	07/12/2007
Title:	AIR BREAK FOR IMPROVED SILICIDE FORMATION WITH COMPOSITE CAPS

Patent #:	7863197	Issue Dt:	01/04/2011	Application #:	11306721	Filing Dt:	01/09/2006
Publication #:	US20080258180	Pub Dt:	10/23/2008
Title:	METHOD OF FORMING A CROSS-SECTION HOURGLASS SHAPED CHANNEL REGION FOR CHARGE CARRIER MOBILITY MODIFICATION

Patent #:	7585722	Issue Dt:	09/08/2009	Application #:	11306746	Filing Dt:	01/10/2006
Publication #:	US20070158717	Pub Dt:	07/12/2007
Title:	INTEGRATED CIRCUIT COMB CAPACITOR

Patent #:	7504696	Issue Dt:	03/17/2009	Application #:	11306748	Filing Dt:	01/10/2006
Publication #:	US20070278590	Pub Dt:	12/06/2007
Title:	CMOS WITH DUAL METAL GATE

Patent #:	7301210	Issue Dt:	11/27/2007	Application #:	11306827	Filing Dt:	01/12/2006
Publication #:	US20070170521	Pub Dt:	07/26/2007
Title:	METHOD AND STRUCTURE TO PROCESS THICK AND THIN FINS AND VARIABLE FIN TO FIN SPACING

Patent #:	7341948	Issue Dt:	03/11/2008	Application #:	11306930	Filing Dt:	01/17/2006
Publication #:	US20070166996	Pub Dt:	07/19/2007
Title:	METHOD OF MAKING A SEMICONDUCTOR STRUCTURE WITH A PLATING ENHANCEMENT LAYER

Patent #:	7405153	Issue Dt:	07/29/2008	Application #:	11306932	Filing Dt:	01/17/2006
Publication #:	US20070166995	Pub Dt:	07/19/2007
Title:	METHOD FOR DIRECT ELECTROPLATING OF COPPER ONTO A NON-COPPER PLATEABLE LAYER

Patent #:	7863183	Issue Dt:	01/04/2011	Application #:	11306983	Filing Dt:	01/18/2006
Publication #:	US20070166992	Pub Dt:	07/19/2007
Title:	METHOD FOR FABRICATING LAST LEVEL COPPER-TO-C4 CONNECTION WITH INTERFACIAL CAP STRUCTURE

Patent #:	7426420	Issue Dt:	09/16/2008	Application #:	11307288	Filing Dt:	01/31/2006
Publication #:	US20060282187	Pub Dt:	12/14/2006
Title:	SYSTEM FOR DISPATCHING SEMICONDUCTORS LOTS

Patent #:	7510939	Issue Dt:	03/31/2009	Application #:	11307294	Filing Dt:	01/31/2006
Publication #:	US20080001225	Pub Dt:	01/03/2008
Title:	MICROELECTRONIC STRUCTURE BY SELECTIVE DEPOSITION

Patent #:	7375371	Issue Dt:	05/20/2008	Application #:	11307324	Filing Dt:	02/01/2006
Publication #:	US20070235769	Pub Dt:	10/11/2007
Title:	STRUCTURE AND METHOD FOR THERMALLY STRESSING OR TESTING A SEMICONDUCTOR DEVICE

Patent #:	7394110	Issue Dt:	07/01/2008	Application #:	11307404	Filing Dt:	02/06/2006
Publication #:	US20070181974	Pub Dt:	08/09/2007
Title:	PLANAR VERTICAL RESISTOR AND BOND PAD RESISTOR

Patent #:	7456450	Issue Dt:	11/25/2008	Application #:	11307481	Filing Dt:	02/09/2006
Publication #:	US20070181980	Pub Dt:	08/09/2007
Title:	CMOS DEVICES WITH HYBRID CHANNEL ORIENTATIONS AND METHOD FOR FABRICATING THE SAME

Patent #:	7305320	Issue Dt:	12/04/2007	Application #:	11307640	Filing Dt:	02/15/2006
Publication #:	US20070192056	Pub Dt:	08/16/2007
Title:	METROLOGY TOOL RECIPE VALIDATOR USING BEST KNOWN METHODS

Patent #:	7517736	Issue Dt:	04/14/2009	Application #:	11307642	Filing Dt:	02/15/2006
Publication #:	US20080012142	Pub Dt:	01/17/2008
Title:	STRUCTURE AND METHOD OF CHEMICALLY FORMED ANCHORED METALLIC VIAS

Patent #:	7439144	Issue Dt:	10/21/2008	Application #:	11307671	Filing Dt:	02/16/2006
Publication #:	US20070190713	Pub Dt:	08/16/2007
Title:	CMOS GATE STRUCTURES FABRICATED BY SELECTIVE OXIDATION

Patent #:	7358172	Issue Dt:	04/15/2008	Application #:	11307762	Filing Dt:	02/21/2006
Publication #:	US20070196963	Pub Dt:	08/23/2007
Title:	POLY FILLED SUBSTRATE CONTACT ON SOI STRUCTURE

Patent #:	7254078	Issue Dt:	08/07/2007	Application #:	11307785	Filing Dt:	02/22/2006
Publication #:	US20070195629	Pub Dt:	08/23/2007
Title:	SYSTEM AND METHOD FOR INCREASING RELIABILITY OF ELECTRICAL FUSE PROGRAMMING

Patent #:	7982475	Issue Dt:	07/19/2011	Application #:	11307828	Filing Dt:	02/24/2006
Publication #:	US20070202616	Pub Dt:	08/30/2007
Title:	STRUCTURE AND METHOD FOR RELIABILITY EVALUATION OF FCPBGA SUBSTRATES FOR HIGH POWER SEMICONDUCTOR PACKAGING APPLICATIONS

Patent #:	7441213	Issue Dt:	10/21/2008	Application #:	11307894	Filing Dt:	02/27/2006
Publication #:	US20070204244	Pub Dt:	08/30/2007
Title:	METHOD FOR TESTING THE VALIDITY OF INITIAL-CONDITION STATEMENTS IN CIRCUIT SIMULATION, AND CORRECTING INCONSISTENCIES THEREOF

Patent #:	7491604	Issue Dt:	02/17/2009	Application #:	11308103	Filing Dt:	03/07/2006
Publication #:	US20070212830	Pub Dt:	09/13/2007
Title:	TRENCH MEMORY WITH MONOLITHIC CONDUCTING MATERIAL AND METHODS FOR FORMING SAME

Patent #:	7381590	Issue Dt:	06/03/2008	Application #:	11308167	Filing Dt:	03/09/2006
Publication #:	US20070212820	Pub Dt:	09/13/2007
Title:	METHOD AND DEVICE INCLUDING REWORKABLE ALPHA PARTICLE BARRIER AND CORROSION BARRIER

Patent #:	7375034	Issue Dt:	05/20/2008	Application #:	11308394	Filing Dt:	03/21/2006
Publication #:	US20070221619	Pub Dt:	09/27/2007
Title:	RECESSING TRENCH TO TARGET DEPTH USING FEED FORWARD DATA

Patent #:	8367543	Issue Dt:	02/05/2013	Application #:	11308396	Filing Dt:	03/21/2006
Publication #:	US20070222073	Pub Dt:	09/27/2007
Title:	STRUCTURE AND METHOD TO IMPROVE CURRENT-CARRYING CAPABILITIES OF C4 JOINTS

Patent #:	7518190	Issue Dt:	04/14/2009	Application #:	11308408	Filing Dt:	03/22/2006
Publication #:	US20070221990	Pub Dt:	09/27/2007
Title:	GROUNDING FRONT-END-OF-LINE STRUCTURES ON A SOI SUBSTRATE

Patent #:	7816253	Issue Dt:	10/19/2010	Application #:	11308422	Filing Dt:	03/23/2006
Publication #:	US20070222081	Pub Dt:	09/27/2007
Title:	SURFACE TREATMENT OF INTER-LAYER DIELECTRIC

Patent #:	7459382	Issue Dt:	12/02/2008	Application #:	11308432	Filing Dt:	03/24/2006
Publication #:	US20070221964	Pub Dt:	09/27/2007
Title:	METHOD OF MAKING FIELD TRANSISTOR WITH REDUCED THICKNESS GATE

Patent #:	7378324	Issue Dt:	05/27/2008	Application #:	11308503	Filing Dt:	03/30/2006
Publication #:	US20070238258	Pub Dt:	10/11/2007
Title:	SELECTIVE LINKS IN SILICON HETERO-JUNCTION BIPOLAR TRANSISTORS USING CARBON DOPING AND METHOD OF FORMING SAME

Patent #:	7442586	Issue Dt:	10/28/2008	Application #:	11308516	Filing Dt:	03/31/2006
Publication #:	US20070228465	Pub Dt:	10/04/2007
Title:	IMPROVED SOI SUBSTRATE AND SOI DEVICE, AND METHOD FOR FORMING THE SAME

Patent #:	7375021	Issue Dt:	05/20/2008	Application #:	11308539	Filing Dt:	04/04/2006
Publication #:	US20070232049	Pub Dt:	10/04/2007
Title:	METHOD AND STRUCTURE FOR ELIMINATING ALUMINUM TERMINAL PAD MATERIAL IN SEMICONDUCTOR DEVICES

Patent #:	7294869	Issue Dt:	11/13/2007	Application #:	11308541	Filing Dt:	04/04/2006
Publication #:	US20070235762	Pub Dt:	10/11/2007
Title:	SILICON GERMANIUM EMITTER

Patent #:	7439135	Issue Dt:	10/21/2008	Application #:	11308542	Filing Dt:	04/04/2006
Publication #:	US20070235801	Pub Dt:	10/11/2007
Title:	SELF-ALIGNED BODY CONTACT FOR SEMICONDCTOR-ON-INSULATOR TRENCH DEVICE AND METHOD OF FABRICATING SAME

Patent #:	7368393	Issue Dt:	05/06/2008	Application #:	11308672	Filing Dt:	04/20/2006
Publication #:	US20070246442	Pub Dt:	10/25/2007
Title:	CHEMICAL OXIDE REMOVAL OF PLASMA DAMAGED SICOH LOW K DIELECTRICS

Patent #:	7436034	Issue Dt:	10/14/2008	Application #:	11311455	Filing Dt:	12/19/2005
Publication #:	US20070138578	Pub Dt:	06/21/2007
Title:	METAL OXYNITRIDE AS A PFET MATERIAL

Patent #:	7417288	Issue Dt:	08/26/2008	Application #:	11311462	Filing Dt:	12/19/2005
Publication #:	US20070138533	Pub Dt:	06/21/2007
Title:	SUBSTRATE SOLUTION FOR BACK GATE CONTROLLED SRAM WITH COEXISTING LOGIC DEVICES

Patent #:	8515567	Issue Dt:	08/20/2013	Application #:	11313594	Filing Dt:	12/21/2005
Publication #:	US20070142949	Pub Dt:	06/21/2007
Title:	Enhanced state estimation based upon information credibility

Patent #:	7492747	Issue Dt:	02/17/2009	Application #:	11316499	Filing Dt:	12/21/2005
Publication #:	US20070028296	Pub Dt:	02/01/2007
Title:	SECURE PATCH INSTALLATION FOR WWAN SYSTEMS

Patent #:	7742741	Issue Dt:	06/22/2010	Application #:	11316506	Filing Dt:	12/21/2005
Publication #:	US20060246840	Pub Dt:	11/02/2006
Title:	PORTABLE WIRELESS DATA STORAGE DEVICE

Patent #:	7335577	Issue Dt:	02/26/2008	Application #:	11317042	Filing Dt:	12/22/2005
Publication #:	US20060099775	Pub Dt:	05/11/2006
Title:	CRACK STOP FOR LOW K DIELECTRICS

Patent #:	8432409	Issue Dt:	04/30/2013	Application #:	11317593	Filing Dt:	12/23/2005
Title:	STRIDED BLOCK TRANSFER INSTRUCTION

Patent #:	7432567	Issue Dt:	10/07/2008	Application #:	11320330	Filing Dt:	12/28/2005
Publication #:	US20070148838	Pub Dt:	06/28/2007
Title:	METAL GATE CMOS WITH AT LEAST A SINGLE GATE METAL AND DUAL GATE DIELECTRICS

Patent #:	7638406	Issue Dt:	12/29/2009	Application #:	11320375	Filing Dt:	12/28/2005
Publication #:	US20060105534	Pub Dt:	05/18/2006
Title:	METHOD OF FABRICATING A HIGH Q FACTOR INTEGRATED CIRCUIT INDUCTOR

Patent #:	8368710	Issue Dt:	02/05/2013	Application #:	11321706	Filing Dt:	12/29/2005
Title:	DATA BLOCK TRANSFER TO CACHE

Patent #:	7329606	Issue Dt:	02/12/2008	Application #:	11323290	Filing Dt:	12/29/2005
Title:	SEMICONDUCTOR DEVICE HAVING NANOWIRE CONTACT STRUCTURES AND METHOD FOR ITS FABRICATION

Patent #:	7430698	Issue Dt:	09/30/2008	Application #:	11323449	Filing Dt:	12/30/2005
Publication #:	US20060242509	Pub Dt:	10/26/2006
Title:	METHOD AND SYSTEM FOR AN ON-CHIP AC SELF-TEST CONTROLLER

Patent #:	7833849	Issue Dt:	11/16/2010	Application #:	11323564	Filing Dt:	12/30/2005
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Title:	A METHOD OF FABRICATING A SEMICONDUCTOR STRUCTURE INCLUDING ONE DEVICE REGION HAVING A METAL GATE ELECTRODE LOCATED ATOP A THINNED POLYGATE ELECTRODE

Patent #:	8859048	Issue Dt:	10/14/2014	Application #:	11324441	Filing Dt:	01/03/2006
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Title:	SELECTIVE PLACEMENT OF CARBON NANOTUBES THROUGH FUNCTIONALIZATION

Patent #:	7263457	Issue Dt:	08/28/2007	Application #:	11325054	Filing Dt:	01/03/2006
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Title:	SYSTEM AND METHOD FOR OPERATING COMPONENTS OF AN INTEGRATED CIRCUIT AT INDEPENDENT FREQUENCIES AND/OR VOLTAGES

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Title:	DEVICE AND METHOD FOR FABRICATING DOUBLE-SIDED SOI WAFER SCALE PACKAGE WITH OPTICAL THROUGH VIA CONNECTIONS

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Publication #:	US20060109947	Pub Dt:	05/25/2006
Title:	PROGRAMMABLE LOW-POWER HIGH-FREQUENCY DIVIDER

Patent #:	7364958	Issue Dt:	04/29/2008	Application #:	11327966	Filing Dt:	01/09/2006
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Title:	CMOS ON HYBRID SUBSTRATE WITH DIFFERENT CRYSTAL ORIENTATIONS USING SILICON-TO-SILICON DIRECT WAFER BONDING

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Title:	APPARATUS AND METHOD FOR ANALYZING POST-LAYOUT TIMING CRITICAL PATHS

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Title:	ORGANIC FIELD-EFFECT TRANSISTOR AND METHOD OF MAKING SAME BASED ON POLYMERIZABLE SELF-ASSEMBLED MONOLAYERS

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100

Patent #:	7479418	Issue Dt:	01/20/2009	Application #:	11329643	Filing Dt:	01/11/2006
Publication #:	US20070158747	Pub Dt:	07/12/2007
Title:	METHODS OF APPLYING SUBSTRATE BIAS TO SOI CMOS CIRCUITS

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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