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10/26/2010
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11875032
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10/19/2007
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04/23/2009
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07/19/2011
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11875193
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10/19/2007
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05/22/2008
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10/30/2012
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11875227
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10/19/2007
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04/23/2009
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SELECTIVE ETCHING BATH METHODS
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02/28/2012
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11876035
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10/22/2007
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02/28/2008
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02/17/2009
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11876605
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10/22/2007
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02/28/2008
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HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
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03/29/2011
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11877016
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10/23/2007
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04/23/2009
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06/17/2008
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11877859
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10/24/2007
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Title:
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MECHANICALLY DECOUPLED OPTO-MECHANICAL CONNECTOR FOR FLEXIBLE OPTICAL WAVEGUIDES EMBEDDED AND/OR ATTACHED TO A PRINTED CIRCUIT BOARD
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08/19/2008
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11877898
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10/24/2007
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LIMITED SWITCH DYNAMIC LOGIC CELL BASED REGISTER
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08/30/2011
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11877965
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10/24/2007
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04/30/2009
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THERMAL GRADIENT CONTROL OF HIGH ASPECT RATIO ETCHING AND DEPOSITION PROCESSES
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11/13/2012
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11879937
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07/18/2007
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01/22/2009
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09/07/2010
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11882163
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07/30/2007
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02/05/2009
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METHOD AND MATERIALS FOR PATTERNING A NEUTRAL SURFACE
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11/16/2010
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11891165
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08/09/2007
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08/28/2008
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TIME STAMPING TRANSACTIONS TO VALIDATE ATOMIC OPERATIONS IN MULTIPROCESSOR SYSTEMS
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06/18/2013
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11907463
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10/12/2007
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02/14/2008
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Method of determining motion vectors and a reference picture index for a current block in a picture to be decoded
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03/23/2010
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11923152
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10/24/2007
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07/31/2008
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PHASE SHIFTING AND COMBINING ARCHITECTURE FOR PHASED ARRAYS
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12/21/2010
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11923413
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10/24/2007
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02/14/2008
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METHOD AND STRUCTURE FOR CONTROLLED IMPEDANCE WIRE BONDS USING CO-DISPENSING OF DIELECTRIC SPACERS
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08/09/2011
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11923663
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12/03/2007
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06/04/2009
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DESIGN VERIFICATION TECHNIQUE
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05/29/2012
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11923686
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10/25/2007
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03/27/2008
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STRUCTURE AND LAYOUT OF A FET PRIME CELL
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02/23/2010
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11923701
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10/25/2007
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04/30/2009
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METHOD AND CIRCUIT FOR DETECTING AND COMPENSATING FOR A DEGRADATION OF A SEMICONDUCTOR DEVICE
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06/30/2015
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11923864
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10/25/2007
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04/30/2009
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TUNABLE CAPACITOR
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01/06/2009
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11923900
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10/25/2007
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02/28/2008
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RADIATION HARDENED PROGRAMMABLE PHASE FREQUENCY DIVIDER
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05/26/2009
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11923956
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10/25/2007
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05/29/2008
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OPTICALLY CONNECTABLE CIRCUIT BOARD WITH OPTICAL COMPONENT(S) MOUNTED THEREON
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12/09/2008
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11924024
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10/25/2007
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02/21/2008
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ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> SI UNDER BIAXIAL COMPRESSIVE STRAIN
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03/22/2011
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11924059
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10/25/2007
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04/30/2009
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SRAM CELL HAVING A RECTANGULAR COMBINED ACTIVE AREA FOR PLANAR PASS GATE AND PLANAR PULL-DOWN NFETS
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07/19/2011
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11924073
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10/25/2007
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04/30/2009
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SELF ALIGNED RING ELECTRODES
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11/15/2011
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11924146
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10/25/2007
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07/24/2008
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PROCESSING TASKS WITH FAILURE RECOVERY
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03/03/2009
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11924207
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10/25/2007
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02/28/2008
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METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
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02/09/2010
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11924239
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10/25/2007
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02/21/2008
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HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
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02/24/2009
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11924283
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10/25/2007
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02/21/2008
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HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
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11/09/2010
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11924650
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10/26/2007
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04/30/2009
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LATERAL DIFFUSION FIELD EFFECT TRANSISTOR WITH ASYMMETRIC GATE DIELECTRIC PROFILE
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05/03/2011
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11924662
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10/26/2007
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04/30/2009
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SUBSTRATE ANCHOR STRUCTURE AND METHOD
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08/09/2011
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11924735
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10/26/2007
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04/30/2009
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TECHNIQUES FOR IMPEDING REVERSE ENGINEERING
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09/29/2009
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11924825
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10/26/2007
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03/06/2008
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METHOD FOR PRODUCING A DOPED NITRIDE FILM, DOPED OXIDE FILM AND OTHER DOPED FILMS
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03/22/2011
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11924935
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10/26/2007
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04/30/2009
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DETERMINING RELATIVE AMOUNT OF USAGE OF DATA RETAINING DEVICE BASED ON POTENTIAL OF CHARGE STORING DEVICE
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12/11/2012
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11925069
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10/26/2007
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04/30/2009
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METHOD FOR FABRICATING SUPER-STEEP RETROGRADE WELL MOSFET ON SOI OR BULK SILICON SUBSTRATE, AND DEVICE FABRICATED IN ACCORDANCE WITH THE METHOD
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11/23/2010
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11925164
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10/26/2007
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04/30/2009
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ELECTRICAL FUSE HAVING A FULLY SILICIDED FUSELINK AND ENHANCED FLUX DIVERGENCE
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09/07/2010
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11925170
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10/26/2007
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04/30/2009
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OPTOELECTRONIC DEVICE WITH GERMANIUM PHOTODETECTOR
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03/08/2011
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11925238
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10/26/2007
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02/21/2008
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METHOD AND SYSTEM TO REDISTRIBUTE WHITE SPACE FOR MINIMIZING WIRE LENGTH
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12/21/2010
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11925425
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10/26/2007
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04/30/2009
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COLLABORATIVE TROUBLESHOOTING COMPUTER SYSTEMS USING FAULT TREE ANALYSIS
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06/03/2008
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11926297
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10/29/2007
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Title:
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DESIGN STRUCTURE FOR MEMORY ARRAY REPAIR WHERE REPAIR LOGIC CANNOT OPERATE AT SAME OPERATING CONDITION AS ARRAY
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10/11/2011
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11926399
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10/29/2007
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04/30/2009
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ONE-TRANSISTOR STATIC RANDOM ACCESS MEMORY WITH INTEGRATED VERTICAL PNPN DEVICE
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10/26/2010
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11926627
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10/29/2007
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Pub Dt:
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02/21/2008
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Title:
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METHODS OF FABRICATING VERTICAL CARBON NANOTUBE FIELD EFFECT TRANSISTORS FOR ARRANGEMENT IN ARRAYS AND FIELD EFFECT TRANSISTORS AND ARRAYS FORMED THEREBY
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08/06/2013
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11926655
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10/29/2007
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03/06/2008
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Title:
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STRAINED FULLY DEPLETED SILICON ON INSULATOR SEMICONDUCTOR DEVICE
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04/06/2010
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11926661
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10/29/2007
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Pub Dt:
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09/18/2008
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Title:
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VERTICAL NANOTUBE SEMICONDUCTOR DEVICE STRUCTURES AND METHODS OF FORMING THE SAME
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11/09/2010
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11926722
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10/29/2007
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04/30/2009
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Title:
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FORMING SURFACE FEATURES USING SELF-ASSEMBLING MASKS
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03/24/2009
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11927006
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10/29/2007
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Pub Dt:
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02/21/2008
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STRAINED SI MOSFET ON TENSILE-STRAINED SIGE-ON-INSULATOR (SGOI)
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10/09/2012
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11927073
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10/29/2007
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04/30/2009
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Title:
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A ROBUST SPECTRAL ANALYZER FOR ONE-DIMENSIONAL AND MULTI-DIMENSIONAL DATA ANALYSIS
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01/01/2013
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11927720
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12/11/2007
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06/11/2009
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Title:
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TOPOLOGIES AND METHODOLOGIES FOR AMS INTEGRATED CIRCUIT DESIGN
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05/10/2011
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11928070
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10/30/2007
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Pub Dt:
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03/06/2008
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Title:
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CROSSTALK REDUCTION IN ELECTRICAL INTERCONNECTS USING DIFFERENTIAL SIGNALING
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11/03/2009
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11928135
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10/30/2007
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Pub Dt:
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02/28/2008
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Title:
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SEMICONDUCTOR STRUCTURES WITH BODY CONTACTS AND FABRICATION METHODS THEREOF
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06/24/2008
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11928205
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Filing Dt:
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10/30/2007
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Title:
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METHOD AND APPARATUS FOR EXTENDING LIFETIME RELIABILITY OF DIGITAL LOGIC DEVICES THROUGH REVERSAL OF AGING MECHANISMS
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06/24/2008
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11928232
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Filing Dt:
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10/30/2007
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Title:
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METHOD AND APPARATUS FOR EXTENDING LIFETIME RELIABILITY OF DIGITAL LOGIC DEVICES THROUGH REMOVAL OF AGING MECHANISMS
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01/04/2011
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11928395
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10/30/2007
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Pub Dt:
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04/30/2009
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Title:
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HYBRID ORIENTATION SEMICONDUCTOR STRUCTURE WITH REDUCED BOUNDARY DEFECTS AND METHOD OF FORMING SAME
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Issue Dt:
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03/29/2011
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11928418
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10/30/2007
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Pub Dt:
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04/30/2009
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Title:
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HIGH DENSITY SRAM CELL WITH HYBRID DEVICES
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Issue Dt:
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11/22/2011
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11928611
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10/30/2007
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Pub Dt:
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02/28/2008
| | | | |
Title:
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TECHNIQUES FOR LINKING NON-CODING AND GENE-CODING DEOXYRIBONUCLEIC ACID SEQUENCES AND APPLICATIONS THEREOF
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07/01/2008
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11929106
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10/30/2007
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Pub Dt:
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02/28/2008
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Title:
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COPLANAR SILICON-ON-INSULATOR (SOI) REGIONS OF DIFFERENT CRYSTAL ORIENTATIONS AND METHODS OF MAKING THE SAME
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Patent #:
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Issue Dt:
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04/28/2009
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Application #:
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11929490
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Filing Dt:
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10/30/2007
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Publication #:
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Pub Dt:
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02/28/2008
| | | | |
Title:
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COPLANAR SILICON-ON-INSULATOR (SOI) REGIONS OF DIFFERENT CRYSTAL ORIENTATIONS AND METHODS OF MAKING THE SAME
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Patent #:
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Issue Dt:
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07/26/2011
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11929943
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10/30/2007
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Publication #:
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Pub Dt:
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04/30/2009
| | | | |
Title:
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EMBEDDED DRAM INTEGRATED CIRCUITS WITH EXTREMELY THIN SILICON-ON-INSULATOR PASS TRANSISTORS
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Patent #:
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Issue Dt:
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12/11/2012
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Application #:
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11930236
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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03/06/2008
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Title:
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SOLUTION FOR FORMING POLISHING SLURRY, POLISHING SLURRY AND RELATED METHODS
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Patent #:
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Issue Dt:
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08/09/2011
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Application #:
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11930975
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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04/30/2009
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Title:
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RECEIVER TERMINATION CIRCUIT FOR A HIGH SPEED DIRECT CURRENT (DC) SERIAL LINK
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Patent #:
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Issue Dt:
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10/30/2012
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Application #:
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11931096
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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03/06/2008
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Title:
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FULLY AUTOMATED PASTE DISPENSE SYSTEM FOR DISPENSING SMALL DOTS AND LINES
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Patent #:
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Issue Dt:
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11/16/2010
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Application #:
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11931112
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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04/30/2009
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Title:
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UNIFORM RECESS OF A MATERIAL IN A TRENCH INDEPENDENT OF INCOMING TOPOGRAPHY
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Patent #:
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Issue Dt:
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12/07/2010
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Application #:
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11931144
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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04/30/2009
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Title:
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MECHANISM FOR DETECTION AND COMPENSATION OF NBTI INDUCED THRESHOLD DEGRADATION
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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11931153
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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03/06/2008
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Title:
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FULLY AUTOMATED PASTE DISPENSE SYSTEM FOR DISPENSING SMALL DOTS AND LINES
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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11931217
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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03/06/2008
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Title:
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FULLY AUTOMATED PASTE DISPENSE SYSTEM FOR DISPENSING SMALL DOTS AND LINES
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Patent #:
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Issue Dt:
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05/22/2012
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Application #:
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11931242
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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03/06/2008
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Title:
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METHOD AND APPARATUS FOR FABRICATING OR ALTERING MICROSTRUCTURES USING LOCAL CHEMICAL ALTERATIONS
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Patent #:
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Issue Dt:
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03/13/2012
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Application #:
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11931296
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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03/20/2008
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Title:
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MOMENT ANALYSIS OF TERTIARY PROTEIN STRUCTURES
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Patent #:
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Issue Dt:
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02/08/2011
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Application #:
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11931371
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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04/30/2009
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Title:
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HIGH RESISTIVITY SOI BASE WAFER USING THERMALLY ANNEALED SUBSTRATE
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Patent #:
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Issue Dt:
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01/13/2009
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Application #:
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11931387
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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03/13/2008
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Title:
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STRUCTURES AND METHODS FOR MANUFACTURING OF DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI CMOS DEVICES BY GATE STRESS ENGINEERING WITH SIGE AND/OR SI:C
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Patent #:
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Issue Dt:
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10/26/2010
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Application #:
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11932793
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Filing Dt:
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10/31/2007
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Publication #:
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Pub Dt:
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03/13/2008
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Title:
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MICROELECTRONIC DEVICES AND METHODS
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Patent #:
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Issue Dt:
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11/16/2010
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Application #:
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11934479
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Filing Dt:
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11/02/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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STRAINED SEMICONDUCTOR-ON-INSULATOR BY SI:C COMBINED WITH POROUS PROCESS
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Patent #:
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Issue Dt:
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05/24/2011
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Application #:
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11934804
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Filing Dt:
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11/05/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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STRUCTURE FOR SYSTEM ARCHITECTURES FOR AND METHODS OF SCHEDULING ON-CHIP AND ACROSS-CHIP NOISE EVENTS IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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10/26/2010
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Application #:
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11934995
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Filing Dt:
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11/05/2007
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Publication #:
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Pub Dt:
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03/13/2008
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Title:
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CHIP HAVING TIMING ANALYSIS OF PATHS PERFORMED WITHIN THE CHIP DURING THE DESIGN PROCESS
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Patent #:
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Issue Dt:
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04/20/2010
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Application #:
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11935143
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Filing Dt:
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11/05/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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CMOS EPROM AND EEPROM DEVICES AND PROGRAMMABLE CMOS INVERTERS
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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11935566
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Filing Dt:
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11/06/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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STORAGE ARRAY INCLUDING A LOCAL CLOCK BUFFER WITH PROGRAMMABLE TIMING
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Patent #:
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Issue Dt:
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05/03/2011
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Application #:
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11935612
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Filing Dt:
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11/06/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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DESIGN STRUCTURE INCLUDING TRANSISTOR HAVING GATE AND BODY IN DIRECT SELF-ALIGNED CONTACT
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Patent #:
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Issue Dt:
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12/16/2008
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Application #:
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11935714
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Filing Dt:
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11/06/2007
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Title:
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POLYCONDUCTOR LINE END FORMATION AND RELATED MASK
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Patent #:
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Issue Dt:
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05/04/2010
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Application #:
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11935741
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Filing Dt:
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11/06/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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LEVEL SHIFTER FOR BOOSTING WORDLINE VOLTAGE AND MEMORY CELL PERFORMANCE
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Patent #:
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Issue Dt:
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04/05/2011
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Application #:
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11935865
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Filing Dt:
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11/06/2007
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Publication #:
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Pub Dt:
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03/13/2008
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Title:
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METHOD AND SYSTEM FOR CREATING, VIEWING, EDITING, AND SHARING OUTPUT FROM A DESIGN CHECKING SYSTEM
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Patent #:
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Issue Dt:
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01/18/2011
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Application #:
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11936673
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Filing Dt:
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11/07/2007
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Publication #:
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Pub Dt:
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03/06/2008
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Title:
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COMPUTER PROGRAM FOR BALANCING POWER PLANE PIN CURRENTS IN A PRINTED WIRING BOARD
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11936775
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Filing Dt:
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11/07/2007
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Publication #:
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Pub Dt:
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03/13/2008
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Title:
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SYSTEMS, METHODS, AND MEDIA FOR BLOCK-BASED ASSERTION GENERATION, QUALIFICATION AND ANALYSIS
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Patent #:
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Issue Dt:
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03/15/2011
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Application #:
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11936887
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Filing Dt:
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11/08/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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UNIVERSAL PATTERNED METAL THERMAL INTERFACE
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Patent #:
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Issue Dt:
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12/07/2010
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Application #:
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11937088
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Filing Dt:
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11/08/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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DESIGN STRUCTURE FOR A TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11937106
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Filing Dt:
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11/08/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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DESIGN STRUCTURE FOR DYNAMICALLY SELECTING COMPILED INSTRUCTIONS
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Patent #:
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Issue Dt:
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03/06/2012
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Application #:
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11937111
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Filing Dt:
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11/08/2007
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Publication #:
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Pub Dt:
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02/12/2009
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Title:
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DYNAMIC CRITICAL PATH DETECTOR FOR DIGITAL LOGIC CIRCUIT PATHS
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Patent #:
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Issue Dt:
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08/11/2009
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Application #:
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11937637
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Filing Dt:
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11/09/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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METHOD AND STRUCTURE FOR REDUCING INDUCED MECHANICAL STRESSES
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Patent #:
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Issue Dt:
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03/01/2011
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Application #:
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11937646
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Filing Dt:
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11/09/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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HIGH TIN SOLDER ETCHING SOLUTION
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Patent #:
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Issue Dt:
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09/07/2010
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Application #:
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11937677
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Filing Dt:
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11/09/2007
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Publication #:
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Pub Dt:
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10/02/2008
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Title:
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METHOD FOR CREATING TENSILE STRAIN BY REPEATEDLY APPLIED STRESS MEMORIZATION TECHNIQUES
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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11938532
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Filing Dt:
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11/12/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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METHOD AND SYSTEM FOR TESTING FUNCTIONALITY OF A CHIP CHECKER
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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11938899
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Filing Dt:
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11/13/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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STRUCTURE FOR A SYSTEM AND METHOD OF PREDICTING POWER EVENTS IN AN INTERMITTENT POWER ENVIRONMENT AND DISPATCHING COMPUTATIONAL OPERATIONS OF AN INTEGRATED CIRCUIT ACCORDINGLY
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Patent #:
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Issue Dt:
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05/03/2011
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Application #:
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11939017
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Filing Dt:
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11/13/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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FIELD EFFECT TRANSISTOR CONTAINING A WIDE BAND GAP SEMICONDUCTOR MATERIAL IN A DRAIN
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Patent #:
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Issue Dt:
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05/27/2008
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Application #:
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11939093
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Filing Dt:
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11/13/2007
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Title:
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LOW-RATE WIRELESS PERSONAL AREA NETWORK SYSTEM FOR TRACKING CONTAINERS
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Patent #:
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Issue Dt:
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12/07/2010
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Application #:
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11939574
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Filing Dt:
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11/14/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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DENSE CHEVRON NON-PLANAR FIELD EFFECT TRANSISTORS AND METHOD
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Patent #:
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Issue Dt:
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10/18/2011
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Application #:
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11939578
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Filing Dt:
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11/14/2007
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Publication #:
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Pub Dt:
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05/14/2009
| | | | |
Title:
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METHODS OF CHANGING THRESHOLD VOLTAGES OF SEMICONDUCTOR TRANSISTORS BY ION IMPLANTATION
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Patent #:
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Issue Dt:
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10/30/2012
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Application #:
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11939599
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Filing Dt:
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11/14/2007
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Publication #:
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Pub Dt:
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05/14/2009
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Title:
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CARBON NANOTUBE STRUCTURES FOR ENHANCEMENT OF THERMAL DISSIPATION FROM SEMICONDUCTOR MODULES
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Patent #:
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Issue Dt:
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09/06/2011
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Application #:
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11939612
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Filing Dt:
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11/14/2007
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Publication #:
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Pub Dt:
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05/14/2009
| | | | |
Title:
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DOUBLE-SIDED INTEGRATED CIRCUIT CHIPS
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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11939671
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Filing Dt:
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11/14/2007
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Publication #:
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Pub Dt:
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04/03/2008
| | | | |
Title:
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BEOL INTERCONNECT STRUCTURES WITH SIMULTANEOUS HIGH-K AND LOW-K DIELECTRIC REGIONS
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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11940531
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Filing Dt:
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11/15/2007
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Publication #:
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Pub Dt:
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05/21/2009
| | | | |
Title:
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STRESS-GENERATING SHALLOW TRENCH ISOLATION STRUCTURE HAVING DUAL COMPOSITION
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Patent #:
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Issue Dt:
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10/08/2013
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Application #:
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11940720
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Filing Dt:
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11/15/2007
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Publication #:
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Pub Dt:
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05/21/2009
| | | | |
Title:
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METHOD AND APPARATUS FOR ELECTROPLATING ON SOI AND BULK SEMICONDUCTOR WAFERS
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Patent #:
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Issue Dt:
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09/06/2011
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Application #:
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11941104
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Filing Dt:
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11/16/2007
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Publication #:
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Pub Dt:
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04/17/2008
| | | | |
Title:
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A DESIGN STRUCTURE WITH A DEEP SUB-COLLECTOR, A REACH-THROUGH STRUCTURE AND TRENCH ISOLATION
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Patent #:
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Issue Dt:
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06/14/2011
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Application #:
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11941311
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Filing Dt:
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11/16/2007
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Publication #:
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Pub Dt:
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05/21/2009
| | | | |
Title:
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STATE TESTING DEVICE AND METHODS THEREOF
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