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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
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Patent #:	7939247	Issue Dt:	05/10/2011	Application #:	12201993	Filing Dt:	08/29/2008
Publication #:	US20100055577	Pub Dt:	03/04/2010
Title:	PROCESS OF PATTERNING SMALL SCALE DEVICES

Patent #:	8234604	Issue Dt:	07/31/2012	Application #:	12202500	Filing Dt:	09/02/2008
Publication #:	US20100058256	Pub Dt:	03/04/2010
Title:	CO-OPTIMIZATION OF EMBEDDED SYSTEMS UTILIZING SYMBOLIC EXECUTION

Patent #:	9059658	Issue Dt:	06/16/2015	Application #:	12202854	Filing Dt:	09/02/2008
Publication #:	US20100052584	Pub Dt:	03/04/2010
Title:	INCREASING TAPE VELOCITY BY DYNAMIC SWITCHING

Patent #:	8176303	Issue Dt:	05/08/2012	Application #:	12203456	Filing Dt:	09/03/2008
Publication #:	US20100058044	Pub Dt:	03/04/2010
Title:	MULTIPROCESSOR COMMUNICATION DEVICE AND METHODS THEREOF

Patent #:	8108811	Issue Dt:	01/31/2012	Application #:	12203955	Filing Dt:	09/04/2008
Publication #:	US20080320424	Pub Dt:	12/25/2008
Title:	VALIDATION OF ELECTRICAL PERFORMANCE OF AN ELECTRONIC PACKAGE PRIOR TO FABRICATION

Patent #:	8293610	Issue Dt:	10/23/2012	Application #:	12204395	Filing Dt:	09/04/2008
Publication #:	US20090218639	Pub Dt:	09/03/2009
Title:	SEMICONDUCTOR DEVICE COMPRISING A METAL GATE STACK OF REDUCED HEIGHT AND METHOD OF FORMING THE SAME

Patent #:	8426316	Issue Dt:	04/23/2013	Application #:	12204412	Filing Dt:	09/04/2008
Publication #:	US20090001587	Pub Dt:	01/01/2009
Title:	Ta-TaN SELECTIVE REMOVAL PROCESS FOR INTEGRATED DEVICE FABRICATION

Patent #:	7713834	Issue Dt:	05/11/2010	Application #:	12205361	Filing Dt:	09/05/2008
Publication #:	US20090047770	Pub Dt:	02/19/2009
Title:	METHOD OF FORMING ISOLATION REGIONS FOR INTEGRATED CIRCUITS

Patent #:	9405870	Issue Dt:	08/02/2016	Application #:	12205476	Filing Dt:	09/05/2008
Publication #:	US20090070717	Pub Dt:	03/12/2009
Title:	GENERATING COVERAGE DATA FOR A SWITCH FREQUENCY OF HDL OR VHDL SIGNALS

Patent #:	7951525	Issue Dt:	05/31/2011	Application #:	12206065	Filing Dt:	09/08/2008
Publication #:	US20100062368	Pub Dt:	03/11/2010
Title:	LOW OUTGASSING PHOTORESIST COMPOSITIONS

Patent #:	8479388	Issue Dt:	07/09/2013	Application #:	12207713	Filing Dt:	09/10/2008
Publication #:	US20090007427	Pub Dt:	01/08/2009
Title:	METHOD OF PRODUCING A LAND GRID ARRAY INTERPOSER

Patent #:	8250354	Issue Dt:	08/21/2012	Application #:	12208071	Filing Dt:	09/10/2008
Publication #:	US20090144472	Pub Dt:	06/04/2009
Title:	METHOD AND APPARATUS FOR MAKING A PROCESSOR SIDEBAND INTERFACE ADHERE TO SECURE MODE RESTRICTIONS

Patent #:	8158530	Issue Dt:	04/17/2012	Application #:	12208159	Filing Dt:	09/10/2008
Publication #:	US20100062609	Pub Dt:	03/11/2010
Title:	METHODS FOR RETAINING METAL-COMPRISING MATERIALS USING LIQUID CHEMISTRY DISPENSE SYSTEMS FROM WHICH OXYGEN HAS BEEN REMOVED

Patent #:	7943999	Issue Dt:	05/17/2011	Application #:	12208196	Filing Dt:	09/10/2008
Publication #:	US20090001476	Pub Dt:	01/01/2009
Title:	STRESS ENHANCED MOS CIRCUITS

Patent #:	8125618	Issue Dt:	02/28/2012	Application #:	12208358	Filing Dt:	09/11/2008
Publication #:	US20090040486	Pub Dt:	02/12/2009
Title:	REFLECTIVE FILM INTERFACE TO RESTORE TRANSVERSE MAGNETIC WAVE CONTRAST IN LITHOGRAPHIC PROCESSING

Patent #:	7979824	Issue Dt:	07/12/2011	Application #:	12208469	Filing Dt:	09/11/2008
Publication #:	US20100064270	Pub Dt:	03/11/2010
Title:	COST-BENEFIT OPTIMIZATION FOR AN AIRGAPPED INTEGRATED CIRCUIT

Patent #:	8176446	Issue Dt:	05/08/2012	Application #:	12208521	Filing Dt:	09/11/2008
Publication #:	US20100064273	Pub Dt:	03/11/2010
Title:	METHOD FOR COMPENSATING FOR VARIATIONS IN STRUCTURES OF AN INTEGRATED CIRCUIT

Patent #:	8108820	Issue Dt:	01/31/2012	Application #:	12208548	Filing Dt:	09/11/2008
Publication #:	US20100063781	Pub Dt:	03/11/2010
Title:	ENHANCED CONDUCTIVITY IN AN AIRGAPPED INTEGRATED CIRCUIT

Patent #:	8505200	Issue Dt:	08/13/2013	Application #:	12208581	Filing Dt:	09/11/2008
Publication #:	US20090119916	Pub Dt:	05/14/2009
Title:	LAND GRID ARRAY INTERPOSER PRODUCING METHOD

Patent #:	7912798	Issue Dt:	03/22/2011	Application #:	12209071	Filing Dt:	09/11/2008
Publication #:	US20090006049	Pub Dt:	01/01/2009
Title:	SYSTEM FOR ESTIMATING STORAGE REQUIREMENTS FOR A MULTI-DIMENSIONAL CLUSTERING DATA CONFIGURATION

Patent #:	8010921	Issue Dt:	08/30/2011	Application #:	12209461	Filing Dt:	09/12/2008
Publication #:	US20090013294	Pub Dt:	01/08/2009
Title:	SYSTEM AND METHOD FOR STATISTICAL TIMING ANALYSIS OF DIGITAL CIRCUITS

Patent #:	7666732	Issue Dt:	02/23/2010	Application #:	12210703	Filing Dt:	09/15/2008
Publication #:	US20090011552	Pub Dt:	01/08/2009
Title:	METHOD OF FABRICATING A METAL GATE CMOS WITH AT LEAST A SINGLE GATE METAL AND DUAL GATE DIELECTRICS

Patent #:	8315409	Issue Dt:	11/20/2012	Application #:	12211435	Filing Dt:	09/16/2008
Publication #:	US20100067718	Pub Dt:	03/18/2010
Title:	MODIFICATIONS OF AUDIO COMMUNICATIONS IN AN ONLINE ENVIRONMENT

Patent #:	7709902	Issue Dt:	05/04/2010	Application #:	12211647	Filing Dt:	09/16/2008
Publication #:	US20090008719	Pub Dt:	01/08/2009
Title:	METAL GATE CMOS WITH AT LEAST A SINGLE GATE METAL AND DUAL GATE DIELECTRICS

Patent #:	8569844	Issue Dt:	10/29/2013	Application #:	12211649	Filing Dt:	09/16/2008
Publication #:	US20090008720	Pub Dt:	01/08/2009
Title:	METAL GATE CMOS WITH AT LEAST A SINGLE GATE METAL AND DUAL GATE DIELECTRICS

Patent #:	7688058	Issue Dt:	03/30/2010	Application #:	12212247	Filing Dt:	09/17/2008
Publication #:	US20090015238	Pub Dt:	01/15/2009
Title:	INTEGRATED SPECTRUM ANALYZER CIRCUITS AND METHODS FOR PROVIDING ON-CHIP DIAGNOSTICS

Patent #:	7673173	Issue Dt:	03/02/2010	Application #:	12212577	Filing Dt:	09/17/2008
Publication #:	US20090013099	Pub Dt:	01/08/2009
Title:	SYSTEM AND PROGRAM FOR TRANSMITTING INPUT/OUTPUT REQUESTS FROM A FIRST CONTROLLER TO A SECOND CONTROLLER

Patent #:	7888603	Issue Dt:	02/15/2011	Application #:	12212925	Filing Dt:	09/18/2008
Publication #:	US20090008129	Pub Dt:	01/08/2009
Title:	COOLING OF SUBSTRATE USING INTERPOSER CHANNELS

Patent #:	8316540	Issue Dt:	11/27/2012	Application #:	12212927	Filing Dt:	09/18/2008
Publication #:	US20090013528	Pub Dt:	01/15/2009
Title:	METHOD OF PRODUCING A LAND GRID ARRAY (LGA) INTERPOSER STRUCTURE

Patent #:	7856711	Issue Dt:	12/28/2010	Application #:	12212998	Filing Dt:	09/18/2008
Publication #:	US20090011546	Pub Dt:	01/08/2009
Title:	METHOD OF FORMING A SUBSTRATE WITH INTERPOSER CHANNELS FOR COOLING THE SUBSTRATE

Patent #:	7615457	Issue Dt:	11/10/2009	Application #:	12220521	Filing Dt:	07/25/2008
Publication #:	US20080318373	Pub Dt:	12/25/2008
Title:	METHOD OF FABRICATING SELF-ALIGNED BIPOLAR TRANSISTOR HAVING TAPERED COLLECTOR

Patent #:	7837459	Issue Dt:	11/23/2010	Application #:	12221966	Filing Dt:	08/07/2008
Publication #:	US20080305197	Pub Dt:	12/11/2008
Title:	METHOD FOR FABRICATING DUAL DAMASCENE STRUCTURES USING PHOTO-IMPRINT LITHOGRAPHY, METHODS FOR FABRICATING IMPRINT LITHOGRAPHY MOLDS FOR DUAL DAMASCENE STRUCTURES, MATERIALS FOR IMPRINTABLE DIELECTRICS AND EQUIPMENT FOR PHOTO-IMPRINT LITHOGRAPHY USED IN DUAL DAMASCE

Patent #:	7982312	Issue Dt:	07/19/2011	Application #:	12222000	Filing Dt:	08/07/2008
Publication #:	US20080303160	Pub Dt:	12/11/2008
Title:	METHOD FOR FABRICATING DUAL DAMASCENE STRUCTURES USING PHOTO-IMPRINT LITHOGRAPHY, METHODS FOR FABRICATING IMPRINT LITHOGRAPHY MOLDS FOR DUAL DAMASCENE STRUCTURES, MATERIALS FOR IMPRINTABLE DIELECTRICS AND EQUIPMENT FOR PHOTO-IMPRINT LITHOGRAPHY USED IN DUAL DAMASCE

Patent #:	7862989	Issue Dt:	01/04/2011	Application #:	12228010	Filing Dt:	08/07/2008
Publication #:	US20090023083	Pub Dt:	01/22/2009
Title:	METHOD FOR FABRICATING DUAL DAMASCENE STRUCTURES USING PHOTO-IMPRINT LITHOGRAPHY, METHODS FOR FABRICATING IMPRINT LITHOGRAPHY MOLDS FOR DUAL DAMASCENE STRUCTURES, MATERIALS FOR IMPRINTABLE DIELECTRICS AND EQUIPMENT FOR PHOTO-IMPRINT LITHOGRAPHY USED IN DUAL DAMASCE

Patent #:	8140314	Issue Dt:	03/20/2012	Application #:	12228587	Filing Dt:	08/14/2008
Publication #:	US20080312896	Pub Dt:	12/18/2008
Title:	OPTIMAL BUS OPERATION PERFORMANCE IN A LOGIC SIMULATION ENVIRONMENT

Patent #:	8110746	Issue Dt:	02/07/2012	Application #:	12233061	Filing Dt:	09/18/2008
Publication #:	US20090008130	Pub Dt:	01/08/2009
Title:	COOLING OF SUBSTRATE USING INTERPOSER CHANNELS

Patent #:	8059400	Issue Dt:	11/15/2011	Application #:	12233104	Filing Dt:	09/18/2008
Publication #:	US20090011547	Pub Dt:	01/08/2009
Title:	COOLING OF SUBSTRATE USING INTERPOSER CHANNELS

Patent #:	8056037	Issue Dt:	11/08/2011	Application #:	12233169	Filing Dt:	09/18/2008
Publication #:	US20090083684	Pub Dt:	03/26/2009
Title:	METHOD FOR VIOLATING THE LOGICAL FUNCTION AND TIMING BEHAVIOR OF A DIGITAL CIRCUIT DECISION

Patent #:	7736841	Issue Dt:	06/15/2010	Application #:	12233245	Filing Dt:	09/18/2008
Publication #:	US20090011371	Pub Dt:	01/08/2009
Title:	REFLECTIVE FILM INTERFACE TO RESTORE TRANSVERSE MAGNETIC WAVE CONTRAST IN LITHOGRAPHIC PROCESSING

Patent #:	7848135	Issue Dt:	12/07/2010	Application #:	12234100	Filing Dt:	09/19/2008
Publication #:	US20100073997	Pub Dt:	03/25/2010
Title:	PIEZO-DRIVEN NON-VOLATILE MEMORY CELL WITH HYSTERETIC RESISTANCE

Patent #:	7949983	Issue Dt:	05/24/2011	Application #:	12234473	Filing Dt:	09/19/2008
Publication #:	US20090019414	Pub Dt:	01/15/2009
Title:	HIGH TOLERANCE TCR BALANCED HIGH CURRENT RESISTOR FOR RF CMOS AND RF SIGE BICMOS APPLICATIONS AND CADENCED BASED HIERARCHICAL PARAMETERIZED CELL DESIGN KIT WITH TUNABLE TCR AND ESD RESISTOR BALLASTING FEATURE

Patent #:	8193799	Issue Dt:	06/05/2012	Application #:	12236003	Filing Dt:	09/23/2008
Publication #:	US20100072961	Pub Dt:	03/25/2010
Title:	INTERPOSER INCLUDING VOLTAGE REGULATOR AND METHOD THEREFOR

Patent #:	8090929	Issue Dt:	01/03/2012	Application #:	12236551	Filing Dt:	09/24/2008
Publication #:	US20090217000	Pub Dt:	08/27/2009
Title:	GENERATING CLOCK SIGNALS FOR COUPLED ASIC CHIPS IN PROCESSOR INTERFACE WITH X AND Y LOGIC OPERABLE IN FUNCTIONAL AND SCANNING MODES

Patent #:	7755161	Issue Dt:	07/13/2010	Application #:	12237148	Filing Dt:	09/24/2008
Publication #:	US20090039385	Pub Dt:	02/12/2009
Title:	SEMICONDUCTOR DEVICES

Patent #:	7930669	Issue Dt:	04/19/2011	Application #:	12237246	Filing Dt:	09/24/2008
Publication #:	US20090019415	Pub Dt:	01/15/2009
Title:	DESIGN STAGE MITIGATION OF INTERCONNECT VARIABILITY

Patent #:	8048689	Issue Dt:	11/01/2011	Application #:	12237568	Filing Dt:	09/25/2008
Publication #:	US20100072620	Pub Dt:	03/25/2010
Title:	SEMICONDUCTOR CHIP WITH BACKSIDE CONDUCTOR STRUCTURE

Patent #:	8117568	Issue Dt:	02/14/2012	Application #:	12237727	Filing Dt:	09/25/2008
Publication #:	US20100077372	Pub Dt:	03/25/2010
Title:	APPARATUS, METHOD AND COMPUTER PROGRAM PRODUCT FOR FAST SIMULATION OF MANUFACTURING EFFECTS DURING INTEGRATED CIRCUIT DESIGN

Patent #:	8111903	Issue Dt:	02/07/2012	Application #:	12238602	Filing Dt:	09/26/2008
Publication #:	US20100080446	Pub Dt:	04/01/2010
Title:	INLINE LOW-DAMAGE AUTOMATED FAILURE ANALYSIS

Patent #:	7855455	Issue Dt:	12/21/2010	Application #:	12239688	Filing Dt:	09/26/2008
Publication #:	US20100078770	Pub Dt:	04/01/2010
Title:	LOCK AND KEY THROUGH-VIA METHOD FOR WAFER LEVEL 3 D INTEGRATION AND STRUCTURES PRODUCED

Patent #:	7979248	Issue Dt:	07/12/2011	Application #:	12240534	Filing Dt:	09/29/2008
Publication #:	US20090076781	Pub Dt:	03/19/2009
Title:	MODEL INDEPENDENT SIMULATION

Patent #:	9102008	Issue Dt:	08/11/2015	Application #:	12241274	Filing Dt:	09/30/2008
Publication #:	US20090107964	Pub Dt:	04/30/2009
Title:	DEBRIS MINIMIZATION AND IMPROVED SPATIAL RESOLUTION IN PULSED LASER ABLATION OF MATERIALS

Patent #:	7847605	Issue Dt:	12/07/2010	Application #:	12242114	Filing Dt:	09/30/2008
Publication #:	US20090021289	Pub Dt:	01/22/2009
Title:	VOLTAGE DETECTION CIRCUIT IN AN INTEGRATED CIRCUIT AND METHOD OF GENERATING A TRIGGER FLAG SIGNAL

Patent #:	8138066	Issue Dt:	03/20/2012	Application #:	12242990	Filing Dt:	10/01/2008
Publication #:	US20100081259	Pub Dt:	04/01/2010
Title:	DISLOCATION ENGINEERING USING A SCANNED LASER

Patent #:	8091050	Issue Dt:	01/03/2012	Application #:	12243427	Filing Dt:	10/01/2008
Publication #:	US20100083203	Pub Dt:	04/01/2010
Title:	MODELING SYSTEM-LEVEL EFFECTS OF SOFT ERRORS

Patent #:	8101456	Issue Dt:	01/24/2012	Application #:	12243759	Filing Dt:	10/01/2008
Publication #:	US20100078617	Pub Dt:	04/01/2010
Title:	METHOD TO REDUCE A VIA AREA IN A PHASE CHANGE MEMORY CELL

Patent #:	8495719	Issue Dt:	07/23/2013	Application #:	12243987	Filing Dt:	10/02/2008
Publication #:	US20100088761	Pub Dt:	04/08/2010
Title:	CROSS-DOMAIN ACCESS PREVENTION

Patent #:	8703274	Issue Dt:	04/22/2014	Application #:	12244067	Filing Dt:	10/02/2008
Publication #:	US20100086739	Pub Dt:	04/08/2010
Title:	MICROCAVITY STRUCTURE AND PROCESS

Patent #:	8123088	Issue Dt:	02/28/2012	Application #:	12244118	Filing Dt:	10/02/2008
Publication #:	US20100084437	Pub Dt:	04/08/2010
Title:	DISPENSING ASSEMBLY WITH A CONTROLLED GAS ENVIRONMENT

Patent #:	8123089	Issue Dt:	02/28/2012	Application #:	12244145	Filing Dt:	10/02/2008
Publication #:	US20100084438	Pub Dt:	04/08/2010
Title:	DISPENSING ASSEMBLY WITH AN INJECTOR CONTROLLED GAS ENVIRONMENT

Patent #:	8106300	Issue Dt:	01/31/2012	Application #:	12244216	Filing Dt:	10/02/2008
Publication #:	US20100084160	Pub Dt:	04/08/2010
Title:	SPLIT FLEX CABLE

Patent #:	7864625	Issue Dt:	01/04/2011	Application #:	12244286	Filing Dt:	10/02/2008
Publication #:	US20100085823	Pub Dt:	04/08/2010
Title:	OPTIMIZING SRAM PERFORMANCE OVER EXTENDED VOLTAGE OR PROCESS RANGE USING SELF-TIMED CALIBRATION OF LOCAL CLOCK GENERATOR

Patent #:	8004097	Issue Dt:	08/23/2011	Application #:	12244503	Filing Dt:	10/02/2008
Publication #:	US20090020891	Pub Dt:	01/22/2009
Title:	CARRIER WAFER HAVING ALIGNMENT KEYS AND SUPPORTING A CHIP

Patent #:	8568959	Issue Dt:	10/29/2013	Application #:	12244903	Filing Dt:	10/03/2008
Publication #:	US20100086876	Pub Dt:	04/08/2010
Title:	TECHNIQUES FOR REDUCING DEGRADATION AND/OR MODIFYING FEATURE SIZE OF PHOTOMASKS

Patent #:	7892899	Issue Dt:	02/22/2011	Application #:	12244944	Filing Dt:	10/03/2008
Publication #:	US20090029531	Pub Dt:	01/29/2009
Title:	HYBRID ORIENTATION SUBSTRATE AND METHOD FOR FABRICATION THEREOF

Patent #:	7795740	Issue Dt:	09/14/2010	Application #:	12245133	Filing Dt:	10/03/2008
Publication #:	US20090026625	Pub Dt:	01/29/2009
Title:	ADHESION ENHANCEMENT FOR METAL/DIELECTRIC INTERFACE

Patent #:	8084825	Issue Dt:	12/27/2011	Application #:	12245946	Filing Dt:	10/06/2008
Publication #:	US20090101985	Pub Dt:	04/23/2009
Title:	TRILAYER RESIST SCHEME FOR GATE ETCHING APPLICATIONS

Patent #:	7915100	Issue Dt:	03/29/2011	Application #:	12246597	Filing Dt:	10/07/2008
Publication #:	US20090035897	Pub Dt:	02/05/2009
Title:	HYBRID ORIENTATION CMOS WITH PARTIAL INSULATION PROCESS

Patent #:	8178433	Issue Dt:	05/15/2012	Application #:	12246921	Filing Dt:	10/07/2008
Publication #:	US20090029515	Pub Dt:	01/29/2009
Title:	METHODS FOR THE FORMATION OF FULLY SILICIDED METAL GATES

Patent #:	8158449	Issue Dt:	04/17/2012	Application #:	12247474	Filing Dt:	10/08/2008
Publication #:	US20100084656	Pub Dt:	04/08/2010
Title:	PARTICLE EMISSION ANALYSIS FOR SEMICONDUCTOR FABRICATION STEPS

Patent #:	7815968	Issue Dt:	10/19/2010	Application #:	12247894	Filing Dt:	10/08/2008
Publication #:	US20090032962	Pub Dt:	02/05/2009
Title:	CENTRIFUGAL METHOD FOR FILING HIGH ASPECT RATIO BLIND MICRO VIAS WITH POWDERED MATERIALS FOR CIRCUIT FORMATION

Patent #:	8368519	Issue Dt:	02/05/2013	Application #:	12248193	Filing Dt:	10/09/2008
Publication #:	US20090096589	Pub Dt:	04/16/2009
Title:	PACKAGING A SEMICONDUCTOR WAFER

Patent #:	7987086	Issue Dt:	07/26/2011	Application #:	12248951	Filing Dt:	10/10/2008
Publication #:	US20090030666	Pub Dt:	01/29/2009
Title:	SOFTWARE ENTITY FOR THE CREATION OF A HYBRID CYCLE SIMULATION MODEL

Patent #:	8084788	Issue Dt:	12/27/2011	Application #:	12248970	Filing Dt:	10/10/2008
Publication #:	US20100090288	Pub Dt:	04/15/2010
Title:	METHOD OF FORMING SOURCE AND DRAIN OF A FIELD-EFFECT-TRANSISTOR AND STRUCTURE THEREOF

Patent #:	8718112	Issue Dt:	05/06/2014	Application #:	12249271	Filing Dt:	10/10/2008
Publication #:	US20100091370	Pub Dt:	04/15/2010
Title:	RADIAL BRAGG RING RESONATOR STRUCTURE WITH HIGH QUALITY FACTOR

Patent #:	7982997	Issue Dt:	07/19/2011	Application #:	12251373	Filing Dt:	10/14/2008
Publication #:	US20090103202	Pub Dt:	04/23/2009
Title:	METHOD FOR AN EQUALIZER COMPUTATION IN A MEDIA SYSTEM USING A DATA SET SEPARATOR SEQUENCE

Patent #:	8064273	Issue Dt:	11/22/2011	Application #:	12251509	Filing Dt:	10/15/2008
Publication #:	US20100091584	Pub Dt:	04/15/2010
Title:	MEMORY DEVICE AND METHODS THEREOF

Patent #:	7953519	Issue Dt:	05/31/2011	Application #:	12251583	Filing Dt:	10/15/2008
Publication #:	US20100094476	Pub Dt:	04/15/2010
Title:	ENERGY USAGE MONITORING AND BALANCING METHOD AND SYSTEM

Patent #:	8168366	Issue Dt:	05/01/2012	Application #:	12253072	Filing Dt:	10/16/2008
Publication #:	US20110008727	Pub Dt:	01/13/2011
Title:	LOW ACTIVATION ENERGY PHOTORESIST COMPOSITION AND PROCESS FOR ITS USE

Patent #:	8074061	Issue Dt:	12/06/2011	Application #:	12253339	Filing Dt:	10/17/2008
Publication #:	US20100100711	Pub Dt:	04/22/2010
Title:	EXECUTING MICRO-CODE INSTRUCTION WITH DELAY FIELD AND ADDRESS OF NEXT INSTRUCTION WHICH IS DECODED AFTER INDICATED DELAY

Patent #:	8347247	Issue Dt:	01/01/2013	Application #:	12253472	Filing Dt:	10/17/2008
Publication #:	US20100100376	Pub Dt:	04/22/2010
Title:	VISUALIZATION INTERFACE OF CONTINUOUS WAVEFORM MULTI-SPEAKER IDENTIFICATION

Patent #:	7932158	Issue Dt:	04/26/2011	Application #:	12254197	Filing Dt:	10/20/2008
Publication #:	US20090039461	Pub Dt:	02/12/2009
Title:	FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS

Patent #:	8112647	Issue Dt:	02/07/2012	Application #:	12254650	Filing Dt:	10/20/2008
Publication #:	US20100058078	Pub Dt:	03/04/2010
Title:	PROTOCOL FOR POWER STATE DETERMINATION AND DEMOTION

Patent #:	7900182	Issue Dt:	03/01/2011	Application #:	12255819	Filing Dt:	10/22/2008
Publication #:	US20090044155	Pub Dt:	02/12/2009
Title:	METHOD AND SYSTEM FOR DESIGNING AN ELECTRONIC CIRCUIT

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100

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Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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