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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
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Patent #:	7880207	Issue Dt:	02/01/2011	Application #:	12350991	Filing Dt:	01/09/2009
Publication #:	US20090179225	Pub Dt:	07/16/2009
Title:	PHOTO DETECTOR DEVICE

Patent #:	7881891	Issue Dt:	02/01/2011	Application #:	12351010	Filing Dt:	01/09/2009
Publication #:	US20090119049	Pub Dt:	05/07/2009
Title:	AUTOMATED DYNAMIC METROLOGY SAMPLING SYSTEM AND METHOD FOR PROCESS CONTROL

Patent #:	8346527	Issue Dt:	01/01/2013	Application #:	12351201	Filing Dt:	01/09/2009
Publication #:	US20090182545	Pub Dt:	07/16/2009
Title:	SIMULATING AN OPERATION OF A DIGITAL CIRCUIT

Patent #:	8232150	Issue Dt:	07/31/2012	Application #:	12351263	Filing Dt:	01/09/2009
Publication #:	US20100176450	Pub Dt:	07/15/2010
Title:	STRUCTURE AND METHOD OF FORMING A TRANSISTOR WITH ASYMMETRIC CHANNEL AND SOURCE/DRAIN REGIONS

Patent #:	8021974	Issue Dt:	09/20/2011	Application #:	12351436	Filing Dt:	01/09/2009
Publication #:	US20100176512	Pub Dt:	07/15/2010
Title:	STRUCTURE AND METHOD FOR BACK END OF THE LINE INTEGRATION

Patent #:	8276045	Issue Dt:	09/25/2012	Application #:	12351738	Filing Dt:	01/09/2009
Publication #:	US20100180180	Pub Dt:	07/15/2010
Title:	ECC INTERLEAVING FOR MULTI-TRACK RECORDING ON MAGNETIC TAPE

Patent #:	7916531	Issue Dt:	03/29/2011	Application #:	12351872	Filing Dt:	01/12/2009
Publication #:	US20090147568	Pub Dt:	06/11/2009
Title:	MEMORY ELEMENTS AND METHODS OF USING THE SAME

Patent #:	8361704	Issue Dt:	01/29/2013	Application #:	12352051	Filing Dt:	01/12/2009
Publication #:	US20100178615	Pub Dt:	07/15/2010
Title:	METHOD FOR REDUCING TIP-TO-TIP SPACING BETWEEN LINES

Patent #:	7713806	Issue Dt:	05/11/2010	Application #:	12352504	Filing Dt:	01/12/2009
Publication #:	US20090149010	Pub Dt:	06/11/2009
Title:	STRUCTURES AND METHODS FOR MANUFACTURING OF DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI MOS DEVICES BY GATE STRESS ENGINEERING WITH SIGE AND/OR SI:C

Patent #:	8263497	Issue Dt:	09/11/2012	Application #:	12352718	Filing Dt:	01/13/2009
Publication #:	US20100178766	Pub Dt:	07/15/2010
Title:	HIGH-YIELD METHOD OF EXPOSING AND CONTACTING THROUGH-SILICON VIAS

Patent #:	8030635	Issue Dt:	10/04/2011	Application #:	12353219	Filing Dt:	01/13/2009
Publication #:	US20100176362	Pub Dt:	07/15/2010
Title:	POLYSILICON PLUG BIPOLAR TRANSISTOR FOR PHASE CHANGE MEMORY

Patent #:	8650634	Issue Dt:	02/11/2014	Application #:	12353329	Filing Dt:	01/14/2009
Publication #:	US20100180337	Pub Dt:	07/15/2010
Title:	ENABLING ACCESS TO A SUBSET OF DATA

Patent #:	7723196	Issue Dt:	05/25/2010	Application #:	12354088	Filing Dt:	01/15/2009
Publication #:	US20090124057	Pub Dt:	05/14/2009
Title:	DAMASCENE GATE FIELD EFFECT TRANSISTOR WITH AN INTERNAL SPACER STRUCTURE

Patent #:	8140297	Issue Dt:	03/20/2012	Application #:	12354958	Filing Dt:	01/16/2009
Publication #:	US20100185410	Pub Dt:	07/22/2010
Title:	THREE DIMENSIONAL CHIP FABRICATION

Patent #:	7960809	Issue Dt:	06/14/2011	Application #:	12354996	Filing Dt:	01/16/2009
Publication #:	US20100181643	Pub Dt:	07/22/2010
Title:	EFUSE WITH PARTIAL SIGE LAYER AND DESIGN STRUCTURE THEREFOR

Patent #:	8357610	Issue Dt:	01/22/2013	Application #:	12355112	Filing Dt:	01/16/2009
Publication #:	US20090243116	Pub Dt:	10/01/2009
Title:	REDUCING PATTERNING VARIABILITY OF TRENCHES IN METALLIZATION LAYER STACKS WITH A LOW-K MATERIAL BY REDUCING CONTAMINATION OF TRENCH DIELECTRICS

Patent #:	7833825	Issue Dt:	11/16/2010	Application #:	12355189	Filing Dt:	01/16/2009
Publication #:	US20090121211	Pub Dt:	05/14/2009
Title:	SOLUTION-BASED DEPOSITION PROCESS FOR METAL CHALCOGENIDES

Patent #:	7897450	Issue Dt:	03/01/2011	Application #:	12355250	Filing Dt:	01/16/2009
Publication #:	US20090242999	Pub Dt:	10/01/2009
Title:	METHOD FOR ENCAPSULATING A HIGH-K GATE STACK BY FORMING A LINER AT TWO DIFFERENT PROCESS TEMPERATURES

Patent #:	8288979	Issue Dt:	10/16/2012	Application #:	12355495	Filing Dt:	01/16/2009
Publication #:	US20100181949	Pub Dt:	07/22/2010
Title:	MOTOR CONTROL MECHANISM FOR ELECTRIC VEHICLES

Patent #:	7995983	Issue Dt:	08/09/2011	Application #:	12355547	Filing Dt:	01/16/2009
Publication #:	US20090156156	Pub Dt:	06/18/2009
Title:	GILBERT MIXERS WITH IMPROVED ISOLATION

Patent #:	8407638	Issue Dt:	03/26/2013	Application #:	12355757	Filing Dt:	01/16/2009
Publication #:	US20090125856	Pub Dt:	05/14/2009
Title:	METHODS AND APPARATUS FOR BOOLEAN EQUIVALENCY CHECKING IN THE PRESENCE OF VOTING LOGIC

Patent #:	8108804	Issue Dt:	01/31/2012	Application #:	12355814	Filing Dt:	01/19/2009
Publication #:	US20100185999	Pub Dt:	07/22/2010
Title:	SHORT PATH CUSTOMIZED MASK CORRECTION

Patent #:	8159814	Issue Dt:	04/17/2012	Application #:	12355815	Filing Dt:	01/19/2009
Publication #:	US20100182729	Pub Dt:	07/22/2010
Title:	METHOD OF OPERATING TRANSISTORS AND STRUCTURES THEREOF FOR IMPROVED RELIABILITY AND LIFETIME

Patent #:	8169760	Issue Dt:	05/01/2012	Application #:	12355889	Filing Dt:	01/19/2009
Publication #:	US20100181621	Pub Dt:	07/22/2010
Title:	SIGNAL AND POWER SUPPLY INTEGRATED ESD PROTECTION DEVICE

Patent #:	8464037	Issue Dt:	06/11/2013	Application #:	12355900	Filing Dt:	01/19/2009
Publication #:	US20090276617	Pub Dt:	11/05/2009
Title:	COMPUTER SYSTEM COMPRISING A SECURE BOOT MECHANISM ON THE BASIS OF SYMMETRIC KEY ENCRYPTION

Patent #:	7863123	Issue Dt:	01/04/2011	Application #:	12355953	Filing Dt:	01/19/2009
Publication #:	US20100181630	Pub Dt:	07/22/2010
Title:	DIRECT CONTACT BETWEEN HIGH-K/METAL GATE AND WIRING PROCESS FLOW

Patent #:	8525263	Issue Dt:	09/03/2013	Application #:	12355954	Filing Dt:	01/19/2009
Publication #:	US20100181620	Pub Dt:	07/22/2010
Title:	PROGRAMMABLE HIGH-K/METAL GATE MEMORY DEVICE

Patent #:	8227336	Issue Dt:	07/24/2012	Application #:	12356105	Filing Dt:	01/20/2009
Publication #:	US20100181678	Pub Dt:	07/22/2010
Title:	STRUCTURE WITH SELF ALIGNED RESIST LAYER ON AN INTERCONNECT SURFACE AND METHOD OF MAKING SAME

Patent #:	7838200	Issue Dt:	11/23/2010	Application #:	12356187	Filing Dt:	01/20/2009
Publication #:	US20090155715	Pub Dt:	06/18/2009
Title:	PHOTORESIST COMPOSITIONS AND METHOD FOR MULTIPLE EXPOSURES WITH MULTIPLE LAYER RESIST SYSTEMS

Patent #:	8140565	Issue Dt:	03/20/2012	Application #:	12356394	Filing Dt:	01/20/2009
Publication #:	US20100185590	Pub Dt:	07/22/2010
Title:	AUTONOMIC INFORMATION MANAGEMENT SYSTEM (IMS) MAINFRAME DATABASE POINTER ERROR DIAGNOSTIC DATA EXTRACTION

Patent #:	8195887	Issue Dt:	06/05/2012	Application #:	12356624	Filing Dt:	01/21/2009
Publication #:	US20100185820	Pub Dt:	07/22/2010
Title:	PROCESSOR POWER MANAGEMENT AND METHOD

Patent #:	8214770	Issue Dt:	07/03/2012	Application #:	12357648	Filing Dt:	01/22/2009
Publication #:	US20090125868	Pub Dt:	05/14/2009
Title:	MULTILAYER OPC FOR DESIGN AWARE MANUFACTURING

Patent #:	8138840	Issue Dt:	03/20/2012	Application #:	12358736	Filing Dt:	01/23/2009
Publication #:	US20100188158	Pub Dt:	07/29/2010
Title:	OPTIMAL DITHERING OF A DIGITALLY CONTROLLED OSCILLATOR WITH CLOCK DITHERING FOR GAIN AND BANDWIDTH CONTROL

Patent #:	8245173	Issue Dt:	08/14/2012	Application #:	12359369	Filing Dt:	01/26/2009
Publication #:	US20100192155	Pub Dt:	07/29/2010
Title:	SCHEDULING FOR PARALLEL PROCESSING OF REGIONALLY-CONSTRAINED PLACEMENT PROBLEM

Patent #:	7989918	Issue Dt:	08/02/2011	Application #:	12359484	Filing Dt:	01/26/2009
Publication #:	US20100187525	Pub Dt:	07/29/2010
Title:	IMPLEMENTING TAMPER EVIDENT AND RESISTANT DETECTION THROUGH MODULATION OF CAPACITANCE

Patent #:	7838908	Issue Dt:	11/23/2010	Application #:	12359520	Filing Dt:	01/26/2009
Publication #:	US20100187610	Pub Dt:	07/29/2010
Title:	SEMICONDUCTOR DEVICE HAVING DUAL METAL GATES AND METHOD OF MANUFACTURE

Patent #:	7670934	Issue Dt:	03/02/2010	Application #:	12359764	Filing Dt:	01/26/2009
Title:	METHODS FOR FABRICATING MOS DEVICES HAVING EPITAXIALLY GROWN STRESS-INDUCING SOURCE AND DRAIN REGIONS

Patent #:	9097989	Issue Dt:	08/04/2015	Application #:	12360132	Filing Dt:	01/27/2009
Publication #:	US20100190096	Pub Dt:	07/29/2010
Title:	TARGET AND METHOD FOR MASK-TO-WAFER CD, PATTERN PLACEMENT AND OVERLAY MEASUREMENT AND CONTROL

Patent #:	7835176	Issue Dt:	11/16/2010	Application #:	12360230	Filing Dt:	01/27/2009
Publication #:	US20100188888	Pub Dt:	07/29/2010
Title:	IMPLEMENTING ENHANCED DUAL MODE SRAM PERFORMANCE SCREEN RING OSCILLATOR

Patent #:	7911827	Issue Dt:	03/22/2011	Application #:	12360242	Filing Dt:	01/27/2009
Publication #:	US20100188886	Pub Dt:	07/29/2010
Title:	IMPLEMENTING ENHANCED SRAM STABILITY AND ENHANCED CHIP YIELD WITH CONFIGURABLE WORDLINE VOLTAGE LEVELS

Patent #:	8316284	Issue Dt:	11/20/2012	Application #:	12360402	Filing Dt:	01/27/2009
Publication #:	US20090164874	Pub Dt:	06/25/2009
Title:	COLLECTING FAILURE INFORMATION ON ERROR CORRECTION CODE (ECC) PROTECTED DATA

Patent #:	8269671	Issue Dt:	09/18/2012	Application #:	12360538	Filing Dt:	01/27/2009
Publication #:	US20100190464	Pub Dt:	07/29/2010
Title:	SIMPLE RADIO FREQUENCY INTEGRATED CIRCUIT (RFIC) PACKAGES WITH INTEGRATED ANTENNAS

Patent #:	8148214	Issue Dt:	04/03/2012	Application #:	12360961	Filing Dt:	01/28/2009
Publication #:	US20090130803	Pub Dt:	05/21/2009
Title:	STRESSED FIELD EFFECT TRANSISTOR AND METHODS FOR ITS FABRICATION

Patent #:	8157978	Issue Dt:	04/17/2012	Application #:	12361736	Filing Dt:	01/29/2009
Publication #:	US20100187126	Pub Dt:	07/29/2010
Title:	ETCHING SYSTEM AND METHOD FOR FORMING MULTIPLE POROUS SEMICONDUCTOR REGIONS WITH DIFFERENT OPTICAL AND STRUCTURAL PROPERTIES ON A SINGLE SEMICONDUCTOR WAFER

Patent #:	8227891	Issue Dt:	07/24/2012	Application #:	12362877	Filing Dt:	01/30/2009
Publication #:	US20090132082	Pub Dt:	05/21/2009
Title:	STRIPED ON-CHIP INDUCTOR

Patent #:	7897444	Issue Dt:	03/01/2011	Application #:	12363239	Filing Dt:	01/30/2009
Publication #:	US20090134460	Pub Dt:	05/28/2009
Title:	STRAINED SEMICONDUCTOR-ON-INSULATOR (SSOI) BY A SIMOX METHOD

Patent #:	7851376	Issue Dt:	12/14/2010	Application #:	12364088	Filing Dt:	02/02/2009
Publication #:	US20090137109	Pub Dt:	05/28/2009
Title:	COMPRESSIVE NITRIDE FILM AND METHOD OF MANUFACTURING THEREOF

Patent #:	7640788	Issue Dt:	01/05/2010	Application #:	12364427	Filing Dt:	02/02/2009
Publication #:	US20090133468	Pub Dt:	05/28/2009
Title:	WEAR GAUGE AND METHOD OF USE

Patent #:	8280040	Issue Dt:	10/02/2012	Application #:	12365543	Filing Dt:	02/04/2009
Publication #:	US20100195820	Pub Dt:	08/05/2010
Title:	PROCESSOR INSTRUCTIONS FOR IMPROVED AES ENCRYPTION AND DECRYPTION

Patent #:	8183949	Issue Dt:	05/22/2012	Application #:	12365919	Filing Dt:	02/05/2009
Publication #:	US20100194482	Pub Dt:	08/05/2010
Title:	COMPENSATION OF VCO GAIN CURVE OFFSETS USING AUTO-CALIBRATION

Patent #:	8183950	Issue Dt:	05/22/2012	Application #:	12365921	Filing Dt:	02/05/2009
Publication #:	US20100194483	Pub Dt:	08/05/2010
Title:	AUTO-CALIBRATION FOR RING OSCILLATOR VCO

Patent #:	8043956	Issue Dt:	10/25/2011	Application #:	12365963	Filing Dt:	02/05/2009
Publication #:	US20090243105	Pub Dt:	10/01/2009
Title:	WIRE BONDING ON REACTIVE METAL SURFACES OF A METALLIZATION OF A SEMICONDUCTOR DEVICE BY PROVIDING A PROTECTIVE LAYER

Patent #:	8197124	Issue Dt:	06/12/2012	Application #:	12365990	Filing Dt:	02/05/2009
Publication #:	US20100195694	Pub Dt:	08/05/2010
Title:	HEAT FLOW MEASUREMENT TOOL FOR A RACK MOUNTED ASSEMBLY OF ELECTRONIC EQUIPMENT

Patent #:	7812643	Issue Dt:	10/12/2010	Application #:	12366005	Filing Dt:	02/05/2009
Publication #:	US20100194437	Pub Dt:	08/05/2010
Title:	IMPLEMENTING CML MULTIPLEXER LOAD BALANCING

Patent #:	7935593	Issue Dt:	05/03/2011	Application #:	12366356	Filing Dt:	02/05/2009
Publication #:	US20100197093	Pub Dt:	08/05/2010
Title:	STRESS OPTIMIZATION IN DUAL EMBEDDED EPITAXIALLY GROWN SEMICONDUCTOR PROCESSING

Patent #:	7994038	Issue Dt:	08/09/2011	Application #:	12366378	Filing Dt:	02/05/2009
Publication #:	US20100193876	Pub Dt:	08/05/2010
Title:	METHOD TO REDUCE MOL DAMAGE ON NISI

Patent #:	7642569	Issue Dt:	01/05/2010	Application #:	12366425	Filing Dt:	02/05/2009
Publication #:	US20090134429	Pub Dt:	05/28/2009
Title:	TRANSISTOR STRUCTURE WITH MINIMIZED PARASITICS AND METHOD OF FABRICATING THE SAME

Patent #:	8195035	Issue Dt:	06/05/2012	Application #:	12366721	Filing Dt:	02/06/2009
Publication #:	US20100202754	Pub Dt:	08/12/2010
Title:	LINK-BASED DVR SCHEDULING WITH CONFLICT RESOLUTION

Patent #:	8035228	Issue Dt:	10/11/2011	Application #:	12367951	Filing Dt:	02/09/2009
Publication #:	US20090140387	Pub Dt:	06/04/2009
Title:	HIGH-DENSITY 3-DIMENSIONAL RESISTORS

Patent #:	7827020	Issue Dt:	11/02/2010	Application #:	12368452	Filing Dt:	02/10/2009
Publication #:	US20090144043	Pub Dt:	06/04/2009
Title:	POST INITIAL MICROCODE LOAD CO-SIMULATION

Patent #:	8222154	Issue Dt:	07/17/2012	Application #:	12368561	Filing Dt:	02/10/2009
Publication #:	US20100203732	Pub Dt:	08/12/2010
Title:	FIN AND FINFET FORMATION BY ANGLED ION IMPLANTATION

Patent #:	8044732	Issue Dt:	10/25/2011	Application #:	12369021	Filing Dt:	02/11/2009
Publication #:	US20090201097	Pub Dt:	08/13/2009
Title:	CONTINUOUSLY TUNABLE INDUCTOR AND METHOD TO CONTINUOUSLY TUNE AN INDUCTOR

Patent #:	8018312	Issue Dt:	09/13/2011	Application #:	12369036	Filing Dt:	02/11/2009
Publication #:	US20090201101	Pub Dt:	08/13/2009
Title:	INDUCTOR AND METHOD OF OPERATING AN INDUCTOR BY COMBINING PRIMARY AND SECONDARY COILS WITH COUPLING STRUCTURES

Patent #:	7898286	Issue Dt:	03/01/2011	Application #:	12369066	Filing Dt:	02/11/2009
Publication #:	US20100201377	Pub Dt:	08/12/2010
Title:	CRITICAL PATH REDUNDANT LOGIC FOR MITIGATION OF HARDWARE ACROSS CHIP VARIATION

Patent #:	8299537	Issue Dt:	10/30/2012	Application #:	12369099	Filing Dt:	02/11/2009
Publication #:	US20100200927	Pub Dt:	08/12/2010
Title:	SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND STRUCTURE INCLUDING MULTIPLE ORDER RADIO FERQUENCY HARMONIC SUPRESSING REGION

Patent #:	7843005	Issue Dt:	11/30/2010	Application #:	12369249	Filing Dt:	02/11/2009
Publication #:	US20100201440	Pub Dt:	08/12/2010
Title:	SOI RADIO FREQUENCY SWITCH WITH REDUCED SIGNAL DISTORTION

Patent #:	8395877	Issue Dt:	03/12/2013	Application #:	12370356	Filing Dt:	02/12/2009
Publication #:	US20100201289	Pub Dt:	08/12/2010
Title:	HIGH-SPEED ELECTROSTATIC ACTUATION OF MEMS-BASED DEVICES

Patent #:	8097932	Issue Dt:	01/17/2012	Application #:	12371180	Filing Dt:	02/13/2009
Publication #:	US20090146265	Pub Dt:	06/11/2009
Title:	ULTRA LOW K PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION PROCESSES USING A SINGLE BIFUNCTIONAL PRECURSOR CONTAINING BOTH A SICOH MATRIX FUNCTIONALITY AND ORGANIC POROGEN FUNCTIONALITY

Patent #:	7859825	Issue Dt:	12/28/2010	Application #:	12371756	Filing Dt:	02/16/2009
Publication #:	US20090152612	Pub Dt:	06/18/2009
Title:	HIGH YIELD, HIGH DENSITY ON-CHIP CAPACITOR DESIGN

Patent #:	7893492	Issue Dt:	02/22/2011	Application #:	12371943	Filing Dt:	02/17/2009
Publication #:	US20100207208	Pub Dt:	08/19/2010
Title:	NANOWIRE MESH DEVICE AND METHOD OF FABRICATING SAME

Patent #:	8163466	Issue Dt:	04/24/2012	Application #:	12371956	Filing Dt:	02/17/2009
Publication #:	US20100209853	Pub Dt:	08/19/2010
Title:	METHOD FOR SELECTIVELY ADJUSTING LOCAL RESIST PATTERN DIMENSION WITH CHEMICAL TREATMENT

Patent #:	8103478	Issue Dt:	01/24/2012	Application #:	12388060	Filing Dt:	02/18/2009
Publication #:	US20090276077	Pub Dt:	11/05/2009
Title:	METHOD AND SYSTEM FOR SEMICONDUCTOR PROCESS CONTROL AND MONITORING BY USING PCA MODELS OF REDUCED SIZE

Patent #:	8293581	Issue Dt:	10/23/2012	Application #:	12388064	Filing Dt:	02/18/2009
Publication #:	US20100207250	Pub Dt:	08/19/2010
Title:	SEMICONDUCTOR CHIP WITH PROTECTIVE SCRIBE STRUCTURE

Patent #:	8026539	Issue Dt:	09/27/2011	Application #:	12388094	Filing Dt:	02/18/2009
Publication #:	US20100207176	Pub Dt:	08/19/2010
Title:	METAL OXIDE SEMICONDUCTOR DEVICES HAVING DOPED SILICON-COMPROMISING CAPPING LAYERS AND METHODS FOR FABRICATING THE SAME

Patent #:	7943445	Issue Dt:	05/17/2011	Application #:	12388586	Filing Dt:	02/19/2009
Publication #:	US20100207173	Pub Dt:	08/19/2010
Title:	ASYMMETRIC JUNCTION FIELD EFFECT TRANSISTOR

Patent #:	8039366	Issue Dt:	10/18/2011	Application #:	12388851	Filing Dt:	02/19/2009
Publication #:	US20100207284	Pub Dt:	08/19/2010
Title:	METHOD FOR PROVIDING ROTATIONALLY SYMMETRIC ALIGNMENT MARKS FOR AN ALIGNMENT SYSTEM THAT REQUIRES ASYMMETRIC GEOMETRIC LAYOUT

Patent #:	8122404	Issue Dt:	02/21/2012	Application #:	12388932	Filing Dt:	02/19/2009
Publication #:	US20100211922	Pub Dt:	08/19/2010
Title:	PERFORMING A STATISTICAL TIMING ABSTRACTION FOR A HIERARCHICAL TIMING ANALYSIS OF VLSI CIRCUITS

Patent #:	7868809	Issue Dt:	01/11/2011	Application #:	12389618	Filing Dt:	02/20/2009
Publication #:	US20090160691	Pub Dt:	06/25/2009
Title:	DIGITAL TO ANALOG CONVERTER HAVING FASTPATHS

Patent #:	7879672	Issue Dt:	02/01/2011	Application #:	12390739	Filing Dt:	02/23/2009
Publication #:	US20100213523	Pub Dt:	08/26/2010
Title:	EDRAM MEMORY CELL STRUCTURE AND METHOD OF FABRICATING

Patent #:	8212184	Issue Dt:	07/03/2012	Application #:	12390816	Filing Dt:	02/23/2009
Publication #:	US20090295457	Pub Dt:	12/03/2009
Title:	COLD TEMPERATURE CONTROL IN A SEMICONDUCTOR DEVICE

Patent #:	8048791	Issue Dt:	11/01/2011	Application #:	12390907	Filing Dt:	02/23/2009
Publication #:	US20100213553	Pub Dt:	08/26/2010
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE

Patent #:	8386883	Issue Dt:	02/26/2013	Application #:	12391547	Filing Dt:	02/24/2009
Publication #:	US20100218070	Pub Dt:	08/26/2010
Title:	LENGTHENING LIFE OF A LIMITED LIFE MEMORY

Patent #:	7943474	Issue Dt:	05/17/2011	Application #:	12391631	Filing Dt:	02/24/2009
Publication #:	US20100213571	Pub Dt:	08/26/2010
Title:	EDRAM INCLUDING METAL PLATES

Patent #:	8166368	Issue Dt:	04/24/2012	Application #:	12391678	Filing Dt:	02/24/2009
Publication #:	US20100218071	Pub Dt:	08/26/2010
Title:	WRITING A SPECIAL SYMBOL TO A MEMORY TO INDICATE THE ABSENCE OF A DATA SIGNAL

Patent #:	8023345	Issue Dt:	09/20/2011	Application #:	12391693	Filing Dt:	02/24/2009
Publication #:	US20100214829	Pub Dt:	08/26/2010
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100

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Title:	METHOD AND COMPUTER PROGRAM FOR CONTROLLING A STORAGE DEVICE HAVING PER-ELEMENT SELECTABLE POWER SUPPLY VOLTAGES

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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