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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
Page 7 of 146
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Patent #:	6518509	Issue Dt:	02/11/2003	Application #:	09471680	Filing Dt:	12/23/1999
Title:	COPPER PLATED INVAR WITH ACID PRECLEAN

Patent #:	6461493	Issue Dt:	10/08/2002	Application #:	09472136	Filing Dt:	12/23/1999
Title:	NOVEL DECOUPLING CAPACITOR METHOD AND STRUCTURE USING METAL BASED CARRIER

Patent #:	6270646	Issue Dt:	08/07/2001	Application #:	09473909	Filing Dt:	12/28/1999
Title:	ELECTROPLATING APPARATUS AND METHOD USING A COMPRESSIBLE CONTACT

Patent #:	6389512	Issue Dt:	05/14/2002	Application #:	09474790	Filing Dt:	12/29/1999
Title:	MICROPROCESSOR CONFIGURED TO DETECT UPDATES TO INSTRUCTIONS OUTSTANDING WITHIN AN INSTRUCTION PROCESSING PIPELINE AND COMPUTER SYSTEM INCLUDING SAME

Patent #:	6541863	Issue Dt:	04/01/2003	Application #:	09475572	Filing Dt:	01/05/2000
Title:	SEMICONDUCTOR DEVICE HAVING A REDUCED SIGNAL PROCESSING TIME AND A METHOD OF FABRICATING THE SAME

Patent #:	6622237	Issue Dt:	09/16/2003	Application #:	09476192	Filing Dt:	01/03/2000
Title:	STORE TO LOAD FORWARD PREDICTOR TRAINING USING DELTA TAG

Patent #:	6622235	Issue Dt:	09/16/2003	Application #:	09476204	Filing Dt:	01/03/2000
Title:	SCHEDULER WHICH RETRIES LOAD/STORE HIT SITUATIONS

Patent #:	6433985	Issue Dt:	08/13/2002	Application #:	09476244	Filing Dt:	12/30/1999
Title:	ESD NETWORK WITH CAPACITOR BLOCKING ELEMENT

Patent #:	6500604	Issue Dt:	12/31/2002	Application #:	09476275	Filing Dt:	01/03/2000
Title:	METHOD FOR PATTERNING SENSITIVE ORGANIC THIN FILMS

Patent #:	6564315	Issue Dt:	05/13/2003	Application #:	09476322	Filing Dt:	01/03/2000
Title:	SCHEDULER WHICH DISCOVERS NON-SPECULATIVE NATURE OF AN INSTRUCTION AFTER ISSUING AND REISSUES THE INSTRUCTION

Patent #:	6687789	Issue Dt:	02/03/2004	Application #:	09476577	Filing Dt:	01/03/2000
Title:	CACHE WHICH PROVIDES PARTIAL TAGS FROM NON-PREDICTED WAYS TO DIRECT SEARCH IF WAY PREDICTION MISSES

Patent #:	6694424	Issue Dt:	02/17/2004	Application #:	09476579	Filing Dt:	01/03/2000
Title:	STORE LOAD FORWARD PREDICTOR TRAINING

Patent #:	6650957	Issue Dt:	11/18/2003	Application #:	09476696	Filing Dt:	01/03/2000
Title:	METHOD AND APPARATUS FOR RUN-TO-RUN CONTROL OF DEPOSITION PROCESS

Patent #:	6485990	Issue Dt:	11/26/2002	Application #:	09476875	Filing Dt:	01/04/2000
Title:	FEED-FORWARD CONTROL OF AN ETCH PROCESSING TOOL

Patent #:	6684122	Issue Dt:	01/27/2004	Application #:	09476892	Filing Dt:	01/03/2000
Title:	CONTROL MECHANISM FOR MATCHING PROCESS PARAMETERS IN A MULTI-CHAMBER PROCESS TOOL

Patent #:	6376261	Issue Dt:	04/23/2002	Application #:	09476893	Filing Dt:	01/03/2000
Title:	METHOD FOR VARYING NITRIDE STRIP MAKEUP PROCESS BASED ON FIELD OXIDE LOSS AND DEFECT COUNT

Patent #:	6502185	Issue Dt:	12/31/2002	Application #:	09476936	Filing Dt:	01/03/2000
Title:	PIPELINE ELEMENTS WHICH VERIFY PREDECODE INFORMATION

Patent #:	6395100	Issue Dt:	05/28/2002	Application #:	09476944	Filing Dt:	01/03/2000
Title:	METHOD OF IMPROVING VACUUM QUALITY IN SEMICONDUCTOR PROCESSING CHAMBERS

Patent #:	6516450	Issue Dt:	02/04/2003	Application #:	09476955	Filing Dt:	01/03/2000
Title:	VARIABLE DESIGN RULE TOOL

Patent #:	6150286	Issue Dt:	11/21/2000	Application #:	09477050	Filing Dt:	01/03/2000
Title:	METHOD OF MAKING AN ULTRA THIN SILICON NITRIDE FILM

Patent #:	6476446	Issue Dt:	11/05/2002	Application #:	09477067	Filing Dt:	01/03/2000
Publication #:	US20020008283	Pub Dt:	01/24/2002
Title:	HEAT REMOVAL BY REMOVAL OF BURIED OXIDE IN ISOLATION AREAS

Patent #:	7433224	Issue Dt:	10/07/2008	Application #:	09477099	Filing Dt:	01/04/2000
Title:	SYSTEM AND METHOD FOR FORCING AN SRAM INTO A KNOWN STATE DURING POWER-UP

Patent #:	6711673	Issue Dt:	03/23/2004	Application #:	09477124	Filing Dt:	01/03/2000
Title:	USING A MODEL SPECIFIC REGISTER AS A BASE I/O ADDRESS REGISTER FOR EMBEDDED I/O REGISTERS IN A PROCESSOR

Patent #:	6741258	Issue Dt:	05/25/2004	Application #:	09477216	Filing Dt:	01/04/2000
Title:	DISTRIBUTED TRANSLATION LOOK-ASIDE BUFFERS FOR GRAPHICS ADDRESS REMAPPING TABLE

Patent #:	6535946	Issue Dt:	03/18/2003	Application #:	09477321	Filing Dt:	01/04/2000
Title:	LOW-LATENCY CIRCUIT FOR SYNCHRONIZING DATA TRANSFERS BETWEEN CLOCK DOMAINS DERIVED FROM A COMMON CLOCK

Patent #:	6449524	Issue Dt:	09/10/2002	Application #:	09477465	Filing Dt:	01/04/2000
Title:	METHOD AND APPARATUS FOR USING EQUIPMENT STATE DATA FOR RUN-TO-RUN CONTROL OF MANUFACTURING TOOLS

Patent #:	6775283	Issue Dt:	08/10/2004	Application #:	09477663	Filing Dt:	01/05/2000
Title:	PASSING VLAN INFORMATION THROUGH DESCRIPTORS

Patent #:	6731601	Issue Dt:	05/04/2004	Application #:	09477723	Filing Dt:	01/05/2000
Title:	APPARATUS AND METHOD FOR RESETTING A RETRY COUNTER IN A NETWORK SWITCH PORT IN RESPONSE TO EXERTING BACKPRESSURE

Patent #:	6258683	Issue Dt:	07/10/2001	Application #:	09477741	Filing Dt:	01/05/2000
Title:	LOCAL INTERCONNECTION ARRANGEMENT WITH REDUCED JUNCTION LEAKAGE AND METHOD OF FORMING SAME

Patent #:	6146988	Issue Dt:	11/14/2000	Application #:	09477820	Filing Dt:	01/05/2000
Title:	A METHOD OF MAKING A SEMICONDUCTOR DEVICE COMPRISING COPPER INTERCONNECTS WITH REDUCED IN-LINE COPPER DIFFUSION

Patent #:	6444567	Issue Dt:	09/03/2002	Application #:	09477822	Filing Dt:	01/05/2000
Title:	PROCESS FOR ALLOYING DAMASCENE-TYPE CU INTERCONNECT LINES

Patent #:	6420943	Issue Dt:	07/16/2002	Application #:	09478054	Filing Dt:	01/05/2000
Title:	CONDUCTING PATH WITH TWO DIFFERENT END CHARACTERISTIC IMPEDANCES DETERMINED BY DOPING

Patent #:	6352867	Issue Dt:	03/05/2002	Application #:	09478181	Filing Dt:	01/05/2000
Title:	METHOD OF CONTROLLING FEATURE DIMENSIONS BASED UPON ETCH CHEMISTRY CONCENTRATIONS

Patent #:	6165877	Issue Dt:	12/26/2000	Application #:	09478958	Filing Dt:	01/07/2000
Title:	METHOD FOR ESTABLISHING SHALLOW JUNCTION IN SEMICONDUCTOR DEVICE TO MINIMIZE JUNCTION CAPACITANCE

Patent #:	6207542	Issue Dt:	03/27/2001	Application #:	09478962	Filing Dt:	01/07/2000
Title:	METHOD FOR ESTABLIHING ULTRA-THIN GATE INSULATOR USING OXIDIZED NITRIDE FILM

Patent #:	6798953	Issue Dt:	09/28/2004	Application #:	09479109	Filing Dt:	01/07/2000
Title:	GUIDES LITHOGRAPHICALLY FABRICATED ON SEMICONDUCTOR DEVICES

Patent #:	6469518	Issue Dt:	10/22/2002	Application #:	09479180	Filing Dt:	01/07/2000
Title:	METHOD AND APPARATUS FOR DETERMINING MEASUREMENT FREQUENCY BASED ON HARDWARE AGE AND USAGE

Patent #:	6268255	Issue Dt:	07/31/2001	Application #:	09479402	Filing Dt:	01/06/2000
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH METAL SILICIDE REGIONS

Patent #:	6629012	Issue Dt:	09/30/2003	Application #:	09479403	Filing Dt:	01/06/2000
Title:	WAFER-LESS QUALIFICATION OF A PROCESSING TOOL

Patent #:	6204157	Issue Dt:	03/20/2001	Application #:	09479492	Filing Dt:	01/07/2000
Title:	Method For Establishing Shallow Junction In Semiconductor Device To Minimize Junction Capacitance

Patent #:	6235607	Issue Dt:	05/22/2001	Application #:	09479493	Filing Dt:	01/07/2000
Title:	METHOD FOR ESTABLISHING COMPONENT ISOLATION REGIONS IN SOI SEMICONDUCTOR DEVICE

Patent #:	6153486	Issue Dt:	11/28/2000	Application #:	09479504	Filing Dt:	01/07/2000
Title:	Method for establishing shallow junction in semiconductor device to minimize junction capacitance

Patent #:	6399519	Issue Dt:	06/04/2002	Application #:	09479505	Filing Dt:	01/07/2000
Title:	METHOD FOR ESTABLISHING ULTRA-THIN GATE INSULATOR HAVING ANNEALED OXIDE AND OXIDIZED NITRIDE

Patent #:	6444555	Issue Dt:	09/03/2002	Application #:	09479506	Filing Dt:	01/07/2000
Publication #:	US20010049186	Pub Dt:	12/06/2001
Title:	METHOD FOR ESTABLISHING ULTRA-THIN GATE INSULATOR USING ANNEAL IN AMMONIA

Patent #:	6255175	Issue Dt:	07/03/2001	Application #:	09479552	Filing Dt:	01/07/2000
Title:	Fabrication Of A Field Effect Transistor With Minimized Parasitic Miller Capacitance

Patent #:	6251738	Issue Dt:	06/26/2001	Application #:	09480033	Filing Dt:	01/10/2000
Title:	PROCESS FOR FORMING A SILICON-GERMANIUM BASE OF A HETEROJUNCTION BIPOLAR TRANSISTOR

Patent #:	6316167	Issue Dt:	11/13/2001	Application #:	09480442	Filing Dt:	01/10/2000
Title:	TUNABLE VAPOR DEPOSITED MATERIALS AS ANTIREFLECTIVE COATINGS, HARDMASKS AND AS COMBINED ANTIREFLECTIVE COATING/HARDMASKS AND METHODS OF FABRICATION THEREOF AND APPLICATIONS THEREOF

Patent #:	6546410	Issue Dt:	04/08/2003	Application #:	09481548	Filing Dt:	01/10/2000
Title:	HIGH-SPEED HEXADECIMAL ADDING METHOD AND SYSTEM

Patent #:	6798788	Issue Dt:	09/28/2004	Application #:	09482957	Filing Dt:	01/14/2000
Title:	ARRANGEMENT DETERMINING POLICIES FOR LAYER 3 FRAME FRAGMENTS IN A NETWORK SWITCH

Patent #:	6284606	Issue Dt:	09/04/2001	Application #:	09483038	Filing Dt:	01/18/2000
Title:	Novel process to achieve uniform groove depth in a silicon substrate

Patent #:	6601167	Issue Dt:	07/29/2003	Application #:	09483318	Filing Dt:	01/14/2000
Title:	COMPUTER SYSTEM INITIALIZATION WITH BOOT PROGRAM STORED IN SEQUENTIAL ACCESS MEMORY, CONTROLLED BY A BOOT LOADER TO CONTROL AND EXECUTE THE BOOT PROGRAM

Patent #:	6351801	Issue Dt:	02/26/2002	Application #:	09483493	Filing Dt:	01/14/2000
Title:	Program Counter Update Mechanism

Patent #:	6291302	Issue Dt:	09/18/2001	Application #:	09483528	Filing Dt:	01/14/2000
Title:	Selective laser anneal process using highly reflective aluminum mask

Patent #:	6320228	Issue Dt:	11/20/2001	Application #:	09483678	Filing Dt:	01/14/2000
Title:	Multiple Active Layer Integrated Circuit And A Method Of Making Such A Circuit

Patent #:	6319819	Issue Dt:	11/20/2001	Application #:	09484439	Filing Dt:	01/18/2000
Title:	Process for Passivating Top Interface of Damascene-Type Cu Interconnect Lines

Patent #:	6315637	Issue Dt:	11/13/2001	Application #:	09484601	Filing Dt:	01/18/2000
Title:	Photoresist removal using a polishing tool

Patent #:	6405144	Issue Dt:	06/11/2002	Application #:	09484602	Filing Dt:	01/18/2000
Title:	METHOD AND APPARATUS FOR PROGRAMMED LATENCY FOR IMPROVING WAFER TO WAFER UNIFORMITY

Patent #:	6372668	Issue Dt:	04/16/2002	Application #:	09484603	Filing Dt:	01/18/2000
Publication #:	US20010044220	Pub Dt:	11/22/2001
Title:	METHOD OF FORMING SILICON OXYNITRIDE FILMS

Patent #:	6666754	Issue Dt:	12/23/2003	Application #:	09484604	Filing Dt:	01/18/2000
Title:	METHOD AND APPARATUS FOR DETERMINING CMP PAD CONDITIONER EFFECTIVENESS

Patent #:	6225667	Issue Dt:	05/01/2001	Application #:	09484634	Filing Dt:	01/18/2000
Title:	Leaky lower interface for reduction of floating body effect in SOI devices

Patent #:	6303507	Issue Dt:	10/16/2001	Application #:	09487180	Filing Dt:	01/19/2000
Title:	In-situ feedback system for localized CMP thickness control

Patent #:	6393554	Issue Dt:	05/21/2002	Application #:	09487771	Filing Dt:	01/19/2000
Title:	Method and Apparatus for Performing Vector and Scalar Multiplication and Calculating Rounded Products

Patent #:	6452250	Issue Dt:	09/17/2002	Application #:	09488289	Filing Dt:	01/20/2000
Title:	STACKED INTEGRATED CIRCUIT AND CAPACITOR STRUCTURE CONTAINING VIA STRUCTURES

Patent #:	7411998	Issue Dt:	08/12/2008	Application #:	09488351	Filing Dt:	01/20/2000
Title:	METHOD AND APPARATUS FOR USING LOW POWER TRAINING

Patent #:	6133132	Issue Dt:	10/17/2000	Application #:	09488605	Filing Dt:	01/20/2000
Title:	Method for controlling transistor spacer width

Patent #:	6492275	Issue Dt:	12/10/2002	Application #:	09488870	Filing Dt:	01/21/2000
Publication #:	US20020119647	Pub Dt:	08/29/2002
Title:	CONTROL OF TRANSISTOR PERFORMANCE THROUGH ADJUSTMENT OF SPACER OXIDE PROFILE WITH A WET ETCH

Patent #:	6284636	Issue Dt:	09/04/2001	Application #:	09489169	Filing Dt:	01/21/2000
Title:	Tungsten gate method and apparatus

Patent #:	6521977	Issue Dt:	02/18/2003	Application #:	09489277	Filing Dt:	01/21/2000
Title:	DEUTERIUM RESERVOIRS AND INGRESS PATHS

Patent #:	6313538	Issue Dt:	11/06/2001	Application #:	09489479	Filing Dt:	01/21/2000
Title:	Semiconductor Device With Partial Passivation Layer

Patent #:	6274472	Issue Dt:	08/14/2001	Application #:	09489509	Filing Dt:	01/21/2000
Title:	TUNGSTEN INTERCONNECT METHOD

Patent #:	6584575	Issue Dt:	06/24/2003	Application #:	09490307	Filing Dt:	01/24/2000
Title:	SYSTEM AND METHOD FOR INITIALIZING SOURCE-SYNCHRONOUS DATA TRANSFERS USING RATIO BITS

Patent #:	6332973	Issue Dt:	12/25/2001	Application #:	09490465	Filing Dt:	01/25/2000
Title:	CMOS CHEMICAL BATH PURIFICATION

Patent #:	6238937	Issue Dt:	05/29/2001	Application #:	09491248	Filing Dt:	01/26/2000
Title:	Determining endpoint in etching processes using principal components analysis of optical emission spectra with thresholding

Patent #:	6419846	Issue Dt:	07/16/2002	Application #:	09491506	Filing Dt:	01/26/2000
Title:	DETERMINING ENDPOINT IN ETCHING PROCESSES USING PRINCIPAL COMPONENTS ANALYSIS OF OPTICAL EMISSION SPECTRA

Patent #:	6553552	Issue Dt:	04/22/2003	Application #:	09491650	Filing Dt:	01/27/2000
Title:	METHOD OF DESIGNING AN INTEGRATED CIRCUIT MEMORY ARCHITECTURE

Patent #:	6201761	Issue Dt:	03/13/2001	Application #:	09491823	Filing Dt:	01/26/2000
Title:	Field effect transistor with controlled body bias

Patent #:	6582618	Issue Dt:	06/24/2003	Application #:	09491845	Filing Dt:	01/26/2000
Title:	METHOD OF DETERMINING ETCH ENDPOINT USING PRINCIPAL COMPONENTS ANALYSIS OF OPTICAL EMISSION SPECTRA

Patent #:	6482573	Issue Dt:	11/19/2002	Application #:	09492216	Filing Dt:	01/27/2000
Title:	EXPOSURE CORRECTION BASED ON REFLECTIVE INDEX FOR PHOTOLITHOGRAPHIC PROCESS CONTROL

Patent #:	6303486	Issue Dt:	10/16/2001	Application #:	09493320	Filing Dt:	01/28/2000
Title:	Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer and an unconstrained copper anneal

Patent #:	6355555	Issue Dt:	03/12/2002	Application #:	09493384	Filing Dt:	01/28/2000
Title:	Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer

Patent #:	6512273	Issue Dt:	01/28/2003	Application #:	09493440	Filing Dt:	01/28/2000
Title:	METHOD AND STRUCTURE FOR IMPROVING HOT CARRIER IMMUNITY FOR DEVICES WITH VERY SHALLOW JUNCTIONS

Patent #:	6306769	Issue Dt:	10/23/2001	Application #:	09494698	Filing Dt:	01/31/2000
Title:	Use of dual patterning masks for printing holes of small dimensions

Patent #:	6410458	Issue Dt:	06/25/2002	Application #:	09494755	Filing Dt:	01/31/2000
Title:	METHOD AND SYSTEM FOR ELIMINATING VOIDS IN A SEMICONDUCTOR DEVICE

Patent #:	6711450	Issue Dt:	03/23/2004	Application #:	09496205	Filing Dt:	02/02/2000
Title:	INTEGRATION OF BUSINESS RULE PARAMETERS IN PRIORITY SETTING OF WAFER PROCESSING

Patent #:	6950434	Issue Dt:	09/27/2005	Application #:	09496212	Filing Dt:	02/01/2000
Title:	ARRANGEMENT FOR SEARCHING PACKET POLICIES USING MULTI-KEY HASH SEARCHES IN A NETWORK SWITCH

Patent #:	6392403	Issue Dt:	05/21/2002	Application #:	09496531	Filing Dt:	02/02/2000
Title:	Integrated wafer stocker and sorter apparatus

Patent #:	6724928	Issue Dt:	04/20/2004	Application #:	09496532	Filing Dt:	02/02/2000
Title:	REAL-TIME PHOTOEMISSION DETECTION SYSTEM

Patent #:	6415243	Issue Dt:	07/02/2002	Application #:	09497040	Filing Dt:	02/03/2000
Title:	PERFORMANCE MONITORING AND OPTIMIZATION USING AN ADAPTIVE DIGITAL CIRCUIT

Patent #:	7192836	Issue Dt:	03/20/2007	Application #:	09497320	Filing Dt:	02/03/2000
Title:	METHOD AND SYSTEM FOR PROVIDING HALO IMPLANT TO A SEMICONDUCTOR DEVICE WITH MINIMAL IMPACT TO THE JUNCTION CAPACITANCE

Patent #:	6611912	Issue Dt:	08/26/2003	Application #:	09498156	Filing Dt:	02/04/2000
Title:	METHOD AND APPARATUS HAVING A SYSTEM BOS WRITE CONFIGURATION DATA OF A RISER CARD TO A CONTROLLER CONFIGURATION SPACE WHEN CONNECTING THE RISER CARD TO A MOTHERBOARD

Patent #:	6306710	Issue Dt:	10/23/2001	Application #:	09498231	Filing Dt:	02/03/2000
Title:	Fabrication of a gate structure having a longer length toward the top for formation of a rectangular shaped spacer

Patent #:	6287904	Issue Dt:	09/11/2001	Application #:	09499047	Filing Dt:	02/07/2000
Title:	Two step mask process to eliminate gate end cap shortening

Patent #:	6429318	Issue Dt:	08/06/2002	Application #:	09499621	Filing Dt:	02/07/2000
Title:	LAYERED ORGANIC-INORGANIC PEROVSKITES HAVING METAL-DEFICIENT INORGANIC FRAMEWORKS

Patent #:	6362116	Issue Dt:	03/26/2002	Application #:	09500727	Filing Dt:	02/09/2000
Title:	METHOD FOR CONTROLLING PHOTORESIST BAKING PROCESSES

Patent #:	6229754	Issue Dt:	05/08/2001	Application #:	09501393	Filing Dt:	02/09/2000
Title:	Write through function for a memory

Patent #:	6460002	Issue Dt:	10/01/2002	Application #:	09501494	Filing Dt:	02/09/2000
Title:	METHOD AND APPARATUS FOR DATA STACKIFICATION FOR RUN-TO-RUN CONTROL

Patent #:	6261945	Issue Dt:	07/17/2001	Application #:	09501649	Filing Dt:	02/10/2000
Title:	Crackstop and oxygen barrier for low-K dielectric integrated circuits

Patent #:	6333218	Issue Dt:	12/25/2001	Application #:	09501995	Filing Dt:	02/11/2000
Title:	Method of etching contacts with reduced oxide stress

Patent #:	6258697	Issue Dt:	07/10/2001	Application #:	09502333	Filing Dt:	02/11/2000
Title:	Method of etching contacts with reduced oxide stress

100

Patent #:	6784485	Issue Dt:	08/31/2004	Application #:	09502729	Filing Dt:	02/11/2000
Title:	DIFFUSION BARRIER LAYER AND SEMICONDUCTOR DEVICE CONTAINING SAME

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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