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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
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Patent #:	8539426	Issue Dt:	09/17/2013	Application #:	13031693	Filing Dt:	02/22/2011
Publication #:	US20120212504	Pub Dt:	08/23/2012
Title:	METHOD AND SYSTEM FOR EXTRACTING COMPACT MODELS FOR CIRCUIT SIMULATION

Patent #:	8458641	Issue Dt:	06/04/2013	Application #:	13031754	Filing Dt:	02/22/2011
Publication #:	US20110246959	Pub Dt:	10/06/2011
Title:	METHOD, SYSTEM, AND DESIGN STRUCTURE FOR MAKING VOLTAGE ENVIRONMENT CONSISTENT FOR REUSED SUB MODULES IN CHIP DESIGN

Patent #:	8301847	Issue Dt:	10/30/2012	Application #:	13032361	Filing Dt:	02/22/2011
Publication #:	US20120079213	Pub Dt:	03/29/2012
Title:	MANAGING CONCURRENT ACCESSES TO A CACHE

Patent #:	9287211	Issue Dt:	03/15/2016	Application #:	13032710	Filing Dt:	02/23/2011
Publication #:	US20110241162	Pub Dt:	10/06/2011
Title:	SEMICONDUCTOR DEVICE COMPRISING METAL-BASED EFUSES OF ENHANCED PROGRAMMING EFFICIENCY BY ENHANCING HEAT GENERATION

Patent #:	8324108	Issue Dt:	12/04/2012	Application #:	13034777	Filing Dt:	02/25/2011
Publication #:	US20120028470	Pub Dt:	02/02/2012
Title:	INCREASING ROBUSTNESS OF A DUAL STRESS LINER APPROACH IN A SEMICONDUCTOR DEVICE BY APPLYING A WET CHEMISTRY

Patent #:	8293605	Issue Dt:	10/23/2012	Application #:	13034902	Filing Dt:	02/25/2011
Publication #:	US20120220086	Pub Dt:	08/30/2012
Title:	METHODS FOR FABRICATING A CMOS INTEGRATED CIRCUIT HAVING A DUAL STRESS LAYER (DSL)

Patent #:	8374040	Issue Dt:	02/12/2013	Application #:	13034936	Filing Dt:	02/25/2011
Publication #:	US20120218814	Pub Dt:	08/30/2012
Title:	WRITE BANDWIDTH IN A MEMORY CHARACTERIZED BY A VARIABLE WRITE TIME

Patent #:	8169820	Issue Dt:	05/01/2012	Application #:	13035100	Filing Dt:	02/25/2011
Publication #:	US20110141801	Pub Dt:	06/16/2011
Title:	USE OF SYMMETRIC RESISTIVE MEMORY MATERIAL AS A DIODE TO DRIVE SYMMETRIC OR ASYMMETRIC RESISTIVE MEMORY

Patent #:	8384125	Issue Dt:	02/26/2013	Application #:	13035549	Filing Dt:	02/25/2011
Publication #:	US20110147794	Pub Dt:	06/23/2011
Title:	DESIGN STRUCTURE AND METHOD FOR A SILICON CONTROLLED RECTIFIER (SCR) STRUCTURE FOR SOI TECHNOLOGY

Patent #:	8497212	Issue Dt:	07/30/2013	Application #:	13036113	Filing Dt:	02/28/2011
Publication #:	US20120217590	Pub Dt:	08/30/2012
Title:	FILLING NARROW OPENINGS USING ION BEAM ETCH

Patent #:	8169007	Issue Dt:	05/01/2012	Application #:	13037485	Filing Dt:	03/01/2011
Publication #:	US20110147808	Pub Dt:	06/23/2011
Title:	ASYMMETRIC JUNCTION FIELD EFFECT TRANSISTOR

Patent #:	8268698	Issue Dt:	09/18/2012	Application #:	13037608	Filing Dt:	03/01/2011
Publication #:	US20110147885	Pub Dt:	06/23/2011
Title:	FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS

Patent #:	8809168	Issue Dt:	08/19/2014	Application #:	13037944	Filing Dt:	03/01/2011
Publication #:	US20120205784	Pub Dt:	08/16/2012
Title:	GROWING COMPRESSIVELY STRAINED SILICON DIRECTLY ON SILICON AT LOW TEMPERATURES

Patent #:	8298860	Issue Dt:	10/30/2012	Application #:	13038467	Filing Dt:	03/02/2011
Publication #:	US20110201151	Pub Dt:	08/18/2011
Title:	METHODS FOR FORMING A BONDED SEMICONDUCTOR SUBSTRATE INCLUDING A COOLING MECHANISM

Patent #:	9048954	Issue Dt:	06/02/2015	Application #:	13039003	Filing Dt:	03/02/2011
Publication #:	US20120224849	Pub Dt:	09/06/2012
Title:	OPTICAL INTERCONNECT USING OPTICAL TRANSMITTER PRE-DISTORTION

Patent #:	8368053	Issue Dt:	02/05/2013	Application #:	13039475	Filing Dt:	03/03/2011
Publication #:	US20120223292	Pub Dt:	09/06/2012
Title:	MULTILAYER-INTERCONNECTION FIRST INTEGRATION SCHEME FOR GRAPHENE AND CARBON NANOTUBE TRANSISTOR BASED INTEGRATION

Patent #:	9199278	Issue Dt:	12/01/2015	Application #:	13039933	Filing Dt:	03/03/2011
Publication #:	US20110210083	Pub Dt:	09/01/2011
Title:	APPARATUS AND METHOD FOR SEPARATING SOLIDS FROM A SOLIDS LADEN DRILLING FLUID

Patent #:	8383510	Issue Dt:	02/26/2013	Application #:	13040399	Filing Dt:	03/04/2011
Publication #:	US20120223437	Pub Dt:	09/06/2012
Title:	SEMICONDUCTOR DEVICE COMPRISING METALLIZATION LAYERS OF REDUCED INTERLAYER CAPACITANCE BY REDUCING THE AMOUNT OF ETCH STOP MATERIALS

Patent #:	8139389	Issue Dt:	03/20/2012	Application #:	13040429	Filing Dt:	03/04/2011
Publication #:	US20110149648	Pub Dt:	06/23/2011
Title:	PROGRAMMABLE DEVICE

Patent #:	8621328	Issue Dt:	12/31/2013	Application #:	13040482	Filing Dt:	03/04/2011
Publication #:	US20120226962	Pub Dt:	09/06/2012
Title:	WEAR-FOCUSING OF NON-VOLATILE MEMORIES FOR IMPROVED ENDURANCE

Patent #:	8560922	Issue Dt:	10/15/2013	Application #:	13040531	Filing Dt:	03/04/2011
Publication #:	US20120226963	Pub Dt:	09/06/2012
Title:	BAD BLOCK MANAGEMENT FOR FLASH MEMORY

Patent #:	8790975	Issue Dt:	07/29/2014	Application #:	13040975	Filing Dt:	03/04/2011
Publication #:	US20120223412	Pub Dt:	09/06/2012
Title:	SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR FORMED IN THE METALLIZATION SYSTEM BASED ON DUMMY METAL FEATURES

Patent #:	8558332	Issue Dt:	10/15/2013	Application #:	13041226	Filing Dt:	03/04/2011
Publication #:	US20110147866	Pub Dt:	06/23/2011
Title:	SPIN-CURRENT SWITCHED MAGNETIC MEMORY ELEMENT SUITABLE FOR CIRCUIT INTEGRATION AND METHOD OF FABRICATING THE MEMORY ELEMENT

Patent #:	8826095	Issue Dt:	09/02/2014	Application #:	13041248	Filing Dt:	03/04/2011
Publication #:	US20110161780	Pub Dt:	06/30/2011
Title:	METHOD AND SYSTEM FOR PROVIDING AN IMPROVED STORE-IN CACHE

Patent #:	8637361	Issue Dt:	01/28/2014	Application #:	13041740	Filing Dt:	03/07/2011
Publication #:	US20110201163	Pub Dt:	08/18/2011
Title:	SEMICONDUCTOR NANOSTRUCTURES, SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME

Patent #:	8362582	Issue Dt:	01/29/2013	Application #:	13041754	Filing Dt:	03/07/2011
Publication #:	US20110156133	Pub Dt:	06/30/2011
Title:	SEMICONDUCTOR NANOSTRUCTURES, SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME

Patent #:	8570820	Issue Dt:	10/29/2013	Application #:	13042881	Filing Dt:	03/08/2011
Publication #:	US20120230136	Pub Dt:	09/13/2012
Title:	SELECTABLE REPAIR PASS MASKING

Patent #:	8492237	Issue Dt:	07/23/2013	Application #:	13042902	Filing Dt:	03/08/2011
Publication #:	US20120228611	Pub Dt:	09/13/2012
Title:	METHODS OF FABRICATING A BIPOLAR JUNCTION TRANSISTOR WITH A SELF-ALIGNED EMITTER AND BASE

Patent #:	8569874	Issue Dt:	10/29/2013	Application #:	13043749	Filing Dt:	03/09/2011
Publication #:	US20120233510	Pub Dt:	09/13/2012
Title:	HIGH MEMORY DENSITY, HIGH INPUT/OUTPUT BANDWIDTH LOGIC-MEMORY STRUCTURE AND ARCHITECTURE

Patent #:	8232172	Issue Dt:	07/31/2012	Application #:	13045679	Filing Dt:	03/11/2011
Publication #:	US20110159655	Pub Dt:	06/30/2011
Title:	STRESS ENHANCED TRANSISTOR DEVICES AND METHODS OF MAKING

Patent #:	8349670	Issue Dt:	01/08/2013	Application #:	13045756	Filing Dt:	03/11/2011
Publication #:	US20110171790	Pub Dt:	07/14/2011
Title:	SELECTIVE FLOATING BODY SRAM CELL

Patent #:	8378429	Issue Dt:	02/19/2013	Application #:	13045784	Filing Dt:	03/11/2011
Publication #:	US20110204445	Pub Dt:	08/25/2011
Title:	SELECTIVE FLOATING BODY SRAM CELL

Patent #:	8217456	Issue Dt:	07/10/2012	Application #:	13046084	Filing Dt:	03/11/2011
Title:	LOW CAPACITANCE HI-K DUAL WORK FUNCTION METAL GATE BODY-CONTACTED FIELD EFFECT TRANSISTOR

Patent #:	8594609	Issue Dt:	11/26/2013	Application #:	13046377	Filing Dt:	03/11/2011
Publication #:	US20110183641	Pub Dt:	07/28/2011
Title:	DRAIN-PUMPED SUB-HARMONIC MIXER FOR MILLIMETER WAVE APPLICATIONS

Patent #:	8835261	Issue Dt:	09/16/2014	Application #:	13046902	Filing Dt:	03/14/2011
Publication #:	US20120235233	Pub Dt:	09/20/2012
Title:	FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD OF FORMING SAME

Patent #:	8592946	Issue Dt:	11/26/2013	Application #:	13047037	Filing Dt:	03/14/2011
Publication #:	US20110163359	Pub Dt:	07/07/2011
Title:	LITHOGRAPHY FOR PRINTING CONSTANT LINE WIDTH FEATURES

Patent #:	8227171	Issue Dt:	07/24/2012	Application #:	13047120	Filing Dt:	03/14/2011
Publication #:	US20110165428	Pub Dt:	07/07/2011
Title:	PHOTOSENSITIVE SELF-ASSEMBLED MONOLAYER FOR SELECTIVE PLACEMENT OF HYDROPHILIC STRUCTURES

Patent #:	9214529	Issue Dt:	12/15/2015	Application #:	13047132	Filing Dt:	03/14/2011
Publication #:	US20120235234	Pub Dt:	09/20/2012
Title:	FIN FET DEVICE WITH INDEPENDENT CONTROL GATE

Patent #:	8507992	Issue Dt:	08/13/2013	Application #:	13048170	Filing Dt:	03/15/2011
Publication #:	US20110156158	Pub Dt:	06/30/2011
Title:	HIGH-K METAL GATE CMOS

Patent #:	8492794	Issue Dt:	07/23/2013	Application #:	13048366	Filing Dt:	03/15/2011
Publication #:	US20120235143	Pub Dt:	09/20/2012
Title:	VERTICAL POLYSILICON-GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR

Patent #:	8610233	Issue Dt:	12/17/2013	Application #:	13049491	Filing Dt:	03/16/2011
Publication #:	US20120235239	Pub Dt:	09/20/2012
Title:	HYBRID MOSFET STRUCTURE HAVING DRAIN SIDE SCHOTTKY JUNCTION

Patent #:	8193099	Issue Dt:	06/05/2012	Application #:	13049933	Filing Dt:	03/17/2011
Title:	PROTECTING EXPOSED METAL GATE STRUCTURES FROM ETCHING PROCESSES IN INTEGRATED CIRCUIT MANUFACTURING

Patent #:	8300452	Issue Dt:	10/30/2012	Application #:	13050052	Filing Dt:	03/17/2011
Publication #:	US20110163365	Pub Dt:	07/07/2011
Title:	STRUCTURE AND METHOD FOR IMPROVING STORAGE LATCH SUSCEPTIBILITY TO SINGLE EVENT UPSETS

Patent #:	8513131	Issue Dt:	08/20/2013	Application #:	13050101	Filing Dt:	03/17/2011
Publication #:	US20120235247	Pub Dt:	09/20/2012
Title:	FIN FIELD EFFECT TRANSISTOR WITH VARIABLE CHANNEL THICKNESS FOR THRESHOLD VOLTAGE TUNING

Patent #:	8586971	Issue Dt:	11/19/2013	Application #:	13050519	Filing Dt:	03/17/2011
Publication #:	US20110163303	Pub Dt:	07/07/2011
Title:	POLYMERIC MATERIAL, METHOD OF FORMING THE POLYMERIC MATERIAL, AND MEHTOD OF FORMING A THIN FILM USING THE POLYMERIC MATERIAL

Patent #:	8442357	Issue Dt:	05/14/2013	Application #:	13051431	Filing Dt:	03/18/2011
Publication #:	US20120237138	Pub Dt:	09/20/2012
Title:	METHOD FOR RECONSTRUCTING TWO-DIMENSIONAL CHEMICAL MAPS FROM ELECTRON SPECTROSCOPY LINE SCANS

Patent #:	8492214	Issue Dt:	07/23/2013	Application #:	13051510	Filing Dt:	03/18/2011
Publication #:	US20120235216	Pub Dt:	09/20/2012
Title:	DAMASCENE METAL GATE AND SHIELD STRUCTURE, METHODS OF MANUFACTURE AND DESIGN STRUCTURES

Patent #:	8530886	Issue Dt:	09/10/2013	Application #:	13051707	Filing Dt:	03/18/2011
Publication #:	US20120235118	Pub Dt:	09/20/2012
Title:	NITRIDE GATE DIELECTRIC FOR GRAPHENE MOSFET

Patent #:	8614134	Issue Dt:	12/24/2013	Application #:	13052583	Filing Dt:	03/21/2011
Publication #:	US20120241864	Pub Dt:	09/27/2012
Title:	Shallow Source and Drain Architecture in an Active Region of a Semiconductor Device Having a Pronounced Surface Topography by Tilted Implantation

Patent #:	8513109	Issue Dt:	08/20/2013	Application #:	13052956	Filing Dt:	03/21/2011
Publication #:	US20110171822	Pub Dt:	07/14/2011
Title:	METHOD OF MANUFACTURING AN INTERCONNECT STRUCTURE FOR A SEMICONDUCTOR DEVICE

Patent #:	8148750	Issue Dt:	04/03/2012	Application #:	13052969	Filing Dt:	03/21/2011
Publication #:	US20110169073	Pub Dt:	07/14/2011
Title:	TRANSISTOR DEVICE HAVING ASYMMETRIC EMBEDDED STRAIN ELEMENTS AND RELATED MANUFACTURING METHOD

Patent #:	9022227	Issue Dt:	05/05/2015	Application #:	13053138	Filing Dt:	03/21/2011
Publication #:	US20120241373	Pub Dt:	09/27/2012
Title:	COMPOSITE MEMBRANES AND METHODS OF PREPARATION THEREOF

Patent #:	9105465	Issue Dt:	08/11/2015	Application #:	13053803	Filing Dt:	03/22/2011
Publication #:	US20120241916	Pub Dt:	09/27/2012
Title:	WAFER EDGE CONDITIONING FOR THINNED WAFERS

Patent #:	8943456	Issue Dt:	01/27/2015	Application #:	13069411	Filing Dt:	03/23/2011
Publication #:	US20110179392	Pub Dt:	07/21/2011
Title:	LAYOUT DETERMINING FOR WIDE WIRE ON-CHIP INTERCONNECT LINES

Patent #:	9070639	Issue Dt:	06/30/2015	Application #:	13069488	Filing Dt:	03/23/2011
Publication #:	US20120244710	Pub Dt:	09/27/2012
Title:	SHRINKAGE OF CRITICAL DIMENSIONS IN A SEMICONDUCTOR DEVICE BY SELECTIVE GROWTH OF A MASK MATERIAL

Patent #:	8476945	Issue Dt:	07/02/2013	Application #:	13069653	Filing Dt:	03/23/2011
Publication #:	US20120242383	Pub Dt:	09/27/2012
Title:	PHASE PROFILE GENERATOR

Patent #:	8293615	Issue Dt:	10/23/2012	Application #:	13070568	Filing Dt:	03/24/2011
Publication #:	US20120241902	Pub Dt:	09/27/2012
Title:	SELF-ALIGNED DUAL DEPTH ISOLATION AND METHOD OF FABRICATION

Patent #:	8227264	Issue Dt:	07/24/2012	Application #:	13071894	Filing Dt:	03/25/2011
Publication #:	US20110171756	Pub Dt:	07/14/2011
Title:	REWORKABLE ELECTRONIC DEVICE ASSEMBLY AND METHOD

Patent #:	8242578	Issue Dt:	08/14/2012	Application #:	13072023	Filing Dt:	03/25/2011
Publication #:	US20110169129	Pub Dt:	07/14/2011
Title:	ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD

Patent #:	8349731	Issue Dt:	01/08/2013	Application #:	13072502	Filing Dt:	03/25/2011
Publication #:	US20120244698	Pub Dt:	09/27/2012
Title:	METHODS FOR FORMING COPPER DIFFUSION BARRIERS FOR SEMICONDUCTOR INTERCONNECT STRUCTURES

Patent #:	8343864	Issue Dt:	01/01/2013	Application #:	13073103	Filing Dt:	03/28/2011
Publication #:	US20120248522	Pub Dt:	10/04/2012
Title:	DRAM WITH SCHOTTKY BARRIER FET AND MIM TRENCH CAPACITOR

Patent #:	8304306	Issue Dt:	11/06/2012	Application #:	13073110	Filing Dt:	03/28/2011
Publication #:	US20120248537	Pub Dt:	10/04/2012
Title:	FABRICATION OF DEVICES HAVING DIFFERENT INTERFACIAL OXIDE THICKNESS VIA LATERAL OXIDATION

Patent #:	8349674	Issue Dt:	01/08/2013	Application #:	13073151	Filing Dt:	03/28/2011
Publication #:	US20120248508	Pub Dt:	10/04/2012
Title:	FORMING BORDERLESS CONTACT FOR TRANSISTORS IN A REPLACEMENT METAL GATE PROCESS

Patent #:	8466493	Issue Dt:	06/18/2013	Application #:	13074854	Filing Dt:	03/29/2011
Publication #:	US20120248501	Pub Dt:	10/04/2012
Title:	SELF-ALIGNED III-V FIELD EFFECT TRANSISTOR (FET), INTEGRATED CIRCUIT (IC) CHIP WITH SELF-ALIGNED III-V FETS AND METHOD OF MANUFACTURE

Patent #:	8133772	Issue Dt:	03/13/2012	Application #:	13075271	Filing Dt:	03/30/2011
Publication #:	US20110177660	Pub Dt:	07/21/2011
Title:	DEEP TRENCH CAPACITOR FOR SOI CMOS DEVICES FOR SOFT ERROR IMMUNITY

Patent #:	8519454	Issue Dt:	08/27/2013	Application #:	13075443	Filing Dt:	03/30/2011
Publication #:	US20120248509	Pub Dt:	10/04/2012
Title:	STRUCTURE AND PROCESS FOR METAL FILL IN REPLACEMENT METAL GATE INTEGRATION

Patent #:	8053303	Issue Dt:	11/08/2011	Application #:	13075552	Filing Dt:	03/30/2011
Publication #:	US20110177659	Pub Dt:	07/21/2011
Title:	SOI BODY CONTACT USING E-DRAM TECHNOLOGY

Patent #:	8877552	Issue Dt:	11/04/2014	Application #:	13076192	Filing Dt:	03/30/2011
Publication #:	US20110174443	Pub Dt:	07/21/2011
Title:	METHOD AND APPARATUS FOR MANUFACTURING ELECTRONIC INTEGRATED CIRCUIT CHIP

Patent #:	8415763	Issue Dt:	04/09/2013	Application #:	13076781	Filing Dt:	03/31/2011
Publication #:	US20120248573	Pub Dt:	10/04/2012
Title:	TUNABLE SEMICONDUCTOR DEVICE

Patent #:	8741765	Issue Dt:	06/03/2014	Application #:	13076881	Filing Dt:	03/31/2011
Publication #:	US20120252203	Pub Dt:	10/04/2012
Title:	CONTROLLED ELECTROPLATED SOLDER BUMPS

Patent #:	8604559	Issue Dt:	12/10/2013	Application #:	13077216	Filing Dt:	03/31/2011
Publication #:	US20110180777	Pub Dt:	07/28/2011
Title:	METHOD OF PLACING A SEMICONDUCTING NANOSTRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SEMICONDUCTING NANOSTRUCTURE

Patent #:	9341828	Issue Dt:	05/17/2016	Application #:	13077765	Filing Dt:	03/31/2011
Publication #:	US20120251045	Pub Dt:	10/04/2012
Title:	MULTI-CORE FIBER OPTICAL COUPLING ELEMENTS

Patent #:	8492880	Issue Dt:	07/23/2013	Application #:	13078305	Filing Dt:	04/01/2011
Publication #:	US20120248617	Pub Dt:	10/04/2012
Title:	MULTILAYERED LOW K CAP WITH CONFORMAL GAP FILL AND UV STABLE COMPRESSIVE STRESS PROPERTIES

Patent #:	8623742	Issue Dt:	01/07/2014	Application #:	13079341	Filing Dt:	04/04/2011
Publication #:	US20110269293	Pub Dt:	11/03/2011
Title:	Reduced STI Loss for Superior Surface Planarity of Embedded Stressors in Densely Packed Semiconductor Devices

Patent #:	8883586	Issue Dt:	11/11/2014	Application #:	13079492	Filing Dt:	04/04/2011
Publication #:	US20120248551	Pub Dt:	10/04/2012
Title:	MOL INSITU PT REWORK SEQUENCE

Patent #:	8324106	Issue Dt:	12/04/2012	Application #:	13079647	Filing Dt:	04/04/2011
Publication #:	US20120252199	Pub Dt:	10/04/2012
Title:	METHODS FOR FABRICATING A PHOTOLITHOGRAPHIC MASK AND FOR FABRICATING A SEMICONDUCTOR INTEGRATED CIRCUIT USING SUCH A MASK

Patent #:	8635483	Issue Dt:	01/21/2014	Application #:	13079842	Filing Dt:	04/05/2011
Publication #:	US20120260117	Pub Dt:	10/11/2012
Title:	Dynamically Tune Power Proxy Architectures

Patent #:	8367494	Issue Dt:	02/05/2013	Application #:	13080019	Filing Dt:	04/05/2011
Publication #:	US20120256267	Pub Dt:	10/11/2012
Title:	ELECTRICAL FUSE FORMED BY REPLACEMENT METAL GATE PROCESS

Patent #:	8239818	Issue Dt:	08/07/2012	Application #:	13080055	Filing Dt:	04/05/2011
Title:	DATA STRUCTURE FOR DESCRIBING MBIST ARCHITECTURE

Patent #:	8481389	Issue Dt:	07/09/2013	Application #:	13080084	Filing Dt:	04/05/2011
Publication #:	US20120256278	Pub Dt:	10/11/2012
Title:	Method of Removing High-K Dielectric Layer on Sidewalls of Gate Structure

Patent #:	8383505	Issue Dt:	02/26/2013	Application #:	13080105	Filing Dt:	04/05/2011
Publication #:	US20120256313	Pub Dt:	10/11/2012
Title:	SOLDER BALL CONTACT SUSCEPTIBLE TO LOWER STRESS

Patent #:	8298912	Issue Dt:	10/30/2012	Application #:	13080326	Filing Dt:	04/05/2011
Publication #:	US20110183491	Pub Dt:	07/28/2011
Title:	SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING SAME

Patent #:	8853790	Issue Dt:	10/07/2014	Application #:	13080390	Filing Dt:	04/05/2011
Publication #:	US20120256242	Pub Dt:	10/11/2012
Title:	SEMICONDUCTOR NANOWIRE STRUCTURE REUSING SUSPENSION PADS

Patent #:	8234606	Issue Dt:	07/31/2012	Application #:	13080716	Filing Dt:	04/06/2011
Publication #:	US20110185330	Pub Dt:	07/28/2011
Title:	METAL WIRING STRUCTURE FOR INTEGRATION WITH THROUGH SUBSTRATE VIAS

Patent #:	8683264	Issue Dt:	03/25/2014	Application #:	13080773	Filing Dt:	04/06/2011
Publication #:	US20110252279	Pub Dt:	10/13/2011
Title:	PROCESSING EXECUTION REQUESTS WITHIN DIFFERENT COMPUTING ENVIRONMENTS

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Title:	Stabilized Metal Silicides in Silicon-Germanium Regions of Transistor Elements

100

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Title:	BONDING CONTROLLER GUIDED ASSESSMENT AND OPTIMIZATIONFOR CHIP-TO-CHIP STACKING

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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