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Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 14520
Page 84 of 146
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1
Patent #:
8596879
Issue Dt:
12/03/2013
Application #:
13277767
Filing Dt:
10/20/2011
Publication #:
US20130044979
Pub Dt:
02/21/2013
Title:
METHOD TO REORDER (SHUFFLE) OPTICAL CABLE WAVEGUIDE LAYERS
2
Patent #:
8420459
Issue Dt:
04/16/2013
Application #:
13277956
Filing Dt:
10/20/2011
Publication #:
US20130102130
Pub Dt:
04/25/2013
Title:
BULK FIN-FIELD EFFECT TRANSISTORS WITH WELL DEFINED ISOLATION
3
Patent #:
8334177
Issue Dt:
12/18/2012
Application #:
13278010
Filing Dt:
10/20/2011
Publication #:
US20120040517
Pub Dt:
02/16/2012
Title:
METHODS FOR FORMING ISOLATED FIN STRUCTURES ON BULK SEMICONDUCTOR MATERIAL
4
Patent #:
8557649
Issue Dt:
10/15/2013
Application #:
13278301
Filing Dt:
10/21/2011
Publication #:
US20130102125
Pub Dt:
04/25/2013
Title:
METHOD FOR CONTROLLING STRUCTURE HEIGHT
5
Patent #:
8629010
Issue Dt:
01/14/2014
Application #:
13278552
Filing Dt:
10/21/2011
Publication #:
US20130099204
Pub Dt:
04/25/2013
Title:
CARBON NANOTUBE TRANSISTOR EMPLOYING EMBEDDED ELECTRODES
6
Patent #:
9147658
Issue Dt:
09/29/2015
Application #:
13279687
Filing Dt:
10/24/2011
Publication #:
US20130100590
Pub Dt:
04/25/2013
Title:
STACKED POWER SUPPLIES FOR INTEGRATED CIRCUIT DEVICES AND METHODS OF MAKING SAME
7
Patent #:
8543964
Issue Dt:
09/24/2013
Application #:
13280146
Filing Dt:
10/24/2011
Publication #:
US20120110541
Pub Dt:
05/03/2012
Title:
CONSTRAINT OPTIMIZATION OF SUB-NET LEVEL ROUTING IN ASIC DESIGN
8
Patent #:
9533147
Issue Dt:
01/03/2017
Application #:
13280178
Filing Dt:
10/24/2011
Publication #:
US20120046711
Pub Dt:
02/23/2012
Title:
METHOD, SYSTEM AND APPARATUS FOR AUTOMATED TERMINATION OF A THERAPY FOR AN EPILEPTIC EVENT UPON A DETERMINATION OF EFFECTS OF A THERAPY
9
Patent #:
8779838
Issue Dt:
07/15/2014
Application #:
13280666
Filing Dt:
10/25/2011
Publication #:
US20130099853
Pub Dt:
04/25/2013
Title:
METHODOLOGY AND APPARATUS FOR TUNING DRIVING CURRENT OF SEMICONDUCTOR TRANSISTORS
10
Patent #:
8748285
Issue Dt:
06/10/2014
Application #:
13280681
Filing Dt:
11/28/2011
Publication #:
US20130134518
Pub Dt:
05/30/2013
Title:
NOBLE GAS IMPLANTATION REGION IN TOP SILICON LAYER OF SEMICONDUCTOR-ON-INSULATOR SUBSTRATE
11
Patent #:
8490037
Issue Dt:
07/16/2013
Application #:
13280853
Filing Dt:
10/25/2011
Publication #:
US20120110526
Pub Dt:
05/03/2012
Title:
METHOD AND APPARATUS FOR TRACKING UNCERTAIN SIGNALS
12
Patent #:
8580672
Issue Dt:
11/12/2013
Application #:
13280881
Filing Dt:
10/25/2011
Publication #:
US20130099372
Pub Dt:
04/25/2013
Title:
METHODS OF FORMING BUMP STRUCTURES THAT INCLUDE A PROTECTION LAYER
13
Patent #:
8673770
Issue Dt:
03/18/2014
Application #:
13281105
Filing Dt:
10/25/2011
Publication #:
US20130102147
Pub Dt:
04/25/2013
Title:
METHODS OF FORMING CONDUCTIVE STRUCTURES IN DIELECTRIC LAYERS ON AN INTEGRATED CIRCUIT DEVICE
14
Patent #:
8575013
Issue Dt:
11/05/2013
Application #:
13281236
Filing Dt:
10/25/2011
Publication #:
US20130099295
Pub Dt:
04/25/2013
Title:
REPLACEMENT GATE FABRICATION METHODS
15
Patent #:
8791017
Issue Dt:
07/29/2014
Application #:
13281552
Filing Dt:
10/26/2011
Publication #:
US20130109174
Pub Dt:
05/02/2013
Title:
METHODS OF FORMING CONDUCTIVE STRUCTURES USING A SPACER EROSION TECHNIQUE
16
Patent #:
8765613
Issue Dt:
07/01/2014
Application #:
13281688
Filing Dt:
10/26/2011
Publication #:
US20130105916
Pub Dt:
05/02/2013
Title:
HIGH SELECTIVITY NITRIDE ETCH PROCESS
17
Patent #:
8652969
Issue Dt:
02/18/2014
Application #:
13281715
Filing Dt:
10/26/2011
Publication #:
US20130105947
Pub Dt:
05/02/2013
Title:
HIGH ASPECT RATIO AND REDUCED UNDERCUT TRENCH ETCH PROCESS FOR A SEMICONDUCTOR SUBSTRATE
18
Patent #:
9190316
Issue Dt:
11/17/2015
Application #:
13281732
Filing Dt:
10/26/2011
Publication #:
US20130105996
Pub Dt:
05/02/2013
Title:
LOW ENERGY ETCH PROCESS FOR NITROGEN-CONTAINING DIELECTRIC LAYER
19
Patent #:
8916054
Issue Dt:
12/23/2014
Application #:
13281749
Filing Dt:
10/26/2011
Publication #:
US20130108833
Pub Dt:
05/02/2013
Title:
HIGH FIDELITY PATTERNING EMPLOYING A FLUOROHYDROCARBON-CONTAINING POLYMER
20
Patent #:
8853045
Issue Dt:
10/07/2014
Application #:
13282224
Filing Dt:
10/26/2011
Publication #:
US20120038026
Pub Dt:
02/16/2012
Title:
LOW CAPACITANCE PRECISION RESISTOR
21
Patent #:
9048136
Issue Dt:
06/02/2015
Application #:
13282261
Filing Dt:
10/26/2011
Publication #:
US20130107608
Pub Dt:
05/02/2013
Title:
SRAM CELL WITH INDIVIDUAL ELECTRICAL DEVICE THRESHOLD CONTROL
22
Patent #:
9029956
Issue Dt:
05/12/2015
Application #:
13282299
Filing Dt:
10/26/2011
Publication #:
US20130107610
Pub Dt:
05/02/2013
Title:
SRAM CELL WITH INDIVIDUAL ELECTRICAL DEVICE THRESHOLD CONTROL
23
Patent #:
8395217
Issue Dt:
03/12/2013
Application #:
13283031
Filing Dt:
10/27/2011
Title:
ISOLATION IN CMOSFET DEVICES UTILIZING BURIED AIR BAGS
24
Patent #:
9057764
Issue Dt:
06/16/2015
Application #:
13283305
Filing Dt:
10/27/2011
Publication #:
US20130110487
Pub Dt:
05/02/2013
Title:
DETECTION OF UNCHECKED SIGNALS IN CIRCUIT DESIGN VERIFICATION
25
Patent #:
8575698
Issue Dt:
11/05/2013
Application #:
13283308
Filing Dt:
10/27/2011
Publication #:
US20130105818
Pub Dt:
05/02/2013
Title:
MOSFET WITH THIN SEMICONDUCTOR CHANNEL AND EMBEDDED STRESSOR WITH ENHANCED JUNCTION ISOLATION
26
Patent #:
8284017
Issue Dt:
10/09/2012
Application #:
13283328
Filing Dt:
10/27/2011
Publication #:
US20120042298
Pub Dt:
02/16/2012
Title:
STRUCTURE HAVING SUBSTANTIALLY PARALLEL RESISTOR MATERIAL LENGTHS
27
Patent #:
8679921
Issue Dt:
03/25/2014
Application #:
13283370
Filing Dt:
10/27/2011
Publication #:
US20130105885
Pub Dt:
05/02/2013
Title:
CANYON GATE TRANSISTOR AND METHODS FOR ITS FABRICATION
28
Patent #:
8681254
Issue Dt:
03/25/2014
Application #:
13283819
Filing Dt:
10/28/2011
Publication #:
US20120038811
Pub Dt:
02/16/2012
Title:
METHODS FOR ENHANCING QUALITY OF PIXEL SENSOR IMAGE FRAMES FOR GLOBAL SHUTTER IMAGING
29
Patent #:
8415969
Issue Dt:
04/09/2013
Application #:
13284239
Filing Dt:
10/28/2011
Publication #:
US20130106461
Pub Dt:
05/02/2013
Title:
IMPLEMENTING SCREENING FOR SINGLE FET COMPARE OF PHYSICALLY UNCLONABLE FUNCTION (PUF)
30
Patent #:
8466722
Issue Dt:
06/18/2013
Application #:
13284265
Filing Dt:
10/28/2011
Publication #:
US20130106474
Pub Dt:
05/02/2013
Title:
STARTUP AND PROTECTION CIRCUITRY FOR THIN OXIDE OUTPUT STAGE
31
Patent #:
8742503
Issue Dt:
06/03/2014
Application #:
13285162
Filing Dt:
10/31/2011
Publication #:
US20130105898
Pub Dt:
05/02/2013
Title:
Recessed Single Crystalline Source and Drain For Semiconductor-On-Insulator Devices
32
Patent #:
8298895
Issue Dt:
10/30/2012
Application #:
13285282
Filing Dt:
10/31/2011
Title:
SELECTIVE THRESHOLD VOLTAGE IMPLANTS FOR LONG CHANNEL DEVICES
33
Patent #:
8999107
Issue Dt:
04/07/2015
Application #:
13285408
Filing Dt:
10/31/2011
Publication #:
US20120111496
Pub Dt:
05/10/2012
Title:
LASER ASHING OF POLYIMIDE FOR SEMICONDUCTOR MANUFACTURING
34
Patent #:
8778737
Issue Dt:
07/15/2014
Application #:
13285443
Filing Dt:
10/31/2011
Publication #:
US20130105981
Pub Dt:
05/02/2013
Title:
FLATTENED SUBSTRATE SURFACE FOR SUBSTRATE BONDING
35
Patent #:
8377773
Issue Dt:
02/19/2013
Application #:
13285600
Filing Dt:
10/31/2011
Title:
TRANSISTORS HAVING A CHANNEL SEMICONDUCTOR ALLOY FORMED IN AN EARLY PROCESS STAGE BASED ON A HARD MASK
36
Patent #:
8420519
Issue Dt:
04/16/2013
Application #:
13286292
Filing Dt:
11/01/2011
Publication #:
US20130109166
Pub Dt:
05/02/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH CONTROLLED P-CHANNEL THRESHOLD VOLTAGE
37
Patent #:
8569121
Issue Dt:
10/29/2013
Application #:
13286394
Filing Dt:
11/01/2011
Publication #:
US20130105765
Pub Dt:
05/02/2013
Title:
GRAPHENE AND NANOTUBE/NANOWIRE TRANSISTOR WITH A SELF-ALIGNED GATE STRUCTURE ON TRANSPARENT SUBSTRATES AND METHOD OF MAKING SAME
38
Patent #:
8598641
Issue Dt:
12/03/2013
Application #:
13287170
Filing Dt:
11/02/2011
Publication #:
US20120043597
Pub Dt:
02/23/2012
Title:
SEA-OF-FINS STRUCTURE ON A SEMICONDUCTOR SUBSTRATE AND METHOD OF FABRICATION
39
Patent #:
8735303
Issue Dt:
05/27/2014
Application #:
13287403
Filing Dt:
11/02/2011
Publication #:
US20130105900
Pub Dt:
05/02/2013
Title:
METHODS OF FORMING PFET DEVICES WITH DIFFERENT STRUCTURES AND PERFORMANCE CHARACTERISTICS
40
Patent #:
8796080
Issue Dt:
08/05/2014
Application #:
13287466
Filing Dt:
11/02/2011
Publication #:
US20130105917
Pub Dt:
05/02/2013
Title:
METHODS OF EPITAXIALLY FORMING MATERIALS ON TRANSISTOR DEVICES
41
Patent #:
8796058
Issue Dt:
08/05/2014
Application #:
13287575
Filing Dt:
11/02/2011
Publication #:
US20130105920
Pub Dt:
05/02/2013
Title:
SEMICONDUCTOR STRUCTURE
42
Patent #:
8421495
Issue Dt:
04/16/2013
Application #:
13288269
Filing Dt:
11/03/2011
Publication #:
US20130113514
Pub Dt:
05/09/2013
Title:
SPEED BINNING FOR DYNAMIC AND ADAPTIVE POWER CONTROL
43
Patent #:
8818785
Issue Dt:
08/26/2014
Application #:
13288541
Filing Dt:
11/03/2011
Publication #:
US20130117001
Pub Dt:
05/09/2013
Title:
Method and Apparatus for Simulating Gate Capacitance of a Tucked Transistor Device
44
Patent #:
8431436
Issue Dt:
04/30/2013
Application #:
13288645
Filing Dt:
11/03/2011
Publication #:
US20130113106
Pub Dt:
05/09/2013
Title:
THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT WITH ENHANCED COPPER-TO-COPPER BONDING
45
Patent #:
8440490
Issue Dt:
05/14/2013
Application #:
13288686
Filing Dt:
11/03/2011
Publication #:
US20120122261
Pub Dt:
05/17/2012
Title:
CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE
46
Patent #:
8900954
Issue Dt:
12/02/2014
Application #:
13289051
Filing Dt:
11/04/2011
Publication #:
US20130113050
Pub Dt:
05/09/2013
Title:
BLANKET SHORT CHANNEL ROLL-UP IMPLANT WITH NON-ANGLED LONG CHANNEL COMPENSATING IMPLANT THROUGH PATTERNED OPENING
47
Patent #:
8381161
Issue Dt:
02/19/2013
Application #:
13289140
Filing Dt:
11/04/2011
Title:
METHOD FOR PROVIDING A SECURE "GRAY BOX" VIEW PROPRIETARY IP
48
Patent #:
8288826
Issue Dt:
10/16/2012
Application #:
13290634
Filing Dt:
11/07/2011
Publication #:
US20120049317
Pub Dt:
03/01/2012
Title:
SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURES INCLUDING GRADIENT NITRIDED BURIED OXIDE (BOX)
49
Patent #:
8772927
Issue Dt:
07/08/2014
Application #:
13290824
Filing Dt:
11/07/2011
Publication #:
US20120049341
Pub Dt:
03/01/2012
Title:
SEMICONDUCTOR PACKAGE STRUCTURES HAVING LIQUID COOLER INTEGRATED WITH FIRST LEVEL CHIP PACKAGE MODULES
50
Patent #:
8453078
Issue Dt:
05/28/2013
Application #:
13292585
Filing Dt:
11/09/2011
Publication #:
US20120060135
Pub Dt:
03/08/2012
Title:
INTEGRATED CIRCUIT TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS
51
Patent #:
9006827
Issue Dt:
04/14/2015
Application #:
13292629
Filing Dt:
11/09/2011
Publication #:
US20130113043
Pub Dt:
05/09/2013
Title:
RADIATION HARDENED MEMORY CELL AND DESIGN STRUCTURES
52
Patent #:
9054671
Issue Dt:
06/09/2015
Application #:
13292729
Filing Dt:
11/09/2011
Publication #:
US20130113577
Pub Dt:
05/09/2013
Title:
TUNABLE FILTER STRUCTURES AND DESIGN STRUCTURES
53
Patent #:
8895384
Issue Dt:
11/25/2014
Application #:
13293210
Filing Dt:
11/10/2011
Publication #:
US20130119473
Pub Dt:
05/16/2013
Title:
GATE STRUCTURES AND METHODS OF MANUFACTURE
54
Patent #:
8932796
Issue Dt:
01/13/2015
Application #:
13293672
Filing Dt:
11/10/2011
Publication #:
US20130122421
Pub Dt:
05/16/2013
Title:
HYBRID PHOTORESIST COMPOSITION AND PATTERN FORMING METHOD USING THEREOF
55
Patent #:
8543966
Issue Dt:
09/24/2013
Application #:
13294210
Filing Dt:
11/11/2011
Publication #:
US20130125073
Pub Dt:
05/16/2013
Title:
TEST PATH SELECTION AND TEST PROGRAM GENERATION FOR PERFORMANCE TESTING INTEGRATED CIRCUIT CHIPS
56
Patent #:
8490040
Issue Dt:
07/16/2013
Application #:
13294220
Filing Dt:
11/11/2011
Publication #:
US20130125076
Pub Dt:
05/16/2013
Title:
DISPOSITION OF INTEGRATED CIRCUITS USING PERFORMANCE SORT RING OSCILLATOR AND PERFORMANCE PATH TESTING
57
Patent #:
9105751
Issue Dt:
08/11/2015
Application #:
13294603
Filing Dt:
11/11/2011
Publication #:
US20130122627
Pub Dt:
05/16/2013
Title:
INTEGRATED SEMICONDUCTOR DEVICES WITH SINGLE CRYSTALLINE BEAM, METHODS OF MANUFACTURE AND DESIGN STRUCTURE
58
Patent #:
8546240
Issue Dt:
10/01/2013
Application #:
13294610
Filing Dt:
11/11/2011
Publication #:
US20130119490
Pub Dt:
05/16/2013
Title:
METHODS OF MANUFACTURING INTEGRATED SEMICONDUCTOR DEVICES WITH SINGLE CRYSTALLINE BEAM
59
Patent #:
8629036
Issue Dt:
01/14/2014
Application #:
13294615
Filing Dt:
11/11/2011
Publication #:
US20130119491
Pub Dt:
05/16/2013
Title:
INTEGRATED SEMICONDUCTOR DEVICES WITH AMORPHOUS SILICON BEAM, METHODS OF MANUFACTURE AND DESIGN STRUCTURE
60
Patent #:
8916446
Issue Dt:
12/23/2014
Application #:
13294671
Filing Dt:
11/11/2011
Publication #:
US20130119508
Pub Dt:
05/16/2013
Title:
BIPOLAR JUNCTION TRANSISTOR WITH MULTIPLE EMITTER FINGERS
61
Patent #:
8921194
Issue Dt:
12/30/2014
Application #:
13294697
Filing Dt:
11/11/2011
Publication #:
US20130119516
Pub Dt:
05/16/2013
Title:
PNP BIPOLAR JUNCTION TRANSISTOR FABRICATION USING SELECTIVE EPITAXY
62
Patent #:
8927357
Issue Dt:
01/06/2015
Application #:
13294731
Filing Dt:
11/11/2011
Publication #:
US20130119442
Pub Dt:
05/16/2013
Title:
JUNCTION FIELD-EFFECT TRANSISTOR WITH RAISED SOURCE AND DRAIN REGIONS FORMED BY SELECTIVE EPITAXY
63
Patent #:
8871600
Issue Dt:
10/28/2014
Application #:
13294760
Filing Dt:
11/11/2011
Publication #:
US20130119505
Pub Dt:
05/16/2013
Title:
SCHOTTKY BARRIER DIODES WITH A GUARD RING FORMED BY SELECTIVE EPITAXY
64
Patent #:
8493117
Issue Dt:
07/23/2013
Application #:
13295351
Filing Dt:
11/14/2011
Publication #:
US20130120041
Pub Dt:
05/16/2013
Title:
LEAKAGE TOLERANT DELAY LOCKED LOOP CIRCUIT DEVICE
65
Patent #:
8686478
Issue Dt:
04/01/2014
Application #:
13295392
Filing Dt:
11/14/2011
Publication #:
US20120058611
Pub Dt:
03/08/2012
Title:
METHODS OF FORMING AND PROGRAMMING AN ELECTRONICALLY PROGRAMMABLE RESISTOR
66
Patent #:
9064074
Issue Dt:
06/23/2015
Application #:
13295489
Filing Dt:
11/14/2011
Publication #:
US20130124182
Pub Dt:
05/16/2013
Title:
RETRIEVING ODD NET TOPOLOGY IN HIERARCHICAL CIRCUIT DESIGNS
67
Patent #:
8580133
Issue Dt:
11/12/2013
Application #:
13295497
Filing Dt:
11/14/2011
Publication #:
US20130122716
Pub Dt:
05/16/2013
Title:
Methods of Controlling the Etching of Silicon Nitride Relative to Silicon Dioxide
68
Patent #:
8513117
Issue Dt:
08/20/2013
Application #:
13296444
Filing Dt:
11/15/2011
Publication #:
US20130122671
Pub Dt:
05/16/2013
Title:
PROCESS TO REMOVE NI AND PT RESIDUES FOR NIPTSI APPLICATIONS
69
Patent #:
8546230
Issue Dt:
10/01/2013
Application #:
13296496
Filing Dt:
11/15/2011
Publication #:
US20130119434
Pub Dt:
05/16/2013
Title:
BIPOLAR TRANSISTOR WITH A COLLECTOR HAVING A PROTECTED OUTER EDGE PORTION FOR REDUCED BASED-COLLECTOR JUNCTION CAPACITANCE AND A METHOD OF FORMING THE TRANSISTOR
70
Patent #:
8769470
Issue Dt:
07/01/2014
Application #:
13296555
Filing Dt:
11/15/2011
Publication #:
US20120137263
Pub Dt:
05/31/2012
Title:
TIMING CLOSURE IN CHIP DESIGN
71
Patent #:
8427896
Issue Dt:
04/23/2013
Application #:
13296724
Filing Dt:
11/15/2011
Publication #:
US20130121065
Pub Dt:
05/16/2013
Title:
DYNAMIC WORDLINE ASSIST SCHEME TO IMPROVE PERFORMANCE TRADEOFF IN SRAM
72
Patent #:
8432035
Issue Dt:
04/30/2013
Application #:
13297860
Filing Dt:
11/16/2011
Publication #:
US20120061839
Pub Dt:
03/15/2012
Title:
METAL CAP LAYER WITH ENHANCED ETCH RESISTIVITY FOR COPPER-BASED METAL REGIONS IN SEMICONDUCTOR DEVICES
73
Patent #:
8508043
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Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES INC.
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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