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11/12/2013
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06/06/2013
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05/13/2014
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06/06/2013
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10/15/2013
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06/06/2013
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05/27/2014
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06/06/2013
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05/27/2014
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06/06/2013
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12/07/2011
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06/13/2013
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05/14/2013
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12/07/2011
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06/13/2013
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06/13/2013
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07/23/2013
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06/13/2013
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12/17/2013
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06/13/2013
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12/17/2013
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12/09/2011
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06/13/2013
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07/16/2013
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06/13/2013
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06/25/2013
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12/09/2011
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06/13/2013
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11/05/2013
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12/09/2011
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06/13/2013
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08/05/2014
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12/09/2011
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06/13/2013
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08/19/2014
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12/09/2011
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06/13/2013
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01/07/2014
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12/12/2011
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06/13/2013
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06/10/2014
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12/12/2011
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06/13/2013
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04/29/2014
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12/12/2011
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06/13/2013
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09/17/2013
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12/12/2011
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06/13/2013
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10/30/2012
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12/12/2011
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04/05/2012
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12/12/2011
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06/13/2013
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12/16/2014
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12/12/2011
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06/13/2013
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09/03/2013
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12/12/2011
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06/13/2013
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10/21/2014
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04/19/2012
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09/11/2012
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04/05/2012
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11/12/2013
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06/13/2013
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05/31/2016
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06/13/2013
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12/14/2011
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06/21/2012
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04/05/2012
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08/12/2014
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12/15/2011
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04/05/2012
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05/27/2014
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12/15/2011
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06/20/2013
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05/02/2013
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12/17/2013
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12/15/2011
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06/20/2013
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05/19/2015
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12/15/2011
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04/12/2012
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12/17/2013
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06/20/2013
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06/20/2013
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05/13/2014
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12/16/2011
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06/20/2013
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HYBRID CMOS NANOWIRE MESH DEVICE AND FINFET DEVICE
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06/20/2013
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10/22/2013
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12/16/2011
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06/20/2013
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10/07/2014
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12/16/2011
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06/20/2013
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12/16/2011
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06/20/2013
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12/10/2013
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06/20/2013
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03/19/2013
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06/21/2012
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07/01/2014
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12/20/2011
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06/20/2013
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09/03/2013
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12/20/2011
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06/20/2013
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06/27/2013
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12/17/2013
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12/21/2011
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06/27/2013
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11/26/2013
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12/21/2011
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06/27/2013
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08/20/2013
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12/21/2011
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05/03/2012
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12/09/2014
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12/22/2011
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06/27/2013
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12/24/2013
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12/22/2011
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06/27/2013
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ENERGY-EFFICIENT ROW DRIVER FOR PROGRAMMING PHASE CHANGE MEMORY
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10/07/2014
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12/22/2011
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06/27/2013
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12/10/2013
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12/22/2011
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06/27/2013
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07/21/2015
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12/23/2011
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06/27/2013
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01/28/2014
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12/27/2011
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06/27/2013
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05/27/2014
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07/04/2013
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Title:
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High-K Metal Gate Electrode Structure Formed by Removing a Work Function on Sidewalls in Replacement Gate Technology
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13342228
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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METHOD AND SYSTEM FOR GENERATING A PLACEMENT LAYOUT OF A VLSI CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13342409
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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05/03/2012
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Title:
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HIGH DENSITY DATA STORAGE MEDIUM, METHOD AND DEVICE
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Patent #:
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Issue Dt:
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08/12/2014
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Application #:
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13342435
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) DEVICE HAVING GATE STRUCTURES CONNECTED BY A METAL GATE CONDUCTOR
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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13342453
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Filing Dt:
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01/03/2012
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Title:
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LEAKAGE TOLERANT PHASE LOCKED LOOP CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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07/28/2015
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Application #:
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13342674
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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METHOD AND STRUCTURE TO REDUCE FET THRESHOLD VOLTAGE SHIFT DUE TO OXYGEN DIFFUSION
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13342689
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) CAPACITIVE OHMIC SWITCH AND DESIGN STRUCTURES
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Patent #:
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Issue Dt:
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06/03/2014
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Application #:
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13342697
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE AND METHOD OF FORMING
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Patent #:
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Issue Dt:
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05/20/2014
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Application #:
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13342797
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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POWER SIGE HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) WITH IMPROVED DRIVE CURRENT BY STRAIN COMPENSATION
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Patent #:
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Issue Dt:
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10/03/2017
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Application #:
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13343080
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Filing Dt:
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01/04/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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LCR TEST CIRCUIT STRUCTURE FOR DETECTING METAL GATE DEFECT CONDITIONS
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13343190
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Filing Dt:
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01/04/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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Titanium-Nitride Removal
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Patent #:
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Issue Dt:
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07/02/2013
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Application #:
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13343472
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Filing Dt:
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01/04/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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CMOS HAVING A SIC/SIGE ALLOY STACK
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Patent #:
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Issue Dt:
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06/17/2014
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Application #:
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13343513
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Filing Dt:
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01/27/2012
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Publication #:
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Pub Dt:
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08/01/2013
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Title:
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METHODS FOR FABRICATING MOS DEVICES WITH STRESS MEMORIZATION
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Patent #:
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Issue Dt:
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02/03/2015
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Application #:
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13343688
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Filing Dt:
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01/04/2012
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Publication #:
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Pub Dt:
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07/04/2013
| | | | |
Title:
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SOI LATERAL BIPOLAR TRANSISTOR HAVING MULTI-SIDED BASE CONTACT AND METHODS FOR MAKING SAME
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Patent #:
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Issue Dt:
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02/11/2014
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Application #:
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13343799
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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07/11/2013
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Title:
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NANOWIRE FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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05/21/2013
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Application #:
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13343819
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Filing Dt:
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01/05/2012
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Title:
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INTEGRATED CIRCUIT HAVING BACK GATING, IMPROVED ISOLATION AND REDUCED WELL RESISTANCE AND METHOD TO FABRICATE SAME
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Patent #:
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Issue Dt:
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02/12/2013
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Application #:
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13343850
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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05/03/2012
| | | | |
Title:
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WORK FUNCTION ENGINEERING FOR EDRAM MOSFETS
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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13343938
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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IMPLEMENTING ENHANCED HARDWARE ASSISTED DRAM REPAIR USING A DATA REGISTER FOR DRAM REPAIR SELECTIVELY PROVIDED IN A DRAM MODULE
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Patent #:
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Issue Dt:
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04/09/2013
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Application #:
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13344006
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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05/10/2012
| | | | |
Title:
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SOI CMOS CIRCUITS WITH SUBSTRATE BIAS
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Patent #:
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Issue Dt:
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07/15/2014
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Application #:
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13344009
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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Interlevel Dielectric Stack for Interconnect Structures
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Patent #:
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Issue Dt:
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08/04/2015
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Application #:
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13344313
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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07/11/2013
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Title:
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PROVIDING A FAULT TOLERANT SYSTEM IN A LOOSELY-COUPLED CLUSTER ENVIRONMENT USING APPLICATION CHECKPOINTS AND LOGS
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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13344352
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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07/11/2013
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Title:
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Compressive (PFET) and Tensile (NFET) Channel Strain in Nanowire FETs Fabricated with a Replacement Gate Process
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Patent #:
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Issue Dt:
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05/17/2016
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Application #:
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13344517
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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NANOWIRE FLOATING GATE TRANSISTOR
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Patent #:
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Issue Dt:
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11/25/2014
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Application #:
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13344806
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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INTEGRATED CIRCUIT HAVING RAISED SOURCE DRAINS DEVICES WITH REDUCED SILICIDE CONTACT RESISTANCE AND METHODS TO FABRICATE SAME
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Patent #:
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Issue Dt:
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02/18/2014
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Application #:
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13344885
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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INTEGRATED CIRCUIT INCLUDING DRAM AND SRAM/LOGIC
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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13344955
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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05/03/2012
| | | | |
Title:
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FIELD EFFECT TRANSISTOR HAVING AN ASYMMETRIC GATE ELECTRODE
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Patent #:
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Issue Dt:
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07/01/2014
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Application #:
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13345120
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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THICK ON-CHIP HIGH-PERFORMANCE WIRING STRUCTURES
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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13345233
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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FINFET WITH FULLY SILICIDED GATE
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Patent #:
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Issue Dt:
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10/16/2012
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Application #:
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13345252
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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05/03/2012
| | | | |
Title:
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FIELD EFFECT TRANSISTOR HAVING NANOSTRUCTURE CHANNEL
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Patent #:
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Issue Dt:
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02/25/2014
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Application #:
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13345266
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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INTEGRATED CIRCUIT WITH A THIN BODY FIELD EFFECT TRANSISTOR AND CAPACITOR
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Patent #:
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Issue Dt:
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12/02/2014
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Application #:
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13345290
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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THERMALLY STABLE HIGH-K TETRAGONAL HFO2 LAYER WITHIN HIGH ASPECT RATIO DEEP TRENCHES
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Patent #:
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Issue Dt:
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07/01/2014
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Application #:
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13345388
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICES HAVING DIELECTRIC CAPS ON CONTACTS AND RELATED FABRICATION METHODS
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Patent #:
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Issue Dt:
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10/14/2014
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Application #:
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13345439
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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LAYOUT TO MINIMIZE FET VARIATION IN SMALL DIMENSION PHOTOLITHOGRAPHY
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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13345457
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH STRAIN-INDUCING REGIONS AND METHOD THEREOF
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Patent #:
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Issue Dt:
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09/10/2013
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Application #:
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13345619
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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8-TRANSISTOR SRAM CELL DESIGN WITH SCHOTTKY DIODES
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Patent #:
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Issue Dt:
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12/31/2013
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Application #:
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13345629
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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8-TRANSISTOR SRAM CELL DESIGN WITH INNER PASS-GATE JUNCTION DIODES
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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13345636
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Filing Dt:
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01/06/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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8-TRANSISTOR SRAM CELL DESIGN WITH OUTER PASS-GATE DIODES
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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13345881
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Filing Dt:
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01/09/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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ISOLATED ZENER DIODE
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Patent #:
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Issue Dt:
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11/08/2016
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Application #:
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13345922
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Filing Dt:
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01/09/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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Methods of Making Transistor Devices with Elevated Source/Drain Regions to Accommodate Consumption During Metal Silicide Formation Process
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Patent #:
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Issue Dt:
|
05/14/2013
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Application #:
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13346008
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Filing Dt:
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01/09/2012
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Title:
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METHOD TO FORM LOW SERIES RESISTANCE TRANSISTOR DEVICES ON SILICON ON INSULATOR LAYER
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Patent #:
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Issue Dt:
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04/21/2015
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Application #:
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13346043
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Filing Dt:
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01/09/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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IN SITU DOPING AND DIFFUSIONLESS ANNEALING OF EMBEDDED STRESSOR REGIONS IN PMOS AND NMOS DEVICES
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Patent #:
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Issue Dt:
|
03/04/2014
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Application #:
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13346164
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Filing Dt:
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01/09/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH AN OVERSIZED LOCAL CONTACT AS A FARADAY SHIELD
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Patent #:
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Issue Dt:
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11/19/2013
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Application #:
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13346242
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Filing Dt:
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01/09/2012
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Publication #:
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Pub Dt:
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07/11/2013
| | | | |
Title:
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OFF-LINE GAIN CALIBRATION IN A TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER
|
|