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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
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Patent #:	8809995	Issue Dt:	08/19/2014	Application #:	13408300	Filing Dt:	02/29/2012
Publication #:	US20130221484	Pub Dt:	08/29/2013
Title:	THROUGH SILICON VIA NOISE SUPPRESSION USING BURIED INTERFACE CONTACTS

Patent #:	8413004	Issue Dt:	04/02/2013	Application #:	13408407	Filing Dt:	02/29/2012
Publication #:	US20120192034	Pub Dt:	07/26/2012
Title:	LENGTHENING LIFE OF A LIMITED LIFE MEMORY

Patent #:	8299563	Issue Dt:	10/30/2012	Application #:	13408658	Filing Dt:	02/29/2012
Publication #:	US20120161275	Pub Dt:	06/28/2012
Title:	METHODS FOR FORMING A BONDED SEMICONDUCTOR SUBSTRATE INCLUDING A COOLING MECHANISM

Patent #:	8513085	Issue Dt:	08/20/2013	Application #:	13409693	Filing Dt:	03/01/2012
Publication #:	US20120168874	Pub Dt:	07/05/2012
Title:	STRUCTURE AND METHOD TO IMPROVE THRESHOLD VOLTAGE OF MOSFETS INCLUDING A HIGH K DIELECTRIC

Patent #:	8492268	Issue Dt:	07/23/2013	Application #:	13410466	Filing Dt:	03/02/2012
Publication #:	US20120164758	Pub Dt:	06/28/2012
Title:	IC HAVING VIABAR INTERCONNECTION AND RELATED METHOD

Patent #:	8860425	Issue Dt:	10/14/2014	Application #:	13411068	Filing Dt:	03/02/2012
Publication #:	US20130229189	Pub Dt:	09/05/2013
Title:	DEFECT DETECTION ON CHARACTERISTICALLY CAPACITIVE CIRCUIT NODES

Patent #:	8289058	Issue Dt:	10/16/2012	Application #:	13413825	Filing Dt:	03/07/2012
Publication #:	US20120161838	Pub Dt:	06/28/2012
Title:	MULTI-OUTPUT PLL OUTPUT SHIFT

Patent #:	8675427	Issue Dt:	03/18/2014	Application #:	13414133	Filing Dt:	03/07/2012
Publication #:	US20130235681	Pub Dt:	09/12/2013
Title:	IMPLEMENTING RC AND COUPLING DELAY CORRECTION FOR SRAM

Patent #:	8836124	Issue Dt:	09/16/2014	Application #:	13414742	Filing Dt:	03/08/2012
Publication #:	US20130234284	Pub Dt:	09/12/2013
Title:	Fuse and Integrated Conductor

Patent #:	9396977	Issue Dt:	07/19/2016	Application #:	13414875	Filing Dt:	03/08/2012
Publication #:	US20130236274	Pub Dt:	09/12/2013
Title:	MOISTURE AND/OR ELECTRICALLY CONDUCTIVE REMAINS DETECTION FOR WAFERS AFTER RINSE / DRY PROCESS

Patent #:	8629557	Issue Dt:	01/14/2014	Application #:	13414877	Filing Dt:	03/08/2012
Publication #:	US20130234315	Pub Dt:	09/12/2013
Title:	STRUCTURES AND METHODS FOR DETECTING SOLDER WETTING OF PEDESTAL SIDEWALLS

Patent #:	8835318	Issue Dt:	09/16/2014	Application #:	13414946	Filing Dt:	03/08/2012
Publication #:	US20130234335	Pub Dt:	09/12/2013
Title:	HNO3 SINGLE WAFER CLEAN PROCESS TO STRIP NICKEL AND FOR MOL POST ETCH

Patent #:	8687170	Issue Dt:	04/01/2014	Application #:	13414954	Filing Dt:	03/08/2012
Publication #:	US20120170017	Pub Dt:	07/05/2012
Title:	ASYMMETRIC COMPLEMENTARY DIPOLE ILLUMINATOR

Patent #:	8782571	Issue Dt:	07/15/2014	Application #:	13414971	Filing Dt:	03/08/2012
Publication #:	US20130236836	Pub Dt:	09/12/2013
Title:	MULTIPLE PATTERNING PROCESS FOR FORMING TRENCHES OR HOLES USING STITCHED ASSIST FEATURES

Patent #:	8755214	Issue Dt:	06/17/2014	Application #:	13415012	Filing Dt:	03/08/2012
Publication #:	US20120230097	Pub Dt:	09/13/2012
Title:	DETERMINING CELL-STATE IN PHASE-CHANGE MEMORY

Patent #:	8736816	Issue Dt:	05/27/2014	Application #:	13415106	Filing Dt:	03/08/2012
Publication #:	US20120173211	Pub Dt:	07/05/2012
Title:	ASYMMETRIC COMPLEMENTARY DIPOLE ILLUMINATOR

Patent #:	8772180	Issue Dt:	07/08/2014	Application #:	13415159	Filing Dt:	03/08/2012
Publication #:	US20120171862	Pub Dt:	07/05/2012
Title:	INTERCONNECT STRUCTURE AND METHOD OF MAKING SAME

Patent #:	8769464	Issue Dt:	07/01/2014	Application #:	13415372	Filing Dt:	03/08/2012
Publication #:	US20120174050	Pub Dt:	07/05/2012
Title:	METAL DENSITY AWARE SIGNAL ROUTING

Patent #:	8835298	Issue Dt:	09/16/2014	Application #:	13415492	Filing Dt:	03/08/2012
Publication #:	US20130234213	Pub Dt:	09/12/2013
Title:	NISI REWORK PROCEDURE TO REMOVE PLATINUM RESIDUALS

Patent #:	8916974	Issue Dt:	12/23/2014	Application #:	13415532	Filing Dt:	03/08/2012
Publication #:	US20120261824	Pub Dt:	10/18/2012
Title:	METAL DENSITY AWARE SIGNAL ROUTING

Patent #:	8546253	Issue Dt:	10/01/2013	Application #:	13415902	Filing Dt:	03/09/2012
Publication #:	US20130234316	Pub Dt:	09/12/2013
Title:	SELF-ALIGNED POLYMER PASSIVATION/ALUMINUM PAD

Patent #:	8901959	Issue Dt:	12/02/2014	Application #:	13415946	Filing Dt:	03/09/2012
Publication #:	US20130234756	Pub Dt:	09/12/2013
Title:	HYBRID IO CELL FOR WIREBOND AND C4 APPLICATIONS

Patent #:	8723021	Issue Dt:	05/13/2014	Application #:	13416354	Filing Dt:	03/09/2012
Publication #:	US20120174979	Pub Dt:	07/12/2012
Title:	EFFICIENCY IN ANTIREFLECTIVE COATING LAYERS FOR SOLAR CELLS

Patent #:	8906801	Issue Dt:	12/09/2014	Application #:	13417491	Filing Dt:	03/12/2012
Publication #:	US20130234336	Pub Dt:	09/12/2013
Title:	PROCESSES FOR FORMING INTEGRATED CIRCUITS AND INTEGRATED CIRCUITS FORMED THEREBY

Patent #:	8574991	Issue Dt:	11/05/2013	Application #:	13417651	Filing Dt:	03/12/2012
Publication #:	US20120171830	Pub Dt:	07/05/2012
Title:	ASYMMETRIC TRANSISTOR DEVICES FORMED BY ASYMMETRIC SPACERS AND TILTED IMPLANTATION

Patent #:	8395220	Issue Dt:	03/12/2013	Application #:	13417829	Filing Dt:	03/12/2012
Publication #:	US20120168872	Pub Dt:	07/05/2012
Title:	NANOMESH SRAM CELL

Patent #:	8716851	Issue Dt:	05/06/2014	Application #:	13417879	Filing Dt:	03/12/2012
Publication #:	US20120174047	Pub Dt:	07/05/2012
Title:	Continuously Referencing Signals Over Multiple Layers in Laminate Packages

Patent #:	8629017	Issue Dt:	01/14/2014	Application #:	13417900	Filing Dt:	03/12/2012
Publication #:	US20120171827	Pub Dt:	07/05/2012
Title:	STRUCTURE AND METHOD TO FORM EDRAM ON SOI SUBSTRATE

Patent #:	8568960	Issue Dt:	10/29/2013	Application #:	13418421	Filing Dt:	03/13/2012
Publication #:	US20120178027	Pub Dt:	07/12/2012
Title:	MULTIPLE EXPOSURE PHOTOLITHOGRAPHY METHODS

Patent #:	8839076	Issue Dt:	09/16/2014	Application #:	13418423	Filing Dt:	03/13/2012
Publication #:	US20120254693	Pub Dt:	10/04/2012
Title:	ENCODING A DATA WORD FOR WRITING THE ENCODED DATA WORD IN A MULTI-LEVEL SOLID STATE MEMORY

Patent #:	8933559	Issue Dt:	01/13/2015	Application #:	13418454	Filing Dt:	03/13/2012
Publication #:	US20120168931	Pub Dt:	07/05/2012
Title:	CARBON NANOTUBE STRUCTURES FOR ENHANCEMENT OF THERMAL DISSIPATION FROM SEMICONDUCTOR MODULES

Patent #:	9064722	Issue Dt:	06/23/2015	Application #:	13418476	Filing Dt:	03/13/2012
Publication #:	US20130240893	Pub Dt:	09/19/2013
Title:	BREAKDOWN VOLTAGE MULTIPLYING INTEGRATION SCHEME

Patent #:	8563419	Issue Dt:	10/22/2013	Application #:	13418659	Filing Dt:	03/13/2012
Publication #:	US20120171860	Pub Dt:	07/05/2012
Title:	METHOD OF MANUFACTURING AN INTERCONNECT STRUCTURE AND DESIGN STRUCTURE THEREOF

Patent #:	8349729	Issue Dt:	01/08/2013	Application #:	13418716	Filing Dt:	03/13/2012
Publication #:	US20120171818	Pub Dt:	07/05/2012
Title:	HYBRID BONDING INTERFACE FOR 3-DIMENSIONAL CHIP INTEGRATION

Patent #:	8461678	Issue Dt:	06/11/2013	Application #:	13418818	Filing Dt:	03/13/2012
Publication #:	US20120168953	Pub Dt:	07/05/2012
Title:	STRUCTURE WITH SELF ALIGNED RESIST LAYER ON AN INTERCONNECT SURFACE AND METHOD OF MAKING SAME

Patent #:	8802574	Issue Dt:	08/12/2014	Application #:	13418895	Filing Dt:	03/13/2012
Publication #:	US20130244427	Pub Dt:	09/19/2013
Title:	METHODS OF MAKING JOGGED LAYOUT ROUTINGS DOUBLE PATTERNING COMPLIANT

Patent #:	8891266	Issue Dt:	11/18/2014	Application #:	13418921	Filing Dt:	03/13/2012
Publication #:	US20130242627	Pub Dt:	09/19/2013
Title:	MONOLITHIC HIGH VOLTAGE MULTIPLIER HAVING HIGH VOLTAGE SEMICONDUCTOR DIODES AND HIGH-K CAPACITORS

Patent #:	9330985	Issue Dt:	05/03/2016	Application #:	13419286	Filing Dt:	03/13/2012
Publication #:	US20130245806	Pub Dt:	09/19/2013
Title:	AUTOMATED HYBRID METROLOGY FOR SEMICONDUCTOR DEVICE FABRICATION

Patent #:	8525234	Issue Dt:	09/03/2013	Application #:	13419508	Filing Dt:	03/14/2012
Publication #:	US20120168833	Pub Dt:	07/05/2012
Title:	FORMATION OF FINFET GATE SPACER

Patent #:	8415653	Issue Dt:	04/09/2013	Application #:	13419522	Filing Dt:	03/14/2012
Publication #:	US20120168709	Pub Dt:	07/05/2012
Title:	SINGLE MASK ADDER PHASE CHANGE MEMORY ELEMENT

Patent #:	8703552	Issue Dt:	04/22/2014	Application #:	13419624	Filing Dt:	03/14/2012
Publication #:	US20120171821	Pub Dt:	07/05/2012
Title:	METHOD AND STRUCTURE FOR FORMING CAPACITORS AND MEMORY DEVICES ON SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATES

Patent #:	8981523	Issue Dt:	03/17/2015	Application #:	13419877	Filing Dt:	03/14/2012
Publication #:	US20130241031	Pub Dt:	09/19/2013
Title:	PROGRAMMABLE FUSE STRUCTURE AND METHODS OF FORMING

Patent #:	8728905	Issue Dt:	05/20/2014	Application #:	13419927	Filing Dt:	03/14/2012
Publication #:	US20120171842	Pub Dt:	07/05/2012
Title:	STRESS-GENERATING SHALLOW TRENCH ISOLATION STRUCTURE HAVING DUAL COMPOSITION

Patent #:	8853037	Issue Dt:	10/07/2014	Application #:	13420412	Filing Dt:	03/14/2012
Publication #:	US20130244387	Pub Dt:	09/19/2013
Title:	METHODS FOR FABRICATING INTEGRATED CIRCUITS

Patent #:	8629049	Issue Dt:	01/14/2014	Application #:	13420724	Filing Dt:	03/15/2012
Publication #:	US20120171857	Pub Dt:	07/05/2012
Title:	ELECTRICALLY PROGRAMMABLE FUSE USING ANISOMETRIC CONTACTS AND FABRICATION METHOD

Patent #:	8629022	Issue Dt:	01/14/2014	Application #:	13420730	Filing Dt:	03/15/2012
Publication #:	US20120171831	Pub Dt:	07/05/2012
Title:	ASYMMETRIC FET INCLUDING SLOPED THRESHOLD VOLTAGE ADJUSTING MATERIAL LAYER AND METHOD OF FABRICATING SAME

Patent #:	8598664	Issue Dt:	12/03/2013	Application #:	13420763	Filing Dt:	03/15/2012
Publication #:	US20120168834	Pub Dt:	07/05/2012
Title:	FIELD EFFECT TRANSISTOR (FET) AND METHOD OF FORMING THE FET WITHOUT DAMAGING THE WAFER SURFACE

Patent #:	8828888	Issue Dt:	09/09/2014	Application #:	13421154	Filing Dt:	03/15/2012
Publication #:	US20120235285	Pub Dt:	09/20/2012
Title:	PROTECTION OF REACTIVE METAL SURFACES OF SEMICONDUCTOR DEVICES DURING SHIPPING BY PROVIDING AN ADDITIONAL PROTECTION LAYER

Patent #:	8822298	Issue Dt:	09/02/2014	Application #:	13421242	Filing Dt:	03/15/2012
Publication #:	US20120235215	Pub Dt:	09/20/2012
Title:	PERFORMANCE ENHANCEMENT IN TRANSISTORS BY REDUCING THE RECESSING OF ACTIVE REGIONS AND REMOVING SPACERS

Patent #:	8836047	Issue Dt:	09/16/2014	Application #:	13421394	Filing Dt:	03/15/2012
Publication #:	US20120235249	Pub Dt:	09/20/2012
Title:	REDUCING DEFECT RATE DURING DEPOSITION OF A CHANNEL SEMICONDUCTOR ALLOY INTO AN IN SITU RECESSED ACTIVE REGION

Patent #:	8490029	Issue Dt:	07/16/2013	Application #:	13421400	Filing Dt:	03/15/2012
Publication #:	US20120180010	Pub Dt:	07/12/2012
Title:	METHOD OF FABRICATING A DEVICE USING LOW TEMPERATURE ANNEAL PROCESSES, A DEVICE AND DESIGN STRUCTURE

Patent #:	8517769	Issue Dt:	08/27/2013	Application #:	13422295	Filing Dt:	03/16/2012
Publication #:	US20130244421	Pub Dt:	09/19/2013
Title:	METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES ON AN INTEGRATED CIRCUIT DEVICE

Patent #:	8674444	Issue Dt:	03/18/2014	Application #:	13422297	Filing Dt:	03/16/2012
Publication #:	US20120235236	Pub Dt:	09/20/2012
Title:	STRUCTURE AND METHOD OF FORMING A TRANSISTOR WITH ASYMMETRIC CHANNEL AND SOURCE/DRAIN REGIONS

Patent #:	8604564	Issue Dt:	12/10/2013	Application #:	13422390	Filing Dt:	03/16/2012
Publication #:	US20120175713	Pub Dt:	07/12/2012
Title:	SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME

Patent #:	8791014	Issue Dt:	07/29/2014	Application #:	13422439	Filing Dt:	03/16/2012
Publication #:	US20130244422	Pub Dt:	09/19/2013
Title:	METHODS OF FORMING COPPER-BASED CONDUCTIVE STRUCTURES ON SEMICONDUCTOR DEVICES

Patent #:	8505617	Issue Dt:	08/13/2013	Application #:	13423659	Filing Dt:	03/19/2012
Publication #:	US20120175100	Pub Dt:	07/12/2012
Title:	Structure and Apparatus for Cooling Integrated Circuits Using Copper Microchannels

Patent #:	8603894	Issue Dt:	12/10/2013	Application #:	13423716	Filing Dt:	03/19/2012
Publication #:	US20120252175	Pub Dt:	10/04/2012
Title:	STRESSED SOURCE/DRAIN CMOS AND METHOD FOR FORMING SAME

Patent #:	8629540	Issue Dt:	01/14/2014	Application #:	13423772	Filing Dt:	03/19/2012
Publication #:	US20120176281	Pub Dt:	07/12/2012
Title:	APPARATUS AND METHODS FOR PACKAGING INTEGRATED CIRCUIT CHIPS WITH ANTENNAS FORMED FROM PACKAGE LEAD WIRES

Patent #:	8652762	Issue Dt:	02/18/2014	Application #:	13423838	Filing Dt:	03/19/2012
Publication #:	US20120205787	Pub Dt:	08/16/2012
Title:	ORGANIC GRADED SPIN ON BARC COMPOSITIONS FOR HIGH NA LITHOGRAPHY

Patent #:	8664050	Issue Dt:	03/04/2014	Application #:	13424447	Filing Dt:	03/20/2012
Publication #:	US20130249002	Pub Dt:	09/26/2013
Title:	Structure and method to improve etsoi mosfets with back gate

Patent #:	8896069	Issue Dt:	11/25/2014	Application #:	13424613	Filing Dt:	03/20/2012
Publication #:	US20120175640	Pub Dt:	07/12/2012
Title:	SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRESS AND METHODS OF MANUFACTURING

Patent #:	8592916	Issue Dt:	11/26/2013	Application #:	13424787	Filing Dt:	03/20/2012
Publication #:	US20130249006	Pub Dt:	09/26/2013
Title:	SELECTIVELY RAISED SOURCE/DRAIN TRANSISTOR

Patent #:	9057388	Issue Dt:	06/16/2015	Application #:	13425470	Filing Dt:	03/21/2012
Publication #:	US20130248112	Pub Dt:	09/26/2013
Title:	VACUUM TRAP

Patent #:	8530932	Issue Dt:	09/10/2013	Application #:	13425654	Filing Dt:	03/21/2012
Publication #:	US20120175678	Pub Dt:	07/12/2012
Title:	REPLACEMENT SPACER FOR TUNNEL FETS

Patent #:	8558313	Issue Dt:	10/15/2013	Application #:	13425681	Filing Dt:	03/21/2012
Publication #:	US20120187492	Pub Dt:	07/26/2012
Title:	BULK SUBSTRATE FET INTEGRATED ON CMOS SOI

Patent #:	8575964	Issue Dt:	11/05/2013	Application #:	13426776	Filing Dt:	03/22/2012
Publication #:	US20130249596	Pub Dt:	09/26/2013
Title:	INACTIVITY TRIGGERED SELF CLOCKING LOGIC FAMILY

Patent #:	8847338	Issue Dt:	09/30/2014	Application #:	13426845	Filing Dt:	03/22/2012
Publication #:	US20130069183	Pub Dt:	03/21/2013
Title:	METHOD FOR FORMING A SELF-ALIGNED HARD MASK FOR CONTACT TO A TUNNEL JUNCTION

Patent #:	8791372	Issue Dt:	07/29/2014	Application #:	13426892	Filing Dt:	03/22/2012
Publication #:	US20130075148	Pub Dt:	03/28/2013
Title:	REDUCING IMPEDANCE DISCONTINUITY IN PACKAGES

Patent #:	8724365	Issue Dt:	05/13/2014	Application #:	13427162	Filing Dt:	03/22/2012
Publication #:	US20120178239	Pub Dt:	07/12/2012
Title:	PROGRAMMABLE SEMICONDUCTOR DEVICE

Patent #:	9424992	Issue Dt:	08/23/2016	Application #:	13427216	Filing Dt:	03/22/2012
Publication #:	US20120187536	Pub Dt:	07/26/2012
Title:	COMPLIMENTARY METAL-INSULATOR-METAL (MIM) CAPACITORS AND METHOD OF MANUFACTURE

Patent #:	8765558	Issue Dt:	07/01/2014	Application #:	13427237	Filing Dt:	03/22/2012
Publication #:	US20120178227	Pub Dt:	07/12/2012
Title:	REPLACEMENT GATE CMOS

Patent #:	8552502	Issue Dt:	10/08/2013	Application #:	13427963	Filing Dt:	03/23/2012
Publication #:	US20120187420	Pub Dt:	07/26/2012
Title:	STRUCTURE AND METHOD TO MAKE REPLACEMENT METAL GATE AND CONTACT METAL

Patent #:	8586444	Issue Dt:	11/19/2013	Application #:	13428004	Filing Dt:	03/23/2012
Publication #:	US20130249052	Pub Dt:	09/26/2013
Title:	CREATING DEEP TRENCHES ON UNDERLYING SUBSTRATE

Patent #:	8981565	Issue Dt:	03/17/2015	Application #:	13428184	Filing Dt:	03/23/2012
Publication #:	US20130249099	Pub Dt:	09/26/2013
Title:	Techniques to Form Uniform and Stable Silicide

Patent #:	8534927	Issue Dt:	09/17/2013	Application #:	13428277	Filing Dt:	03/23/2012
Publication #:	US20130251304	Pub Dt:	09/26/2013
Title:	FLEXIBLE FIBER TO WAFER INTERFACE

Patent #:	8713509	Issue Dt:	04/29/2014	Application #:	13429466	Filing Dt:	03/26/2012
Publication #:	US20120192130	Pub Dt:	07/26/2012
Title:	CIRCUIT DESIGN APPROXIMATION

Patent #:	9099492	Issue Dt:	08/04/2015	Application #:	13429787	Filing Dt:	03/26/2012
Publication #:	US20130248985	Pub Dt:	09/26/2013
Title:	METHODS OF FORMING REPLACEMENT GATE STRUCTURES WITH A RECESSED CHANNEL

Patent #:	8806445	Issue Dt:	08/12/2014	Application #:	13429981	Filing Dt:	03/26/2012
Publication #:	US20120254840	Pub Dt:	10/04/2012
Title:	THREAD SERIALIZATION AND DISABLEMENT TOOL

Patent #:	8716759	Issue Dt:	05/06/2014	Application #:	13430018	Filing Dt:	03/26/2012
Publication #:	US20120181628	Pub Dt:	07/19/2012
Title:	METHOD TO TAILOR LOCATION OF PEAK ELECTRIC FIELD DIRECTLY UNDERNEATH AN EXTENSION SPACER FOR ENHANCED PROGRAMMABILITY OF A PROMPT-SHIFT DEVICE

Patent #:	9058302	Issue Dt:	06/16/2015	Application #:	13430028	Filing Dt:	03/26/2012
Publication #:	US20120179440	Pub Dt:	07/12/2012
Title:	COMBINED MATRIX-VECTOR AND MATRIX TRANSPOSE VECTOR MULTIPLY FOR A BLOCK-SPARSE MATRIX

Patent #:	8753932	Issue Dt:	06/17/2014	Application #:	13430067	Filing Dt:	03/26/2012
Publication #:	US20120190159	Pub Dt:	07/26/2012
Title:	ASYMMETRIC SILICON-ON-INSULATOR SRAM CELL

Patent #:	8486511	Issue Dt:	07/16/2013	Application #:	13430177	Filing Dt:	03/26/2012
Publication #:	US20120183736	Pub Dt:	07/19/2012
Title:	PATTERN FORMATION EMPLOYING SELF-ASSEMBLED MATERIAL

Patent #:	8486512	Issue Dt:	07/16/2013	Application #:	13430179	Filing Dt:	03/26/2012
Publication #:	US20120183742	Pub Dt:	07/19/2012
Title:	PATTERN FORMATION EMPLOYING SELF-ASSEMBLED MATERIAL

Patent #:	8492265	Issue Dt:	07/23/2013	Application #:	13431254	Filing Dt:	03/27/2012
Publication #:	US20120190187	Pub Dt:	07/26/2012
Title:	PAD BONDING EMPLOYING A SELF-ALIGNED PLATED LINER FOR ADHESION ENHANCEMENT

Patent #:	8575655	Issue Dt:	11/05/2013	Application #:	13431328	Filing Dt:	03/27/2012
Publication #:	US20120181631	Pub Dt:	07/19/2012
Title:	METHOD AND STRUCTURE FOR PMOS DEVICES WITH HIGH K METAL GATE INTEGRATION AND SIGE CHANNEL ENGINEERING

Patent #:	8956973	Issue Dt:	02/17/2015	Application #:	13431343	Filing Dt:	03/27/2012
Publication #:	US20130260556	Pub Dt:	10/03/2013
Title:	BOTTOM-UP PLATING OF THROUGH-SUBSTRATE VIAS

Patent #:	8756541	Issue Dt:	06/17/2014	Application #:	13431368	Filing Dt:	03/27/2012
Publication #:	US20130263068	Pub Dt:	10/03/2013
Title:	RELATIVE ORDERING CIRCUIT SYNTHESIS

Patent #:	8916426	Issue Dt:	12/23/2014	Application #:	13431414	Filing Dt:	03/27/2012
Publication #:	US20130256748	Pub Dt:	10/03/2013
Title:	PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES

Patent #:	8692291	Issue Dt:	04/08/2014	Application #:	13431456	Filing Dt:	03/27/2012
Publication #:	US20130256749	Pub Dt:	10/03/2013
Title:	PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES

Patent #:	8836281	Issue Dt:	09/16/2014	Application #:	13431539	Filing Dt:	03/27/2012
Publication #:	US20120191524	Pub Dt:	07/26/2012
Title:	ELECTRIC VEHICLE CHARGING TRANSACTION INTERFACE FOR MANAGING ELECTRIC VEHICLE CHARGING TRANSACTIONS

Patent #:	8373486	Issue Dt:	02/12/2013	Application #:	13431599	Filing Dt:	03/27/2012
Publication #:	US20120187987	Pub Dt:	07/26/2012
Title:	STRUCTURE FOR A FREQUENCY ADAPTIVE LEVEL SHIFTER CIRCUIT

Patent #:	8877615	Issue Dt:	11/04/2014	Application #:	13431770	Filing Dt:	03/27/2012
Publication #:	US20120190179	Pub Dt:	07/26/2012
Title:	METHODS OF MANUFACTURING FINFET DEVICES

Patent #:	8502325	Issue Dt:	08/06/2013	Application #:	13432395	Filing Dt:	03/28/2012
Publication #:	US20120187506	Pub Dt:	07/26/2012
Title:	METAL HIGH-K TRANSISTOR HAVING SILICON SIDEWALLS FOR REDUCED PARASITIC CAPACITANCE

Patent #:	9264150	Issue Dt:	02/16/2016	Application #:	13432414	Filing Dt:	03/28/2012
Publication #:	US20130259488	Pub Dt:	10/03/2013
Title:	REACTIVE METAL OPTICAL SECURITY DEVICE AND METHODS OF FABRICATION AND USE

Patent #:	8753950	Issue Dt:	06/17/2014	Application #:	13432421	Filing Dt:	03/28/2012
Publication #:	US20120190164	Pub Dt:	07/26/2012
Title:	DUAL-DAMASCENE PROCESS TO FABRICATE THICK WIRE STRUCTURE

Patent #:	8435864	Issue Dt:	05/07/2013	Application #:	13432440	Filing Dt:	03/28/2012
Publication #:	US20120184081	Pub Dt:	07/19/2012
Title:	PROCESS FOR SINGLE AND MULTIPLE LEVEL METAL-INSULATOR-METAL INTEGRATION WITH A SINGLE MASK

Patent #:	8492848	Issue Dt:	07/23/2013	Application #:	13432716	Filing Dt:	03/28/2012
Publication #:	US20120187502	Pub Dt:	07/26/2012
Title:	APPLICATION OF CLUSTER BEAM IMPLANTATION FOR FABRICATING THRESHOLD VOLTAGE ADJUSTED FETS

Patent #:	9105573	Issue Dt:	08/11/2015	Application #:	13432772	Filing Dt:	03/28/2012
Publication #:	US20130257624	Pub Dt:	10/03/2013
Title:	VISUALLY DETECTING ELECTROSTATIC DISCHARGE EVENTS

Patent #:	8802497	Issue Dt:	08/12/2014	Application #:	13432963	Filing Dt:	03/28/2012
Publication #:	US20120187561	Pub Dt:	07/26/2012
Title:	FORMING SEMICONDUCTOR CHIP CONNECTIONS

100

Patent #:	8800952	Issue Dt:	08/12/2014	Application #:	13432966	Filing Dt:	03/28/2012
Publication #:	US20120186771	Pub Dt:	07/26/2012
Title:	REMOVING MATERIAL FROM DEFECTIVE OPENING IN GLASS MOLD AND RELATED GLASS MOLD FOR INJECTION MOLDED SOLDER

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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