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Reel/Frame:058096/0558   Pages: 6
Recorded: 11/12/2021
Attorney Dkt #:114786-0006
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 40
1
Patent #:
6289116
Issue Dt:
09/11/2001
Application #:
08939047
Filing Dt:
09/26/1997
Title:
COMPUTER-ASSISTED DESIGN ANALYSIS METHOD FOR EXTRACTING DEVICE AND INTERCONNECT INFORMATION
2
Patent #:
6236746
Issue Dt:
05/22/2001
Application #:
08942113
Filing Dt:
10/01/1997
Title:
METHOD TO EXTRACT CIRCUIT INFORMATION
3
Patent #:
6453063
Issue Dt:
09/17/2002
Application #:
09238435
Filing Dt:
01/28/1999
Title:
AUTOMATIC FOCUSED ION BEAM IMAGING SYSTEM AND METHOD
4
Patent #:
6288393
Issue Dt:
09/11/2001
Application #:
09238436
Filing Dt:
01/28/1999
Title:
AUTOMATED METHOD OF CIRCUIT ANALYSIS
5
Patent #:
6768102
Issue Dt:
07/27/2004
Application #:
09594169
Filing Dt:
06/15/2000
Title:
METHOD AND SYSTEM FOR RECALIBRATION DURING MICRO-IMAGING TO DETERMINE THERMAL DRIFT
6
Patent #:
6549222
Issue Dt:
04/15/2003
Application #:
09604252
Filing Dt:
06/27/2000
Title:
LOCK-STEP CURSORS FOR FEATURE ALIGNMENT
7
Patent #:
6763140
Issue Dt:
07/13/2004
Application #:
09657164
Filing Dt:
09/07/2000
Title:
METHOD AND APPARATUS FOR FOCUSING A MICRO-IMAGING SYSTEM ONTO A TILTED OR UNEVEN SAMPLE TO ACQUIRE IMAGES OF THE SAMPLE
8
Patent #:
6738957
Issue Dt:
05/18/2004
Application #:
09920734
Filing Dt:
08/03/2001
Publication #:
US20020023107
Pub Dt:
02/21/2002
Title:
SCHEMATIC ORGANIZATION TOOL
9
Patent #:
7013028
Issue Dt:
03/14/2006
Application #:
09920937
Filing Dt:
08/03/2001
Publication #:
US20020018583
Pub Dt:
02/14/2002
Title:
ADVANCED SCHEMATIC EDITOR
10
Patent #:
6684379
Issue Dt:
01/27/2004
Application #:
09927551
Filing Dt:
08/13/2001
Publication #:
US20020046386
Pub Dt:
04/18/2002
Title:
DESIGN ANALYSIS WORKSTATION FOR ANALYZING INTEGRATED CIRCUITS
11
Patent #:
6907583
Issue Dt:
06/14/2005
Application #:
10267994
Filing Dt:
10/10/2002
Publication #:
US20030084409
Pub Dt:
05/01/2003
Title:
COMPUTER AIDED METHOD OF CIRCUIT EXTRACTION
12
Patent #:
7020853
Issue Dt:
03/28/2006
Application #:
10717460
Filing Dt:
11/21/2003
Publication #:
US20040117750
Pub Dt:
06/17/2004
Title:
DESIGN ANALYSIS WORKSTATION FOR ANALYZING INTEGRATED CIRCUITS
13
Patent #:
7207018
Issue Dt:
04/17/2007
Application #:
10910624
Filing Dt:
08/04/2004
Publication #:
US20060031792
Pub Dt:
02/09/2006
Title:
METHOD AND APPARATUS FOR LOCATING SHORT CIRCUIT FAULTS IN AN INTEGRATED CIRCUIT LAYOUT
14
Patent #:
7751643
Issue Dt:
07/06/2010
Application #:
10916615
Filing Dt:
08/12/2004
Publication #:
US20060034540
Pub Dt:
02/16/2006
Title:
METHOD AND APPARATUS FOR REMOVING UNEVEN BRIGHTNESS IN AN IMAGE
15
Patent #:
7278121
Issue Dt:
10/02/2007
Application #:
10922982
Filing Dt:
08/23/2004
Publication #:
US20060041849
Pub Dt:
02/23/2006
Title:
METHOD AND APPARATUS FOR REDUCING REDUNDANT DATA IN A LAYOUT DATA STRUCTURE
16
Patent #:
7643665
Issue Dt:
01/05/2010
Application #:
10929798
Filing Dt:
08/31/2004
Publication #:
US20060045325
Pub Dt:
03/02/2006
Title:
METHOD OF DESIGN ANALYSIS OF EXISTING INTEGRATED CIRCUITS
17
Patent #:
8219940
Issue Dt:
07/10/2012
Application #:
11174732
Filing Dt:
07/06/2005
Publication #:
US20070011628
Pub Dt:
01/11/2007
Title:
METHOD AND APPARATUS FOR REMOVING DUMMY FEATURES FROM A DATA STRUCTURE
18
Patent #:
7693348
Issue Dt:
04/06/2010
Application #:
11201233
Filing Dt:
08/10/2005
Publication #:
US20060257051
Pub Dt:
11/16/2006
Title:
METHOD OF REGISTERING AND ALIGNING MULTIPLE IMAGES
19
Patent #:
7498181
Issue Dt:
03/03/2009
Application #:
11237966
Filing Dt:
09/29/2005
Publication #:
US20070072314
Pub Dt:
03/29/2007
Title:
METHOD OF PREPARING AN INTEGRATED CIRCUIT DIE FOR IMAGING
20
Patent #:
7509601
Issue Dt:
03/24/2009
Application #:
11298717
Filing Dt:
12/12/2005
Publication #:
US20060095884
Pub Dt:
05/04/2006
Title:
DESIGN ANALYSIS WORKSTATION FOR ANALYZING INTEGRATED CIRCUITS
21
Patent #:
8122053
Issue Dt:
02/21/2012
Application #:
11970195
Filing Dt:
01/07/2008
Publication #:
US20090077066
Pub Dt:
03/19/2009
Title:
METHOD OF BIBLIOGRAPHIC FIELD NORMALIZATION
22
Patent #:
7765517
Issue Dt:
07/27/2010
Application #:
11976409
Filing Dt:
10/24/2007
Publication #:
US20080059920
Pub Dt:
03/06/2008
Title:
METHOD AND APPARATUS FOR REMOVING DUMMY FEATURES FROM A DATA STRUCTURE
23
Patent #:
8606041
Issue Dt:
12/10/2013
Application #:
12029199
Filing Dt:
02/11/2008
Publication #:
US20090092285
Pub Dt:
04/09/2009
Title:
METHOD OF LOCAL TRACING OF CONNECTIVITY AND SCHEMATIC REPRESENTATIONS PRODUCED THEREFROM
24
Patent #:
8051395
Issue Dt:
11/01/2011
Application #:
12153320
Filing Dt:
05/16/2008
Publication #:
US20090119623
Pub Dt:
05/07/2009
Title:
METHOD OF LABELLING SWAPPABLE PINS FOR INTEGRATED CIRCUIT PATTERN MATCHING
25
Patent #:
7899640
Issue Dt:
03/01/2011
Application #:
12183298
Filing Dt:
07/31/2008
Publication #:
US20100030497
Pub Dt:
02/04/2010
Title:
INTEGRATED CIRCUIT CHARACTERISATION SYSTEM AND METHOD
26
Patent #:
7580557
Issue Dt:
08/25/2009
Application #:
12200968
Filing Dt:
08/29/2008
Publication #:
US20080317327
Pub Dt:
12/25/2008
Title:
METHOD OF DESIGN ANALYSIS OF EXISTING INTEGRATED CIRCUITS
27
Patent #:
7873203
Issue Dt:
01/18/2011
Application #:
12200975
Filing Dt:
08/29/2008
Publication #:
US20080317328
Pub Dt:
12/25/2008
Title:
METHOD OF DESIGN ANALYSIS OF EXISTING INTEGRATED CIRCUITS
28
Patent #:
7886258
Issue Dt:
02/08/2011
Application #:
12816144
Filing Dt:
06/15/2010
Publication #:
US20100257501
Pub Dt:
10/07/2010
Title:
METHOD AND APPARATUS FOR REMOVING DUMMY FEATURES FROM A DATA STRUCTURE
29
Patent #:
8701058
Issue Dt:
04/15/2014
Application #:
12817727
Filing Dt:
06/17/2010
Publication #:
US20100325593
Pub Dt:
12/23/2010
Title:
INTEGRATED CIRCUIT ANALYSIS SYSTEMS AND METHODS
30
Patent #:
8495556
Issue Dt:
07/23/2013
Application #:
12942114
Filing Dt:
11/09/2010
Publication #:
US20120117530
Pub Dt:
05/10/2012
Title:
CIRCUIT VISUALIZATION USING FLIGHTLINES
31
Patent #:
8347262
Issue Dt:
01/01/2013
Application #:
12989739
Filing Dt:
10/26/2010
Publication #:
US20110041110
Pub Dt:
02/17/2011
Title:
METHOD OF DERIVING AN INTEGRATED CIRCUIT SCHEMATIC DIAGRAM
32
Patent #:
8413085
Issue Dt:
04/02/2013
Application #:
13083534
Filing Dt:
04/09/2011
Publication #:
US20120260224
Pub Dt:
10/11/2012
Title:
Digital Netlist Partitioning System For Faster Circuit Reverse-Engineering
33
Patent #:
8918402
Issue Dt:
12/23/2014
Application #:
13350478
Filing Dt:
01/13/2012
Publication #:
US20120117085
Pub Dt:
05/10/2012
Title:
METHOD OF BIBLIOGRAPHIC FIELD NORMALIZATION
34
Patent #:
9534299
Issue Dt:
01/03/2017
Application #:
13673055
Filing Dt:
11/09/2012
Publication #:
US20130118896
Pub Dt:
05/16/2013
Title:
METHOD AND SYSTEM FOR ION BEAM DELAYERING OF A SAMPLE AND CONTROL THEREOF
35
Patent #:
8791436
Issue Dt:
07/29/2014
Application #:
13869749
Filing Dt:
04/24/2013
Title:
CIRCUIT TRACING USING A FOCUSED ION BEAM
36
Patent #:
9383327
Issue Dt:
07/05/2016
Application #:
14309674
Filing Dt:
06/19/2014
Publication #:
US20140319343
Pub Dt:
10/30/2014
Title:
CIRCUIT TRACING USING A FOCUSED ION BEAM
37
Patent #:
9529040
Issue Dt:
12/27/2016
Application #:
14811549
Filing Dt:
07/28/2015
Publication #:
US20160187419
Pub Dt:
06/30/2016
Title:
CIRCUIT TRACING USING A FOCUSED ION BEAM
38
Patent #:
9915628
Issue Dt:
03/13/2018
Application #:
15174260
Filing Dt:
06/06/2016
Publication #:
US20160282287
Pub Dt:
09/29/2016
Title:
CIRCUIT TRACING USING A FOCUSED ION BEAM
39
Patent #:
10550480
Issue Dt:
02/04/2020
Application #:
15378551
Filing Dt:
12/14/2016
Publication #:
US20170096741
Pub Dt:
04/06/2017
Title:
METHOD AND SYSTEM FOR ION BEAM DELAYERING OF A SAMPLE AND CONTROL THEREOF
40
Patent #:
10689763
Issue Dt:
06/23/2020
Application #:
15379049
Filing Dt:
12/14/2016
Publication #:
US20170089813
Pub Dt:
03/30/2017
Title:
METHOD AND SYSTEM FOR ION BEAM DELAYERING OF A SAMPLE AND CONTROL THEREOF
Assignor
1
STELLUS CAPITAL INVESTMENT CORPORATION, AS ADMINISTRATIVE AGENT
Exec Dt:
11/09/2021
Assignee
1
TECHINSIGHTS INC.
1891 ROBERTSON ROAD
SUITE 500
OTTAWA, ONTARIO, CANADA K2H5B7
Correspondence name and address
ROPES & GRAY LLP
PRUDENTIAL TOWER
800 BOYLSTON STREET
BOSTON, MA 02199-3600

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