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Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	058297/0853			Pages:	4
		Recorded:	10/19/2021
Conveyance:	CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).

Total properties: 30

Patent #:	6931011	Issue Dt:	08/16/2005	Application #:	09773073	Filing Dt:	01/31/2001
Publication #:	US20020101826	Pub Dt:	08/01/2002
Title:	METHOD AND SYSTEMS FOR BANDWIDTH MANAGEMENT IN PACKET DATA NETWORKS

Patent #:	6586288	Issue Dt:	07/01/2003	Application #:	09982841	Filing Dt:	10/18/2001
Publication #:	US20020058374	Pub Dt:	05/16/2002
Title:	METHOD OF FORMING DUAL-METAL GATES IN SEMICONDUCTOR DEVICE

Patent #:	6657920	Issue Dt:	12/02/2003	Application #:	10028704	Filing Dt:	12/28/2001
Publication #:	US20030053366	Pub Dt:	03/20/2003
Title:	CIRCUIT FOR GENERATING INTERNAL ADDRESS IN SEMICONDUCTOR MEMORY DEVICE

Patent #:	7157359	Issue Dt:	01/02/2007	Application #:	10036156	Filing Dt:	12/26/2001
Publication #:	US20020086507	Pub Dt:	07/04/2002
Title:	METHOD OF FORMING A METAL GATE IN A SEMICONDUCTOR DEVICE USING ATOMIC LAYER DEPOSITION PROCESS

Patent #:	6566188	Issue Dt:	05/20/2003	Application #:	10177950	Filing Dt:	06/21/2002
Publication #:	US20020197813	Pub Dt:	12/26/2002
Title:	METHOD OF FORMING CONTACT HOLES IN SEMICONDUCTOR DEVICES AND METHOD OF FORMING CAPACITORS USING THE SAME

Patent #:	6744090	Issue Dt:	06/01/2004	Application #:	10260624	Filing Dt:	10/01/2002
Publication #:	US20030098484	Pub Dt:	05/29/2003
Title:	DAMASCENE CAPACITOR FORMED IN METAL INTERCONNECTION LAYER

Patent #:	7111179	Issue Dt:	09/19/2006	Application #:	10268914	Filing Dt:	10/11/2002
Title:	METHOD AND APPARATUS FOR OPTIMIZING PERFORMANCE AND BATTERY LIFE OF ELECTRONIC DEVICES BASED ON SYSTEM AND APPLICATION PARAMETERS

Patent #:	6920068	Issue Dt:	07/19/2005	Application #:	10749892	Filing Dt:	12/31/2003
Publication #:	US20040240274	Pub Dt:	12/02/2004
Title:	SEMICONDUCTOR MEMORY DEVICE WITH MODIFIED GLOBAL INPUT/OUTPUT SCHEME

Patent #:	7432151	Issue Dt:	10/07/2008	Application #:	10799877	Filing Dt:	03/15/2004
Publication #:	US20040175883	Pub Dt:	09/09/2004
Title:	SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Patent #:	7068558	Issue Dt:	06/27/2006	Application #:	10877037	Filing Dt:	06/24/2004
Publication #:	US20050094460	Pub Dt:	05/05/2005
Title:	SEMICONDUCTOR MEMORY DEVICE HAVING ROW PATH CONTROL CIRCUIT AND OPERATING METHOD THEREOF

Patent #:	7196966	Issue Dt:	03/27/2007	Application #:	10879650	Filing Dt:	06/28/2004
Publication #:	US20050180229	Pub Dt:	08/18/2005
Title:	ON DIE TERMINATION MODE TRANSFER CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE AND ITS METHOD

Patent #:	7099228	Issue Dt:	08/29/2006	Application #:	11004806	Filing Dt:	12/07/2004
Publication #:	US20060050601	Pub Dt:	03/09/2006
Title:	SEMICONDUCTOR MEMORY DEVICE

Patent #:	6943602	Issue Dt:	09/13/2005	Application #:	11026970	Filing Dt:	12/30/2004
Title:	DELAY LOCKED LOOP AND LOCKING METHOD THEREOF

Patent #:	7410866	Issue Dt:	08/12/2008	Application #:	11204660	Filing Dt:	08/15/2005
Publication #:	US20060131630	Pub Dt:	06/22/2006
Title:	METHOD FOR FORMING STORAGE NODE OF CAPACITOR IN SEMICONDUCTOR DEVICE

Patent #:	7459358	Issue Dt:	12/02/2008	Application #:	11414353	Filing Dt:	05/01/2006
Publication #:	US20070170522	Pub Dt:	07/26/2007
Title:	METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE

Patent #:	7547600	Issue Dt:	06/16/2009	Application #:	11476261	Filing Dt:	06/27/2006
Publication #:	US20070145409	Pub Dt:	06/28/2007
Title:	FIVE CHANNEL FIN TRANSISTOR AND METHOD FOR FABRICATING THE SAME

Patent #:	7428168	Issue Dt:	09/23/2008	Application #:	11478527	Filing Dt:	06/30/2006
Publication #:	US20070070697	Pub Dt:	03/29/2007
Title:	SEMICONDUCTOR MEMORY DEVICE SHARING A DATA LINE SENSE AMPLIFIER AND A WRITE DRIVER IN ORDER TO REDUCE A CHIP SIZE

Patent #:	7396772	Issue Dt:	07/08/2008	Application #:	11582638	Filing Dt:	10/17/2006
Publication #:	US20070281480	Pub Dt:	12/06/2007
Title:	METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING CAPACITOR

Patent #:	7790546	Issue Dt:	09/07/2010	Application #:	12168823	Filing Dt:	07/07/2008
Publication #:	US20080293212	Pub Dt:	11/27/2008
Title:	METHOD FOR FORMING STORAGE NODE OF CAPACITOR IN SEMICONDUCTOR DEVICE

Patent #:	8110871	Issue Dt:	02/07/2012	Application #:	12323391	Filing Dt:	11/25/2008
Publication #:	US20090173992	Pub Dt:	07/09/2009
Title:	SEMICONDUCTOR DEVICE WITH RECESS AND FIN STRUCTURE

Patent #:	8913443	Issue Dt:	12/16/2014	Application #:	13236381	Filing Dt:	09/19/2011
Publication #:	US20130070540	Pub Dt:	03/21/2013
Title:	VOLTAGE REGULATION FOR 3D PACKAGES AND METHOD OF MANUFACTURING SAME

Patent #:	8357572	Issue Dt:	01/22/2013	Application #:	13360194	Filing Dt:	01/27/2012
Publication #:	US20120122295	Pub Dt:	05/17/2012
Title:	METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH RECESS AND FIN STRUCTURE

Patent #:	RE44590	Issue Dt:	11/12/2013	Application #:	13369988	Filing Dt:	02/09/2012
Title:	CLOCK CONTROL DEVICE FOR TOGGLING AN INTERNAL CLOCK OF A SYNCHRONOUS DRAM FOR REDUCED POWER CONSUMPTION

Patent #:	9588883	Issue Dt:	03/07/2017	Application #:	13455780	Filing Dt:	04/25/2012
Publication #:	US20130080730	Pub Dt:	03/28/2013
Title:	FLASH MEMORY SYSTEM

Patent #:	RE45232	Issue Dt:	11/04/2014	Application #:	13568920	Filing Dt:	08/07/2012
Title:	METHOD OF FORMING A CONTACT PLUG FOR A SEMICONDUCTOR DEVICE

Patent #:	RE44532	Issue Dt:	10/08/2013	Application #:	13586272	Filing Dt:	08/15/2012
Title:	METHOD FOR MANUFACTURING A TRANSISTOR OF A SEMICONDUCTOR MEMORY DEVICE

Patent #:	8891322	Issue Dt:	11/18/2014	Application #:	13621486	Filing Dt:	09/17/2012
Publication #:	US20130070547	Pub Dt:	03/21/2013
Title:	MEMORY SYSTEM WITH A LAYER COMPRISING A DEDICATED REDUNDANCY AREA

Patent #:	RE48246	Issue Dt:	10/06/2020	Application #:	14045419	Filing Dt:	12/07/2017
Publication #:	US20140035042	Pub Dt:	02/06/2014
Title:	METHOD FOR MANUFACTURING A TRANSISTOR OF A SEMICONDUCTOR MEMORY DEVICE

Patent #:	9996274	Issue Dt:	06/12/2018	Application #:	15419246	Filing Dt:	01/30/2017
Publication #:	US20170206009	Pub Dt:	07/20/2017
Title:	FLASH MEMORY SYSTEM

Patent #:	10303370	Issue Dt:	05/28/2019	Application #:	15976255	Filing Dt:	05/10/2018
Publication #:	US20180329627	Pub Dt:	11/15/2018
Title:	FLASH MEMORY SYSTEM

Assignor

CONVERSANT INTELLECTUAL PROPERTY INC.

Exec Dt:

04/01/2021

Assignee

MOSAID TECHNOLOGIES INCORPORATED

515 LEGGET DRIVE

SUITE 100

OTTAWA, CANADA K2K 3G4

Correspondence name and address
	CONVERSANT IP MANAGEMENT CORP.
	5830 GRANITE PARKWAY #100-247
	SUITE 247
	PLANO, TX 75024

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