Total properties:
30
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Patent #:
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Issue Dt:
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08/16/2005
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Application #:
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09773073
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Filing Dt:
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01/31/2001
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Publication #:
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Pub Dt:
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08/01/2002
| | | | |
Title:
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METHOD AND SYSTEMS FOR BANDWIDTH MANAGEMENT IN PACKET DATA NETWORKS
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09982841
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Filing Dt:
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10/18/2001
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Publication #:
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Pub Dt:
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05/16/2002
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Title:
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METHOD OF FORMING DUAL-METAL GATES IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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10028704
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Filing Dt:
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12/28/2001
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Publication #:
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Pub Dt:
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03/20/2003
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Title:
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CIRCUIT FOR GENERATING INTERNAL ADDRESS IN SEMICONDUCTOR MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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10036156
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Filing Dt:
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12/26/2001
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Publication #:
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Pub Dt:
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07/04/2002
| | | | |
Title:
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METHOD OF FORMING A METAL GATE IN A SEMICONDUCTOR DEVICE USING ATOMIC LAYER DEPOSITION PROCESS
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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10177950
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Filing Dt:
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06/21/2002
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Publication #:
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Pub Dt:
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12/26/2002
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Title:
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METHOD OF FORMING CONTACT HOLES IN SEMICONDUCTOR DEVICES AND METHOD OF FORMING CAPACITORS USING THE SAME
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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10260624
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Filing Dt:
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10/01/2002
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Publication #:
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Pub Dt:
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05/29/2003
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Title:
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DAMASCENE CAPACITOR FORMED IN METAL INTERCONNECTION LAYER
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10268914
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Filing Dt:
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10/11/2002
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Title:
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METHOD AND APPARATUS FOR OPTIMIZING PERFORMANCE AND BATTERY LIFE OF ELECTRONIC DEVICES BASED ON SYSTEM AND APPLICATION PARAMETERS
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10749892
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Filing Dt:
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12/31/2003
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Publication #:
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Pub Dt:
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12/02/2004
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE WITH MODIFIED GLOBAL INPUT/OUTPUT SCHEME
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Patent #:
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Issue Dt:
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10/07/2008
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Application #:
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10799877
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Filing Dt:
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03/15/2004
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Publication #:
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Pub Dt:
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09/09/2004
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10877037
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Filing Dt:
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06/24/2004
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Publication #:
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Pub Dt:
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05/05/2005
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING ROW PATH CONTROL CIRCUIT AND OPERATING METHOD THEREOF
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10879650
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Filing Dt:
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06/28/2004
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Publication #:
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Pub Dt:
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08/18/2005
| | | | |
Title:
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ON DIE TERMINATION MODE TRANSFER CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE AND ITS METHOD
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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11004806
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Filing Dt:
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12/07/2004
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Publication #:
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Pub Dt:
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03/09/2006
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE
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|
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Patent #:
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|
Issue Dt:
|
09/13/2005
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Application #:
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11026970
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Filing Dt:
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12/30/2004
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Title:
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DELAY LOCKED LOOP AND LOCKING METHOD THEREOF
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11204660
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Filing Dt:
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08/15/2005
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Publication #:
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Pub Dt:
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06/22/2006
| | | | |
Title:
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METHOD FOR FORMING STORAGE NODE OF CAPACITOR IN SEMICONDUCTOR DEVICE
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|
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Patent #:
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|
Issue Dt:
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12/02/2008
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Application #:
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11414353
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Filing Dt:
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05/01/2006
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Publication #:
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Pub Dt:
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07/26/2007
| | | | |
Title:
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METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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06/16/2009
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Application #:
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11476261
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Filing Dt:
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06/27/2006
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Publication #:
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Pub Dt:
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06/28/2007
| | | | |
Title:
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FIVE CHANNEL FIN TRANSISTOR AND METHOD FOR FABRICATING THE SAME
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Patent #:
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Issue Dt:
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09/23/2008
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Application #:
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11478527
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Filing Dt:
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06/30/2006
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Publication #:
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Pub Dt:
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03/29/2007
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE SHARING A DATA LINE SENSE AMPLIFIER AND A WRITE DRIVER IN ORDER TO REDUCE A CHIP SIZE
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Patent #:
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Issue Dt:
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07/08/2008
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Application #:
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11582638
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Filing Dt:
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10/17/2006
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Publication #:
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Pub Dt:
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12/06/2007
| | | | |
Title:
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METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING CAPACITOR
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Patent #:
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Issue Dt:
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09/07/2010
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Application #:
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12168823
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Filing Dt:
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07/07/2008
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Publication #:
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Pub Dt:
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11/27/2008
| | | | |
Title:
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METHOD FOR FORMING STORAGE NODE OF CAPACITOR IN SEMICONDUCTOR DEVICE
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|
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Patent #:
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Issue Dt:
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02/07/2012
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Application #:
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12323391
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Filing Dt:
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11/25/2008
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Publication #:
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Pub Dt:
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07/09/2009
| | | | |
Title:
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SEMICONDUCTOR DEVICE WITH RECESS AND FIN STRUCTURE
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|
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Patent #:
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|
Issue Dt:
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12/16/2014
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Application #:
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13236381
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Filing Dt:
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09/19/2011
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Publication #:
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Pub Dt:
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03/21/2013
| | | | |
Title:
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VOLTAGE REGULATION FOR 3D PACKAGES AND METHOD OF MANUFACTURING SAME
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Patent #:
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|
Issue Dt:
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01/22/2013
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Application #:
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13360194
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Filing Dt:
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01/27/2012
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Publication #:
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Pub Dt:
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05/17/2012
| | | | |
Title:
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METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH RECESS AND FIN STRUCTURE
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|
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Patent #:
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|
Issue Dt:
|
11/12/2013
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Application #:
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13369988
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Filing Dt:
|
02/09/2012
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Title:
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CLOCK CONTROL DEVICE FOR TOGGLING AN INTERNAL CLOCK OF A SYNCHRONOUS DRAM FOR REDUCED POWER CONSUMPTION
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|
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Patent #:
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Issue Dt:
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03/07/2017
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Application #:
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13455780
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Filing Dt:
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04/25/2012
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Publication #:
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Pub Dt:
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03/28/2013
| | | | |
Title:
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FLASH MEMORY SYSTEM
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|
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Patent #:
|
|
Issue Dt:
|
11/04/2014
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Application #:
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13568920
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Filing Dt:
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08/07/2012
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Title:
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METHOD OF FORMING A CONTACT PLUG FOR A SEMICONDUCTOR DEVICE
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|
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Patent #:
|
|
Issue Dt:
|
10/08/2013
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Application #:
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13586272
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Filing Dt:
|
08/15/2012
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Title:
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METHOD FOR MANUFACTURING A TRANSISTOR OF A SEMICONDUCTOR MEMORY DEVICE
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|
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Patent #:
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|
Issue Dt:
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11/18/2014
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Application #:
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13621486
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Filing Dt:
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09/17/2012
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Publication #:
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Pub Dt:
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03/21/2013
| | | | |
Title:
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MEMORY SYSTEM WITH A LAYER COMPRISING A DEDICATED REDUNDANCY AREA
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|
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Patent #:
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Issue Dt:
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10/06/2020
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Application #:
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14045419
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Filing Dt:
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12/07/2017
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Publication #:
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Pub Dt:
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02/06/2014
| | | | |
Title:
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METHOD FOR MANUFACTURING A TRANSISTOR OF A SEMICONDUCTOR MEMORY DEVICE
|
|
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Patent #:
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|
Issue Dt:
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06/12/2018
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Application #:
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15419246
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Filing Dt:
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01/30/2017
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Publication #:
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Pub Dt:
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07/20/2017
| | | | |
Title:
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FLASH MEMORY SYSTEM
|
|
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Patent #:
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Issue Dt:
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05/28/2019
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Application #:
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15976255
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Filing Dt:
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05/10/2018
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Publication #:
|
|
Pub Dt:
|
11/15/2018
| | | | |
Title:
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FLASH MEMORY SYSTEM
|
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