skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:064842/0046   Pages: 15
Recorded: 09/08/2023
Attorney Dkt #:392739-00007
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME.
Total properties: 74
1
Patent #:
Issue Dt:
04/24/2012
Application #:
11163305
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
04/19/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM USING ETCHED LEADFRAME
2
Patent #:
Issue Dt:
02/28/2012
Application #:
11164132
Filing Dt:
11/10/2005
Publication #:
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH SUBSTRATE HEAT SINK
3
Patent #:
Issue Dt:
04/24/2012
Application #:
11164209
Filing Dt:
11/14/2005
Publication #:
Pub Dt:
06/22/2006
Title:
HYPER THERMALLY ENHANCED SEMICONDUCTOR PACKAGE SYSTEM COMPRISING HEAT SLUGS ON OPPOSITE SURFACES OF A SEMICONDUCTOR CHIP
4
Patent #:
Issue Dt:
03/20/2012
Application #:
11276716
Filing Dt:
03/10/2006
Publication #:
Pub Dt:
09/13/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING INTERCONNECT STACK AND EXTERNAL INTERCONNECT
5
Patent #:
Issue Dt:
02/28/2012
Application #:
11306098
Filing Dt:
12/15/2005
Publication #:
Pub Dt:
10/05/2006
Title:
WAFER STRENGTH REINFORCEMENT SYSTEM FOR ULTRA THIN WAFER THINNING
6
Patent #:
Issue Dt:
02/28/2012
Application #:
11306806
Filing Dt:
01/11/2006
Publication #:
Pub Dt:
05/17/2007
Title:
BUMP CHIP CARRIER SEMICONDUCTOR PACKAGE SYSTEM
7
Patent #:
Issue Dt:
02/21/2012
Application #:
11307128
Filing Dt:
01/24/2006
Publication #:
Pub Dt:
07/26/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
8
Patent #:
Issue Dt:
02/21/2012
Application #:
11307723
Filing Dt:
02/17/2006
Publication #:
Pub Dt:
08/23/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DIE ON BASE PACKAGE
9
Patent #:
Issue Dt:
03/20/2012
Application #:
11381684
Filing Dt:
05/04/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-PLANAR PADDLE
10
Patent #:
Issue Dt:
02/28/2012
Application #:
11456551
Filing Dt:
07/10/2006
Publication #:
Pub Dt:
01/17/2008
Title:
INTEGRATED CIRCUIT MOUNT SYSTEM WITH SOLDER MASK PAD
11
Patent #:
Issue Dt:
02/28/2012
Application #:
11458078
Filing Dt:
07/17/2006
Publication #:
Pub Dt:
01/17/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING AN EXPOSED THERMALLY CONDUCTIVE COATING
12
Patent #:
Issue Dt:
03/13/2012
Application #:
11469576
Filing Dt:
09/01/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT SYSTEM WITH METAL-INSULATOR-METAL CIRCUIT ELEMENT
13
Patent #:
Issue Dt:
02/14/2012
Application #:
11615923
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
07/19/2007
Title:
SEMICONDUCTOR WAFER SCALE PACKAGE SYSTEM
14
Patent #:
Issue Dt:
04/24/2012
Application #:
11616878
Filing Dt:
12/28/2006
Publication #:
Pub Dt:
07/03/2008
Title:
BRIDGE STACK INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM
15
Patent #:
Issue Dt:
03/13/2012
Application #:
11694927
Filing Dt:
03/30/2007
Publication #:
Pub Dt:
10/02/2008
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONDUCTIVE SPACER
16
Patent #:
Issue Dt:
02/14/2012
Application #:
11750218
Filing Dt:
05/17/2007
Publication #:
Pub Dt:
11/20/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THIN PROFILE
17
Patent #:
Issue Dt:
05/01/2012
Application #:
11849263
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
12/20/2007
Title:
NESTED INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
18
Patent #:
Issue Dt:
03/06/2012
Application #:
11855114
Filing Dt:
09/13/2007
Publication #:
Pub Dt:
03/19/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE ENCAPSULATION HAVING RECESS
19
Patent #:
Issue Dt:
02/21/2012
Application #:
11857402
Filing Dt:
09/18/2007
Publication #:
Pub Dt:
03/19/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL CONNECTIVITY
20
Patent #:
Issue Dt:
02/28/2012
Application #:
11859359
Filing Dt:
09/21/2007
Publication #:
Pub Dt:
03/26/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
21
Patent #:
Issue Dt:
03/20/2012
Application #:
11860460
Filing Dt:
09/24/2007
Publication #:
Pub Dt:
03/27/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKED DIE
22
Patent #:
Issue Dt:
03/06/2012
Application #:
11927646
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE HAVING A CONDUCTOR-FREE RECESS
23
Patent #:
Issue Dt:
02/28/2012
Application #:
11958546
Filing Dt:
12/18/2007
Publication #:
Pub Dt:
06/26/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PASSIVE DEVICES
24
Patent #:
Issue Dt:
03/20/2012
Application #:
12037774
Filing Dt:
02/26/2008
Publication #:
Pub Dt:
08/27/2009
Title:
PACKAGE SYSTEM FOR SHIELDING SEMICONDUCTOR DIES FROM ELECTROMAGNETIC INTERFERENCE
25
Patent #:
Issue Dt:
03/20/2012
Application #:
12044688
Filing Dt:
03/07/2008
Publication #:
Pub Dt:
09/10/2009
Title:
OPTICAL SEMICONDUCTOR DEVICE HAVING PRE-MOLDED LEADFRAME WITH WINDOW AND METHOD THEREFOR
26
Patent #:
Issue Dt:
04/03/2012
Application #:
12134179
Filing Dt:
06/05/2008
Publication #:
Pub Dt:
12/11/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER
27
Patent #:
Issue Dt:
03/20/2012
Application #:
12143047
Filing Dt:
06/20/2008
Publication #:
Pub Dt:
12/24/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULATION
28
Patent #:
Issue Dt:
02/07/2012
Application #:
12144931
Filing Dt:
06/24/2008
Publication #:
Pub Dt:
01/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE
29
Patent #:
Issue Dt:
03/13/2012
Application #:
12185616
Filing Dt:
08/04/2008
Publication #:
Pub Dt:
02/04/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONCAVE TERMINAL
30
Patent #:
Issue Dt:
03/27/2012
Application #:
12194507
Filing Dt:
08/19/2008
Publication #:
Pub Dt:
02/25/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FLIP CHIP
31
Patent #:
Issue Dt:
03/06/2012
Application #:
12207324
Filing Dt:
09/09/2008
Publication #:
Pub Dt:
03/26/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE IN NON-ACTIVE AREA OF WAFER
32
Patent #:
Issue Dt:
03/27/2012
Application #:
12235111
Filing Dt:
09/22/2008
Publication #:
Pub Dt:
04/09/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE HAVING RELIEVED ACTIVE REGION
33
Patent #:
Issue Dt:
02/07/2012
Application #:
12238007
Filing Dt:
09/25/2008
Publication #:
Pub Dt:
03/25/2010
Title:
METHOD OF ELECTRICALLY CONNECTING A SHIELDING LAYER TO GROUND THROUGH A CONDUCTIVE VIA DISPOSED IN PERIPHERAL REGION AROUND SEMICONDUCTOR DIE
34
Patent #:
Issue Dt:
03/06/2012
Application #:
12273541
Filing Dt:
11/18/2008
Publication #:
Pub Dt:
05/20/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF PACKAGE STACKING
35
Patent #:
Issue Dt:
02/07/2012
Application #:
12328717
Filing Dt:
12/04/2008
Publication #:
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME INTERPOSER AND METHOD OF MANUFACTURE THEREOF
36
Patent #:
Issue Dt:
02/07/2012
Application #:
12328722
Filing Dt:
12/04/2008
Publication #:
Pub Dt:
06/10/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM USING BOTTOM FLIP CHIP DIE BONDING AND METHOD OF MANUFACTURE THEREOF
37
Patent #:
Issue Dt:
05/01/2012
Application #:
12329789
Filing Dt:
12/08/2008
Publication #:
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE IN SUBSTRATE FOR IPD AND BASEBAND CIRCUIT SEPARATED BY HIGH-RESISTIVITY MOLDING COMPOUND
38
Patent #:
Issue Dt:
05/01/2012
Application #:
12329800
Filing Dt:
12/08/2008
Publication #:
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING BOND WIRES AND STUD BUMPS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
39
Patent #:
Issue Dt:
03/20/2012
Application #:
12332799
Filing Dt:
12/11/2008
Publication #:
Pub Dt:
06/17/2010
Title:
DOUBLE-SIDED SEMICONDUCTOR DEVICE AND METHOD OF FORMING TOP-SIDE AND BOTTOM-SIDE INTERCONNECT STRUCTURES
40
Patent #:
Issue Dt:
03/13/2012
Application #:
12406049
Filing Dt:
03/17/2009
Publication #:
Pub Dt:
09/23/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE
41
Patent #:
Issue Dt:
04/24/2012
Application #:
12410312
Filing Dt:
03/24/2009
Publication #:
Pub Dt:
09/30/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING NO-FLOW UNDERFILL MATERIAL AROUND VERTICAL INTERCONNECT STRUCTURE
42
Patent #:
Issue Dt:
03/27/2012
Application #:
12411040
Filing Dt:
03/25/2009
Publication #:
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER AND METHOD OF MANUFACTURE THEREOF
43
Patent #:
Issue Dt:
03/06/2012
Application #:
12432137
Filing Dt:
04/29/2009
Publication #:
Pub Dt:
08/20/2009
Title:
FLIP CHIP INTERCONNECTION PAD LAYOUT
44
Patent #:
Issue Dt:
02/07/2012
Application #:
12467865
Filing Dt:
05/18/2009
Publication #:
Pub Dt:
11/18/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE
45
Patent #:
Issue Dt:
03/27/2012
Application #:
12468810
Filing Dt:
05/19/2009
Publication #:
Pub Dt:
09/10/2009
Title:
A METHOD OF A PACKAGE ON PACKAGE PACKAGING
46
Patent #:
Issue Dt:
02/21/2012
Application #:
12472083
Filing Dt:
05/26/2009
Publication #:
Pub Dt:
09/10/2009
Title:
INTERCONNECTING A CHIP AND A SUBSTRATE BY BONDING PURE METAL BUMPS AND PURE METAL SPOTS
47
Patent #:
Issue Dt:
02/21/2012
Application #:
12486271
Filing Dt:
06/17/2009
Publication #:
Pub Dt:
12/23/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH VIA DIE HAVING PEDESTAL AND RECESS AND METHOD OF MANUFACTURE THEREOF
48
Patent #:
Issue Dt:
05/01/2012
Application #:
12545357
Filing Dt:
08/21/2009
Publication #:
Pub Dt:
02/24/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF STACKING DIE ON LEADFRAME ELECTRICALLY CONNECTED BY CONDUCTIVE PILLARS
49
Patent #:
Issue Dt:
04/24/2012
Application #:
12557811
Filing Dt:
09/11/2009
Publication #:
Pub Dt:
03/17/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
50
Patent #:
Issue Dt:
03/27/2012
Application #:
12565380
Filing Dt:
09/23/2009
Publication #:
Pub Dt:
03/24/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
51
Patent #:
Issue Dt:
04/17/2012
Application #:
12621738
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
05/19/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING IPD ON MOLDED SUBSTRATE
52
Patent #:
Issue Dt:
03/06/2012
Application #:
12624482
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
03/18/2010
Title:
SOLDER JOINT FLIP CHIP INTERCONNECTION
53
Patent #:
Issue Dt:
02/14/2012
Application #:
12633789
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
06/09/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
54
Patent #:
Issue Dt:
02/14/2012
Application #:
12635699
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL ROW LEAD-FRAME HAVING TOP AND BOTTOM TERMINALS AND METHOD OF MANUFACTURE THEREOF
55
Patent #:
Issue Dt:
03/20/2012
Application #:
12696923
Filing Dt:
01/29/2010
Publication #:
Pub Dt:
08/04/2011
Title:
METHOD OF FORMING THIN PROFILE WLCSP WITH VERTICAL INTERCONNECT OVER PACKAGE FOOTPRINT
56
Patent #:
Issue Dt:
02/07/2012
Application #:
12705790
Filing Dt:
02/15/2010
Publication #:
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPACT COILS FOR HIGH PERFORMANCE FILTER
57
Patent #:
Issue Dt:
02/07/2012
Application #:
12705810
Filing Dt:
02/15/2010
Publication #:
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THIN FILM CAPACITOR
58
Patent #:
Issue Dt:
03/27/2012
Application #:
12715910
Filing Dt:
03/02/2010
Publication #:
Pub Dt:
06/24/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM FOR FINE PITCH SUBSTRATES AND METHOD OF MANUFACTURE THEREOF
59
Patent #:
Issue Dt:
03/20/2012
Application #:
12732423
Filing Dt:
03/26/2010
Publication #:
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERMEDIATE PAD AND METHOD OF MANUFACTURE THEREOF
60
Patent #:
Issue Dt:
02/21/2012
Application #:
12763386
Filing Dt:
04/20/2010
Publication #:
Pub Dt:
08/12/2010
Title:
METHOD OF FORMING TOP ELECTRODE FOR CAPACITOR AND INTERCONNECTION IN INTEGRATED PASSIVE DEVICE (IPD)
61
Patent #:
Issue Dt:
04/03/2012
Application #:
12822954
Filing Dt:
06/24/2010
Publication #:
Pub Dt:
10/21/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE AND METHOD FOR MANUFACTURING THEREOF
62
Patent #:
Issue Dt:
02/07/2012
Application #:
12826368
Filing Dt:
06/29/2010
Publication #:
Pub Dt:
10/21/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH-FREQUENCY CIRCUIT STRUCTURE AND METHOD THEREOF
63
Patent #:
Issue Dt:
03/27/2012
Application #:
12831822
Filing Dt:
07/07/2010
Publication #:
Pub Dt:
10/28/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKING AND ANTI-FLASH STRUCTURE
64
Patent #:
Issue Dt:
04/24/2012
Application #:
12832821
Filing Dt:
07/08/2010
Publication #:
Pub Dt:
10/28/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE PILLARS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
65
Patent #:
Issue Dt:
02/21/2012
Application #:
12892941
Filing Dt:
09/29/2010
Publication #:
Pub Dt:
01/20/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING AND METHOD OF MANUFACTURE THEREOF
66
Patent #:
Issue Dt:
03/27/2012
Application #:
12965584
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
03/31/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF DISSIPATING HEAT FROM THIN PACKAGE-ON-PACKAGE MOUNTED TO SUBSTRATE
67
Patent #:
Issue Dt:
03/20/2012
Application #:
12974866
Filing Dt:
12/21/2010
Publication #:
Pub Dt:
04/28/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THROUGH SEMICONDUCTOR VIAS AND METHOD OF MANUFACTURE THEREOF
68
Patent #:
Issue Dt:
02/28/2012
Application #:
13004111
Filing Dt:
01/11/2011
Publication #:
Pub Dt:
05/05/2011
Title:
WAFER INTEGRATED WITH PERMANENT CARRIER AND METHOD THEREFOR
69
Patent #:
Issue Dt:
03/27/2012
Application #:
13017388
Filing Dt:
01/31/2011
Publication #:
Pub Dt:
05/26/2011
Title:
PACKAGE STACKING SYSTEM WITH MOLD CONTAMINATION PREVENTION AND METHOD FOR MANUFACTURING THEREOF
70
Patent #:
Issue Dt:
05/01/2012
Application #:
13019562
Filing Dt:
02/02/2011
Publication #:
Pub Dt:
05/26/2011
Title:
SEMICONDUCTOR DEVICE HAVING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON RECESSED AND RAISED BOND FINGERS
71
Patent #:
Issue Dt:
04/17/2012
Application #:
13155312
Filing Dt:
06/07/2011
Publication #:
Pub Dt:
09/29/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THREE-DIMENSIONAL VERTICALLY ORIENTED INTEGRATED CAPACITORS
72
Patent #:
Issue Dt:
04/24/2012
Application #:
13166417
Filing Dt:
06/22/2011
Publication #:
Pub Dt:
10/13/2011
Title:
INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM
73
Patent #:
Issue Dt:
04/10/2012
Application #:
13172560
Filing Dt:
06/29/2011
Publication #:
Pub Dt:
10/20/2011
Title:
METHOD FOR MANUFACTURING INTEGRATED CIRCUIT PACKAGE SYSTEM WITH UNDER PADDLE LEADFINGERS
74
Patent #:
Issue Dt:
03/27/2012
Application #:
13269258
Filing Dt:
10/07/2011
Publication #:
Pub Dt:
02/02/2012
Title:
METHOD FOR MANUFACTURING BALL GRID ARRAY PACKAGE STACKING SYSTEM
Assignor
1
Exec Dt:
03/29/2016
Assignee
1
5 YISHUN STREET 23
SINGAPORE, SINGAPORE
Correspondence name and address
KATTEN MUCHIN ROSENMAN LLP
1919 PENNSYLVANIA AVE., NW - SUITE 800
WASHINGTON, DC 20006

Search Results as of: 05/11/2024 06:34 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT